Merge tag 'late-omap' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[~shefty/rdma-dev.git] / arch / arm / boot / dts / dove.dtsi
1 /include/ "skeleton.dtsi"
2
3 / {
4         compatible = "marvell,dove";
5         model = "Marvell Armada 88AP510 SoC";
6
7         aliases {
8                 gpio0 = &gpio0;
9                 gpio1 = &gpio1;
10                 gpio2 = &gpio2;
11         };
12
13         soc@f1000000 {
14                 compatible = "simple-bus";
15                 #address-cells = <1>;
16                 #size-cells = <1>;
17                 interrupt-parent = <&intc>;
18
19                 ranges = <0xc8000000 0xc8000000 0x0100000   /* CESA SRAM   1M */
20                           0xe0000000 0xe0000000 0x8000000   /* PCIe0 Mem 128M */
21                           0xe8000000 0xe8000000 0x8000000   /* PCIe1 Mem 128M */
22                           0xf0000000 0xf0000000 0x0100000   /* ScratchPad  1M */
23                           0x00000000 0xf1000000 0x1000000   /* SB/NB regs 16M */
24                           0xf2000000 0xf2000000 0x0100000   /* PCIe0 I/O   1M */
25                           0xf2100000 0xf2100000 0x0100000   /* PCIe0 I/O   1M */
26                           0xf8000000 0xf8000000 0x8000000>; /* BootROM   128M */
27
28                 l2: l2-cache {
29                         compatible = "marvell,tauros2-cache";
30                         marvell,tauros2-cache-features = <0>;
31                 };
32
33                 intc: interrupt-controller {
34                         compatible = "marvell,orion-intc";
35                         interrupt-controller;
36                         #interrupt-cells = <1>;
37                         reg = <0x20204 0x04>, <0x20214 0x04>;
38                 };
39
40                 core_clk: core-clocks@d0214 {
41                         compatible = "marvell,dove-core-clock";
42                         reg = <0xd0214 0x4>;
43                         #clock-cells = <1>;
44                 };
45
46                 gate_clk: clock-gating-control@d0038 {
47                         compatible = "marvell,dove-gating-clock";
48                         reg = <0xd0038 0x4>;
49                         clocks = <&core_clk 0>;
50                         #clock-cells = <1>;
51                 };
52
53                 uart0: serial@12000 {
54                         compatible = "ns16550a";
55                         reg = <0x12000 0x100>;
56                         reg-shift = <2>;
57                         interrupts = <7>;
58                         clock-frequency = <166666667>;
59                         status = "disabled";
60                 };
61
62                 uart1: serial@12100 {
63                         compatible = "ns16550a";
64                         reg = <0x12100 0x100>;
65                         reg-shift = <2>;
66                         interrupts = <8>;
67                         clock-frequency = <166666667>;
68                         status = "disabled";
69                 };
70
71                 uart2: serial@12200 {
72                         compatible = "ns16550a";
73                         reg = <0x12000 0x100>;
74                         reg-shift = <2>;
75                         interrupts = <9>;
76                         clock-frequency = <166666667>;
77                         status = "disabled";
78                 };
79
80                 uart3: serial@12300 {
81                         compatible = "ns16550a";
82                         reg = <0x12100 0x100>;
83                         reg-shift = <2>;
84                         interrupts = <10>;
85                         clock-frequency = <166666667>;
86                         status = "disabled";
87                 };
88
89                 gpio0: gpio@d0400 {
90                         compatible = "marvell,orion-gpio";
91                         #gpio-cells = <2>;
92                         gpio-controller;
93                         reg = <0xd0400 0x20>;
94                         ngpios = <32>;
95                         interrupt-controller;
96                         #interrupt-cells = <2>;
97                         interrupts = <12>, <13>, <14>, <60>;
98                 };
99
100                 gpio1: gpio@d0420 {
101                         compatible = "marvell,orion-gpio";
102                         #gpio-cells = <2>;
103                         gpio-controller;
104                         reg = <0xd0420 0x20>;
105                         ngpios = <32>;
106                         interrupt-controller;
107                         #interrupt-cells = <2>;
108                         interrupts = <61>;
109                 };
110
111                 gpio2: gpio@e8400 {
112                         compatible = "marvell,orion-gpio";
113                         #gpio-cells = <2>;
114                         gpio-controller;
115                         reg = <0xe8400 0x0c>;
116                         ngpios = <8>;
117                 };
118
119                 pinctrl: pinctrl@d0200 {
120                         compatible = "marvell,dove-pinctrl";
121                         reg = <0xd0200 0x10>;
122                         clocks = <&gate_clk 22>;
123                 };
124
125                 spi0: spi@10600 {
126                         compatible = "marvell,orion-spi";
127                         #address-cells = <1>;
128                         #size-cells = <0>;
129                         cell-index = <0>;
130                         interrupts = <6>;
131                         reg = <0x10600 0x28>;
132                         clocks = <&core_clk 0>;
133                         status = "disabled";
134                 };
135
136                 spi1: spi@14600 {
137                         compatible = "marvell,orion-spi";
138                         #address-cells = <1>;
139                         #size-cells = <0>;
140                         cell-index = <1>;
141                         interrupts = <5>;
142                         reg = <0x14600 0x28>;
143                         clocks = <&core_clk 0>;
144                         status = "disabled";
145                 };
146
147                 i2c0: i2c@11000 {
148                         compatible = "marvell,mv64xxx-i2c";
149                         reg = <0x11000 0x20>;
150                         #address-cells = <1>;
151                         #size-cells = <0>;
152                         interrupts = <11>;
153                         clock-frequency = <400000>;
154                         timeout-ms = <1000>;
155                         clocks = <&core_clk 0>;
156                         status = "disabled";
157                 };
158
159                 sdio0: sdio@92000 {
160                         compatible = "marvell,dove-sdhci";
161                         reg = <0x92000 0x100>;
162                         interrupts = <35>, <37>;
163                         clocks = <&gate_clk 8>;
164                         status = "disabled";
165                 };
166
167                 sdio1: sdio@90000 {
168                         compatible = "marvell,dove-sdhci";
169                         reg = <0x90000 0x100>;
170                         interrupts = <36>, <38>;
171                         clocks = <&gate_clk 9>;
172                         status = "disabled";
173                 };
174
175                 sata0: sata@a0000 {
176                         compatible = "marvell,orion-sata";
177                         reg = <0xa0000 0x2400>;
178                         interrupts = <62>;
179                         clocks = <&gate_clk 3>;
180                         nr-ports = <1>;
181                         status = "disabled";
182                 };
183
184                 crypto: crypto@30000 {
185                         compatible = "marvell,orion-crypto";
186                         reg = <0x30000 0x10000>,
187                               <0xc8000000 0x800>;
188                         reg-names = "regs", "sram";
189                         interrupts = <31>;
190                         clocks = <&gate_clk 15>;
191                         status = "okay";
192                 };
193
194                 xor0: dma-engine@60800 {
195                         compatible = "marvell,orion-xor";
196                         reg = <0x60800 0x100
197                                0x60a00 0x100>;
198                         clocks = <&gate_clk 23>;
199                         status = "okay";
200
201                         channel0 {
202                                 interrupts = <39>;
203                                 dmacap,memcpy;
204                                 dmacap,xor;
205                         };
206
207                         channel1 {
208                                 interrupts = <40>;
209                                 dmacap,memset;
210                                 dmacap,memcpy;
211                                 dmacap,xor;
212                         };
213                 };
214
215                 xor1: dma-engine@60900 {
216                         compatible = "marvell,orion-xor";
217                         reg = <0x60900 0x100
218                                0x60b00 0x100>;
219                         clocks = <&gate_clk 24>;
220                         status = "okay";
221
222                         channel0 {
223                                 interrupts = <42>;
224                                 dmacap,memcpy;
225                                 dmacap,xor;
226                         };
227
228                         channel1 {
229                                 interrupts = <43>;
230                                 dmacap,memset;
231                                 dmacap,memcpy;
232                                 dmacap,xor;
233                         };
234                 };
235         };
236 };