Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[~shefty/rdma-dev.git] / arch / arm / boot / dts / tegra20.dtsi
1 /include/ "skeleton.dtsi"
2
3 / {
4         compatible = "nvidia,tegra20";
5         interrupt-parent = <&intc>;
6
7         pmc@7000f400 {
8                 compatible = "nvidia,tegra20-pmc";
9                 reg = <0x7000e400 0x400>;
10         };
11
12         intc: interrupt-controller@50041000 {
13                 compatible = "arm,cortex-a9-gic";
14                 interrupt-controller;
15                 #interrupt-cells = <3>;
16                 reg = < 0x50041000 0x1000 >,
17                       < 0x50040100 0x0100 >;
18         };
19
20         pmu {
21                 compatible = "arm,cortex-a9-pmu";
22                 interrupts = <0 56 0x04
23                               0 57 0x04>;
24         };
25
26         apbdma: dma@6000a000 {
27                 compatible = "nvidia,tegra20-apbdma";
28                 reg = <0x6000a000 0x1200>;
29                 interrupts = < 0 104 0x04
30                                0 105 0x04
31                                0 106 0x04
32                                0 107 0x04
33                                0 108 0x04
34                                0 109 0x04
35                                0 110 0x04
36                                0 111 0x04
37                                0 112 0x04
38                                0 113 0x04
39                                0 114 0x04
40                                0 115 0x04
41                                0 116 0x04
42                                0 117 0x04
43                                0 118 0x04
44                                0 119 0x04 >;
45         };
46
47         i2c@7000c000 {
48                 #address-cells = <1>;
49                 #size-cells = <0>;
50                 compatible = "nvidia,tegra20-i2c";
51                 reg = <0x7000C000 0x100>;
52                 interrupts = < 0 38 0x04 >;
53         };
54
55         i2c@7000c400 {
56                 #address-cells = <1>;
57                 #size-cells = <0>;
58                 compatible = "nvidia,tegra20-i2c";
59                 reg = <0x7000C400 0x100>;
60                 interrupts = < 0 84 0x04 >;
61         };
62
63         i2c@7000c500 {
64                 #address-cells = <1>;
65                 #size-cells = <0>;
66                 compatible = "nvidia,tegra20-i2c";
67                 reg = <0x7000C500 0x100>;
68                 interrupts = < 0 92 0x04 >;
69         };
70
71         i2c@7000d000 {
72                 #address-cells = <1>;
73                 #size-cells = <0>;
74                 compatible = "nvidia,tegra20-i2c-dvc";
75                 reg = <0x7000D000 0x200>;
76                 interrupts = < 0 53 0x04 >;
77         };
78
79         tegra_i2s1: i2s@70002800 {
80                 compatible = "nvidia,tegra20-i2s";
81                 reg = <0x70002800 0x200>;
82                 interrupts = < 0 13 0x04 >;
83                 nvidia,dma-request-selector = < &apbdma 2 >;
84         };
85
86         tegra_i2s2: i2s@70002a00 {
87                 compatible = "nvidia,tegra20-i2s";
88                 reg = <0x70002a00 0x200>;
89                 interrupts = < 0 3 0x04 >;
90                 nvidia,dma-request-selector = < &apbdma 1 >;
91         };
92
93         das@70000c00 {
94                 compatible = "nvidia,tegra20-das";
95                 reg = <0x70000c00 0x80>;
96         };
97
98         gpio: gpio@6000d000 {
99                 compatible = "nvidia,tegra20-gpio";
100                 reg = < 0x6000d000 0x1000 >;
101                 interrupts = < 0 32 0x04
102                                0 33 0x04
103                                0 34 0x04
104                                0 35 0x04
105                                0 55 0x04
106                                0 87 0x04
107                                0 89 0x04 >;
108                 #gpio-cells = <2>;
109                 gpio-controller;
110                 #interrupt-cells = <2>;
111                 interrupt-controller;
112         };
113
114         pinmux: pinmux@70000000 {
115                 compatible = "nvidia,tegra20-pinmux";
116                 reg = < 0x70000014 0x10    /* Tri-state registers */
117                         0x70000080 0x20    /* Mux registers */
118                         0x700000a0 0x14    /* Pull-up/down registers */
119                         0x70000868 0xa8 >; /* Pad control registers */
120         };
121
122         serial@70006000 {
123                 compatible = "nvidia,tegra20-uart";
124                 reg = <0x70006000 0x40>;
125                 reg-shift = <2>;
126                 interrupts = < 0 36 0x04 >;
127         };
128
129         serial@70006040 {
130                 compatible = "nvidia,tegra20-uart";
131                 reg = <0x70006040 0x40>;
132                 reg-shift = <2>;
133                 interrupts = < 0 37 0x04 >;
134         };
135
136         serial@70006200 {
137                 compatible = "nvidia,tegra20-uart";
138                 reg = <0x70006200 0x100>;
139                 reg-shift = <2>;
140                 interrupts = < 0 46 0x04 >;
141         };
142
143         serial@70006300 {
144                 compatible = "nvidia,tegra20-uart";
145                 reg = <0x70006300 0x100>;
146                 reg-shift = <2>;
147                 interrupts = < 0 90 0x04 >;
148         };
149
150         serial@70006400 {
151                 compatible = "nvidia,tegra20-uart";
152                 reg = <0x70006400 0x100>;
153                 reg-shift = <2>;
154                 interrupts = < 0 91 0x04 >;
155         };
156
157         emc@7000f400 {
158                 #address-cells = <1>;
159                 #size-cells = <0>;
160                 compatible = "nvidia,tegra20-emc";
161                 reg = <0x7000f400 0x200>;
162         };
163
164         sdhci@c8000000 {
165                 compatible = "nvidia,tegra20-sdhci";
166                 reg = <0xc8000000 0x200>;
167                 interrupts = < 0 14 0x04 >;
168         };
169
170         sdhci@c8000200 {
171                 compatible = "nvidia,tegra20-sdhci";
172                 reg = <0xc8000200 0x200>;
173                 interrupts = < 0 15 0x04 >;
174         };
175
176         sdhci@c8000400 {
177                 compatible = "nvidia,tegra20-sdhci";
178                 reg = <0xc8000400 0x200>;
179                 interrupts = < 0 19 0x04 >;
180         };
181
182         sdhci@c8000600 {
183                 compatible = "nvidia,tegra20-sdhci";
184                 reg = <0xc8000600 0x200>;
185                 interrupts = < 0 31 0x04 >;
186         };
187
188         usb@c5000000 {
189                 compatible = "nvidia,tegra20-ehci", "usb-ehci";
190                 reg = <0xc5000000 0x4000>;
191                 interrupts = < 0 20 0x04 >;
192                 phy_type = "utmi";
193         };
194
195         usb@c5004000 {
196                 compatible = "nvidia,tegra20-ehci", "usb-ehci";
197                 reg = <0xc5004000 0x4000>;
198                 interrupts = < 0 21 0x04 >;
199                 phy_type = "ulpi";
200         };
201
202         usb@c5008000 {
203                 compatible = "nvidia,tegra20-ehci", "usb-ehci";
204                 reg = <0xc5008000 0x4000>;
205                 interrupts = < 0 97 0x04 >;
206                 phy_type = "utmi";
207         };
208 };
209