Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux
[~shefty/rdma-dev.git] / arch / arm / mach-at91 / at91sam9260_devices.c
1 /*
2  * arch/arm/mach-at91/at91sam9260_devices.c
3  *
4  *  Copyright (C) 2006 Atmel
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <linux/platform_data/at91_adc.h>
21
22 #include <mach/board.h>
23 #include <mach/cpu.h>
24 #include <mach/at91sam9260.h>
25 #include <mach/at91sam9260_matrix.h>
26 #include <mach/at91_matrix.h>
27 #include <mach/at91sam9_smc.h>
28 #include <mach/at91_adc.h>
29
30 #include "generic.h"
31
32
33 /* --------------------------------------------------------------------
34  *  USB Host
35  * -------------------------------------------------------------------- */
36
37 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
38 static u64 ohci_dmamask = DMA_BIT_MASK(32);
39 static struct at91_usbh_data usbh_data;
40
41 static struct resource usbh_resources[] = {
42         [0] = {
43                 .start  = AT91SAM9260_UHP_BASE,
44                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
45                 .flags  = IORESOURCE_MEM,
46         },
47         [1] = {
48                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
49                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
50                 .flags  = IORESOURCE_IRQ,
51         },
52 };
53
54 static struct platform_device at91_usbh_device = {
55         .name           = "at91_ohci",
56         .id             = -1,
57         .dev            = {
58                                 .dma_mask               = &ohci_dmamask,
59                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
60                                 .platform_data          = &usbh_data,
61         },
62         .resource       = usbh_resources,
63         .num_resources  = ARRAY_SIZE(usbh_resources),
64 };
65
66 void __init at91_add_device_usbh(struct at91_usbh_data *data)
67 {
68         int i;
69
70         if (!data)
71                 return;
72
73         /* Enable overcurrent notification */
74         for (i = 0; i < data->ports; i++) {
75                 if (data->overcurrent_pin[i])
76                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
77         }
78
79         usbh_data = *data;
80         platform_device_register(&at91_usbh_device);
81 }
82 #else
83 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84 #endif
85
86
87 /* --------------------------------------------------------------------
88  *  USB Device (Gadget)
89  * -------------------------------------------------------------------- */
90
91 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
92 static struct at91_udc_data udc_data;
93
94 static struct resource udc_resources[] = {
95         [0] = {
96                 .start  = AT91SAM9260_BASE_UDP,
97                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
98                 .flags  = IORESOURCE_MEM,
99         },
100         [1] = {
101                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
102                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
103                 .flags  = IORESOURCE_IRQ,
104         },
105 };
106
107 static struct platform_device at91_udc_device = {
108         .name           = "at91_udc",
109         .id             = -1,
110         .dev            = {
111                                 .platform_data          = &udc_data,
112         },
113         .resource       = udc_resources,
114         .num_resources  = ARRAY_SIZE(udc_resources),
115 };
116
117 void __init at91_add_device_udc(struct at91_udc_data *data)
118 {
119         if (!data)
120                 return;
121
122         if (gpio_is_valid(data->vbus_pin)) {
123                 at91_set_gpio_input(data->vbus_pin, 0);
124                 at91_set_deglitch(data->vbus_pin, 1);
125         }
126
127         /* Pullup pin is handled internally by USB device peripheral */
128
129         udc_data = *data;
130         platform_device_register(&at91_udc_device);
131 }
132 #else
133 void __init at91_add_device_udc(struct at91_udc_data *data) {}
134 #endif
135
136
137 /* --------------------------------------------------------------------
138  *  Ethernet
139  * -------------------------------------------------------------------- */
140
141 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
142 static u64 eth_dmamask = DMA_BIT_MASK(32);
143 static struct macb_platform_data eth_data;
144
145 static struct resource eth_resources[] = {
146         [0] = {
147                 .start  = AT91SAM9260_BASE_EMAC,
148                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
149                 .flags  = IORESOURCE_MEM,
150         },
151         [1] = {
152                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
153                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
154                 .flags  = IORESOURCE_IRQ,
155         },
156 };
157
158 static struct platform_device at91sam9260_eth_device = {
159         .name           = "macb",
160         .id             = -1,
161         .dev            = {
162                                 .dma_mask               = &eth_dmamask,
163                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
164                                 .platform_data          = &eth_data,
165         },
166         .resource       = eth_resources,
167         .num_resources  = ARRAY_SIZE(eth_resources),
168 };
169
170 void __init at91_add_device_eth(struct macb_platform_data *data)
171 {
172         if (!data)
173                 return;
174
175         if (gpio_is_valid(data->phy_irq_pin)) {
176                 at91_set_gpio_input(data->phy_irq_pin, 0);
177                 at91_set_deglitch(data->phy_irq_pin, 1);
178         }
179
180         /* Pins used for MII and RMII */
181         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
182         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
183         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
184         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
185         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
186         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
187         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
188         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
189         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
190         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
191
192         if (!data->is_rmii) {
193                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
194                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
195                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
196                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
197                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
198                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
199                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
200                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
201         }
202
203         eth_data = *data;
204         platform_device_register(&at91sam9260_eth_device);
205 }
206 #else
207 void __init at91_add_device_eth(struct macb_platform_data *data) {}
208 #endif
209
210
211 /* --------------------------------------------------------------------
212  *  MMC / SD Slot for Atmel MCI Driver
213  * -------------------------------------------------------------------- */
214
215 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
216 static u64 mmc_dmamask = DMA_BIT_MASK(32);
217 static struct mci_platform_data mmc_data;
218
219 static struct resource mmc_resources[] = {
220         [0] = {
221                 .start  = AT91SAM9260_BASE_MCI,
222                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
223                 .flags  = IORESOURCE_MEM,
224         },
225         [1] = {
226                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
227                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
228                 .flags  = IORESOURCE_IRQ,
229         },
230 };
231
232 static struct platform_device at91sam9260_mmc_device = {
233         .name           = "atmel_mci",
234         .id             = -1,
235         .dev            = {
236                                 .dma_mask               = &mmc_dmamask,
237                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
238                                 .platform_data          = &mmc_data,
239         },
240         .resource       = mmc_resources,
241         .num_resources  = ARRAY_SIZE(mmc_resources),
242 };
243
244 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
245 {
246         unsigned int i;
247         unsigned int slot_count = 0;
248
249         if (!data)
250                 return;
251
252         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
253                 if (data->slot[i].bus_width) {
254                         /* input/irq */
255                         if (gpio_is_valid(data->slot[i].detect_pin)) {
256                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
257                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
258                         }
259                         if (gpio_is_valid(data->slot[i].wp_pin))
260                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
261
262                         switch (i) {
263                         case 0:
264                                 /* CMD */
265                                 at91_set_A_periph(AT91_PIN_PA7, 1);
266                                 /* DAT0, maybe DAT1..DAT3 */
267                                 at91_set_A_periph(AT91_PIN_PA6, 1);
268                                 if (data->slot[i].bus_width == 4) {
269                                         at91_set_A_periph(AT91_PIN_PA9, 1);
270                                         at91_set_A_periph(AT91_PIN_PA10, 1);
271                                         at91_set_A_periph(AT91_PIN_PA11, 1);
272                                 }
273                                 slot_count++;
274                                 break;
275                         case 1:
276                                 /* CMD */
277                                 at91_set_B_periph(AT91_PIN_PA1, 1);
278                                 /* DAT0, maybe DAT1..DAT3 */
279                                 at91_set_B_periph(AT91_PIN_PA0, 1);
280                                 if (data->slot[i].bus_width == 4) {
281                                         at91_set_B_periph(AT91_PIN_PA5, 1);
282                                         at91_set_B_periph(AT91_PIN_PA4, 1);
283                                         at91_set_B_periph(AT91_PIN_PA3, 1);
284                                 }
285                                 slot_count++;
286                                 break;
287                         default:
288                                 printk(KERN_ERR
289                                         "AT91: SD/MMC slot %d not available\n", i);
290                                 break;
291                         }
292                 }
293         }
294
295         if (slot_count) {
296                 /* CLK */
297                 at91_set_A_periph(AT91_PIN_PA8, 0);
298
299                 mmc_data = *data;
300                 platform_device_register(&at91sam9260_mmc_device);
301         }
302 }
303 #else
304 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
305 #endif
306
307
308 /* --------------------------------------------------------------------
309  *  NAND / SmartMedia
310  * -------------------------------------------------------------------- */
311
312 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
313 static struct atmel_nand_data nand_data;
314
315 #define NAND_BASE       AT91_CHIPSELECT_3
316
317 static struct resource nand_resources[] = {
318         [0] = {
319                 .start  = NAND_BASE,
320                 .end    = NAND_BASE + SZ_256M - 1,
321                 .flags  = IORESOURCE_MEM,
322         },
323         [1] = {
324                 .start  = AT91SAM9260_BASE_ECC,
325                 .end    = AT91SAM9260_BASE_ECC + SZ_512 - 1,
326                 .flags  = IORESOURCE_MEM,
327         }
328 };
329
330 static struct platform_device at91sam9260_nand_device = {
331         .name           = "atmel_nand",
332         .id             = -1,
333         .dev            = {
334                                 .platform_data  = &nand_data,
335         },
336         .resource       = nand_resources,
337         .num_resources  = ARRAY_SIZE(nand_resources),
338 };
339
340 void __init at91_add_device_nand(struct atmel_nand_data *data)
341 {
342         unsigned long csa;
343
344         if (!data)
345                 return;
346
347         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
348         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
349
350         /* enable pin */
351         if (gpio_is_valid(data->enable_pin))
352                 at91_set_gpio_output(data->enable_pin, 1);
353
354         /* ready/busy pin */
355         if (gpio_is_valid(data->rdy_pin))
356                 at91_set_gpio_input(data->rdy_pin, 1);
357
358         /* card detect pin */
359         if (gpio_is_valid(data->det_pin))
360                 at91_set_gpio_input(data->det_pin, 1);
361
362         nand_data = *data;
363         platform_device_register(&at91sam9260_nand_device);
364 }
365 #else
366 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
367 #endif
368
369
370 /* --------------------------------------------------------------------
371  *  TWI (i2c)
372  * -------------------------------------------------------------------- */
373
374 /*
375  * Prefer the GPIO code since the TWI controller isn't robust
376  * (gets overruns and underruns under load) and can only issue
377  * repeated STARTs in one scenario (the driver doesn't yet handle them).
378  */
379
380 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
381
382 static struct i2c_gpio_platform_data pdata = {
383         .sda_pin                = AT91_PIN_PA23,
384         .sda_is_open_drain      = 1,
385         .scl_pin                = AT91_PIN_PA24,
386         .scl_is_open_drain      = 1,
387         .udelay                 = 2,            /* ~100 kHz */
388 };
389
390 static struct platform_device at91sam9260_twi_device = {
391         .name                   = "i2c-gpio",
392         .id                     = -1,
393         .dev.platform_data      = &pdata,
394 };
395
396 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
397 {
398         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
399         at91_set_multi_drive(AT91_PIN_PA23, 1);
400
401         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
402         at91_set_multi_drive(AT91_PIN_PA24, 1);
403
404         i2c_register_board_info(0, devices, nr_devices);
405         platform_device_register(&at91sam9260_twi_device);
406 }
407
408 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
409
410 static struct resource twi_resources[] = {
411         [0] = {
412                 .start  = AT91SAM9260_BASE_TWI,
413                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
414                 .flags  = IORESOURCE_MEM,
415         },
416         [1] = {
417                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
418                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
419                 .flags  = IORESOURCE_IRQ,
420         },
421 };
422
423 static struct platform_device at91sam9260_twi_device = {
424         .id             = -1,
425         .resource       = twi_resources,
426         .num_resources  = ARRAY_SIZE(twi_resources),
427 };
428
429 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
430 {
431         /* IP version is not the same on 9260 and g20 */
432         if (cpu_is_at91sam9g20()) {
433                 at91sam9260_twi_device.name = "i2c-at91sam9g20";
434         } else {
435                 at91sam9260_twi_device.name = "i2c-at91sam9260";
436         }
437
438         /* pins used for TWI interface */
439         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
440         at91_set_multi_drive(AT91_PIN_PA23, 1);
441
442         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
443         at91_set_multi_drive(AT91_PIN_PA24, 1);
444
445         i2c_register_board_info(0, devices, nr_devices);
446         platform_device_register(&at91sam9260_twi_device);
447 }
448 #else
449 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
450 #endif
451
452
453 /* --------------------------------------------------------------------
454  *  SPI
455  * -------------------------------------------------------------------- */
456
457 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
458 static u64 spi_dmamask = DMA_BIT_MASK(32);
459
460 static struct resource spi0_resources[] = {
461         [0] = {
462                 .start  = AT91SAM9260_BASE_SPI0,
463                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
464                 .flags  = IORESOURCE_MEM,
465         },
466         [1] = {
467                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
468                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
469                 .flags  = IORESOURCE_IRQ,
470         },
471 };
472
473 static struct platform_device at91sam9260_spi0_device = {
474         .name           = "atmel_spi",
475         .id             = 0,
476         .dev            = {
477                                 .dma_mask               = &spi_dmamask,
478                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
479         },
480         .resource       = spi0_resources,
481         .num_resources  = ARRAY_SIZE(spi0_resources),
482 };
483
484 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
485
486 static struct resource spi1_resources[] = {
487         [0] = {
488                 .start  = AT91SAM9260_BASE_SPI1,
489                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
490                 .flags  = IORESOURCE_MEM,
491         },
492         [1] = {
493                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
494                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
495                 .flags  = IORESOURCE_IRQ,
496         },
497 };
498
499 static struct platform_device at91sam9260_spi1_device = {
500         .name           = "atmel_spi",
501         .id             = 1,
502         .dev            = {
503                                 .dma_mask               = &spi_dmamask,
504                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
505         },
506         .resource       = spi1_resources,
507         .num_resources  = ARRAY_SIZE(spi1_resources),
508 };
509
510 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
511
512 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
513 {
514         int i;
515         unsigned long cs_pin;
516         short enable_spi0 = 0;
517         short enable_spi1 = 0;
518
519         /* Choose SPI chip-selects */
520         for (i = 0; i < nr_devices; i++) {
521                 if (devices[i].controller_data)
522                         cs_pin = (unsigned long) devices[i].controller_data;
523                 else if (devices[i].bus_num == 0)
524                         cs_pin = spi0_standard_cs[devices[i].chip_select];
525                 else
526                         cs_pin = spi1_standard_cs[devices[i].chip_select];
527
528                 if (!gpio_is_valid(cs_pin))
529                         continue;
530
531                 if (devices[i].bus_num == 0)
532                         enable_spi0 = 1;
533                 else
534                         enable_spi1 = 1;
535
536                 /* enable chip-select pin */
537                 at91_set_gpio_output(cs_pin, 1);
538
539                 /* pass chip-select pin to driver */
540                 devices[i].controller_data = (void *) cs_pin;
541         }
542
543         spi_register_board_info(devices, nr_devices);
544
545         /* Configure SPI bus(es) */
546         if (enable_spi0) {
547                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
548                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
549                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
550
551                 platform_device_register(&at91sam9260_spi0_device);
552         }
553         if (enable_spi1) {
554                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
555                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
556                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
557
558                 platform_device_register(&at91sam9260_spi1_device);
559         }
560 }
561 #else
562 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
563 #endif
564
565
566 /* --------------------------------------------------------------------
567  *  Timer/Counter blocks
568  * -------------------------------------------------------------------- */
569
570 #ifdef CONFIG_ATMEL_TCLIB
571
572 static struct resource tcb0_resources[] = {
573         [0] = {
574                 .start  = AT91SAM9260_BASE_TCB0,
575                 .end    = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
576                 .flags  = IORESOURCE_MEM,
577         },
578         [1] = {
579                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
580                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
581                 .flags  = IORESOURCE_IRQ,
582         },
583         [2] = {
584                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
585                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
586                 .flags  = IORESOURCE_IRQ,
587         },
588         [3] = {
589                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
590                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
591                 .flags  = IORESOURCE_IRQ,
592         },
593 };
594
595 static struct platform_device at91sam9260_tcb0_device = {
596         .name           = "atmel_tcb",
597         .id             = 0,
598         .resource       = tcb0_resources,
599         .num_resources  = ARRAY_SIZE(tcb0_resources),
600 };
601
602 static struct resource tcb1_resources[] = {
603         [0] = {
604                 .start  = AT91SAM9260_BASE_TCB1,
605                 .end    = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
606                 .flags  = IORESOURCE_MEM,
607         },
608         [1] = {
609                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
610                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
611                 .flags  = IORESOURCE_IRQ,
612         },
613         [2] = {
614                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
615                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
616                 .flags  = IORESOURCE_IRQ,
617         },
618         [3] = {
619                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
620                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
621                 .flags  = IORESOURCE_IRQ,
622         },
623 };
624
625 static struct platform_device at91sam9260_tcb1_device = {
626         .name           = "atmel_tcb",
627         .id             = 1,
628         .resource       = tcb1_resources,
629         .num_resources  = ARRAY_SIZE(tcb1_resources),
630 };
631
632 static void __init at91_add_device_tc(void)
633 {
634         platform_device_register(&at91sam9260_tcb0_device);
635         platform_device_register(&at91sam9260_tcb1_device);
636 }
637 #else
638 static void __init at91_add_device_tc(void) { }
639 #endif
640
641
642 /* --------------------------------------------------------------------
643  *  RTT
644  * -------------------------------------------------------------------- */
645
646 static struct resource rtt_resources[] = {
647         {
648                 .start  = AT91SAM9260_BASE_RTT,
649                 .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
650                 .flags  = IORESOURCE_MEM,
651         }, {
652                 .flags  = IORESOURCE_MEM,
653         }, {
654                 .flags  = IORESOURCE_IRQ,
655         },
656 };
657
658 static struct platform_device at91sam9260_rtt_device = {
659         .name           = "at91_rtt",
660         .id             = 0,
661         .resource       = rtt_resources,
662 };
663
664
665 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
666 static void __init at91_add_device_rtt_rtc(void)
667 {
668         at91sam9260_rtt_device.name = "rtc-at91sam9";
669         /*
670          * The second resource is needed:
671          * GPBR will serve as the storage for RTC time offset
672          */
673         at91sam9260_rtt_device.num_resources = 3;
674         rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
675                                  4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
676         rtt_resources[1].end = rtt_resources[1].start + 3;
677         rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
678         rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
679 }
680 #else
681 static void __init at91_add_device_rtt_rtc(void)
682 {
683         /* Only one resource is needed: RTT not used as RTC */
684         at91sam9260_rtt_device.num_resources = 1;
685 }
686 #endif
687
688 static void __init at91_add_device_rtt(void)
689 {
690         at91_add_device_rtt_rtc();
691         platform_device_register(&at91sam9260_rtt_device);
692 }
693
694
695 /* --------------------------------------------------------------------
696  *  Watchdog
697  * -------------------------------------------------------------------- */
698
699 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
700 static struct resource wdt_resources[] = {
701         {
702                 .start  = AT91SAM9260_BASE_WDT,
703                 .end    = AT91SAM9260_BASE_WDT + SZ_16 - 1,
704                 .flags  = IORESOURCE_MEM,
705         }
706 };
707
708 static struct platform_device at91sam9260_wdt_device = {
709         .name           = "at91_wdt",
710         .id             = -1,
711         .resource       = wdt_resources,
712         .num_resources  = ARRAY_SIZE(wdt_resources),
713 };
714
715 static void __init at91_add_device_watchdog(void)
716 {
717         platform_device_register(&at91sam9260_wdt_device);
718 }
719 #else
720 static void __init at91_add_device_watchdog(void) {}
721 #endif
722
723
724 /* --------------------------------------------------------------------
725  *  SSC -- Synchronous Serial Controller
726  * -------------------------------------------------------------------- */
727
728 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
729 static u64 ssc_dmamask = DMA_BIT_MASK(32);
730
731 static struct resource ssc_resources[] = {
732         [0] = {
733                 .start  = AT91SAM9260_BASE_SSC,
734                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
735                 .flags  = IORESOURCE_MEM,
736         },
737         [1] = {
738                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
739                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
740                 .flags  = IORESOURCE_IRQ,
741         },
742 };
743
744 static struct platform_device at91sam9260_ssc_device = {
745         .name   = "ssc",
746         .id     = 0,
747         .dev    = {
748                 .dma_mask               = &ssc_dmamask,
749                 .coherent_dma_mask      = DMA_BIT_MASK(32),
750         },
751         .resource       = ssc_resources,
752         .num_resources  = ARRAY_SIZE(ssc_resources),
753 };
754
755 static inline void configure_ssc_pins(unsigned pins)
756 {
757         if (pins & ATMEL_SSC_TF)
758                 at91_set_A_periph(AT91_PIN_PB17, 1);
759         if (pins & ATMEL_SSC_TK)
760                 at91_set_A_periph(AT91_PIN_PB16, 1);
761         if (pins & ATMEL_SSC_TD)
762                 at91_set_A_periph(AT91_PIN_PB18, 1);
763         if (pins & ATMEL_SSC_RD)
764                 at91_set_A_periph(AT91_PIN_PB19, 1);
765         if (pins & ATMEL_SSC_RK)
766                 at91_set_A_periph(AT91_PIN_PB20, 1);
767         if (pins & ATMEL_SSC_RF)
768                 at91_set_A_periph(AT91_PIN_PB21, 1);
769 }
770
771 /*
772  * SSC controllers are accessed through library code, instead of any
773  * kind of all-singing/all-dancing driver.  For example one could be
774  * used by a particular I2S audio codec's driver, while another one
775  * on the same system might be used by a custom data capture driver.
776  */
777 void __init at91_add_device_ssc(unsigned id, unsigned pins)
778 {
779         struct platform_device *pdev;
780
781         /*
782          * NOTE: caller is responsible for passing information matching
783          * "pins" to whatever will be using each particular controller.
784          */
785         switch (id) {
786         case AT91SAM9260_ID_SSC:
787                 pdev = &at91sam9260_ssc_device;
788                 configure_ssc_pins(pins);
789                 break;
790         default:
791                 return;
792         }
793
794         platform_device_register(pdev);
795 }
796
797 #else
798 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
799 #endif
800
801
802 /* --------------------------------------------------------------------
803  *  UART
804  * -------------------------------------------------------------------- */
805 #if defined(CONFIG_SERIAL_ATMEL)
806 static struct resource dbgu_resources[] = {
807         [0] = {
808                 .start  = AT91SAM9260_BASE_DBGU,
809                 .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
810                 .flags  = IORESOURCE_MEM,
811         },
812         [1] = {
813                 .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
814                 .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
815                 .flags  = IORESOURCE_IRQ,
816         },
817 };
818
819 static struct atmel_uart_data dbgu_data = {
820         .use_dma_tx     = 0,
821         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
822 };
823
824 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
825
826 static struct platform_device at91sam9260_dbgu_device = {
827         .name           = "atmel_usart",
828         .id             = 0,
829         .dev            = {
830                                 .dma_mask               = &dbgu_dmamask,
831                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
832                                 .platform_data          = &dbgu_data,
833         },
834         .resource       = dbgu_resources,
835         .num_resources  = ARRAY_SIZE(dbgu_resources),
836 };
837
838 static inline void configure_dbgu_pins(void)
839 {
840         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
841         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
842 }
843
844 static struct resource uart0_resources[] = {
845         [0] = {
846                 .start  = AT91SAM9260_BASE_US0,
847                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
848                 .flags  = IORESOURCE_MEM,
849         },
850         [1] = {
851                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
852                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
853                 .flags  = IORESOURCE_IRQ,
854         },
855 };
856
857 static struct atmel_uart_data uart0_data = {
858         .use_dma_tx     = 1,
859         .use_dma_rx     = 1,
860 };
861
862 static u64 uart0_dmamask = DMA_BIT_MASK(32);
863
864 static struct platform_device at91sam9260_uart0_device = {
865         .name           = "atmel_usart",
866         .id             = 1,
867         .dev            = {
868                                 .dma_mask               = &uart0_dmamask,
869                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
870                                 .platform_data          = &uart0_data,
871         },
872         .resource       = uart0_resources,
873         .num_resources  = ARRAY_SIZE(uart0_resources),
874 };
875
876 static inline void configure_usart0_pins(unsigned pins)
877 {
878         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
879         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
880
881         if (pins & ATMEL_UART_RTS)
882                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
883         if (pins & ATMEL_UART_CTS)
884                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
885         if (pins & ATMEL_UART_DTR)
886                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
887         if (pins & ATMEL_UART_DSR)
888                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
889         if (pins & ATMEL_UART_DCD)
890                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
891         if (pins & ATMEL_UART_RI)
892                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
893 }
894
895 static struct resource uart1_resources[] = {
896         [0] = {
897                 .start  = AT91SAM9260_BASE_US1,
898                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
899                 .flags  = IORESOURCE_MEM,
900         },
901         [1] = {
902                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
903                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
904                 .flags  = IORESOURCE_IRQ,
905         },
906 };
907
908 static struct atmel_uart_data uart1_data = {
909         .use_dma_tx     = 1,
910         .use_dma_rx     = 1,
911 };
912
913 static u64 uart1_dmamask = DMA_BIT_MASK(32);
914
915 static struct platform_device at91sam9260_uart1_device = {
916         .name           = "atmel_usart",
917         .id             = 2,
918         .dev            = {
919                                 .dma_mask               = &uart1_dmamask,
920                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
921                                 .platform_data          = &uart1_data,
922         },
923         .resource       = uart1_resources,
924         .num_resources  = ARRAY_SIZE(uart1_resources),
925 };
926
927 static inline void configure_usart1_pins(unsigned pins)
928 {
929         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
930         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
931
932         if (pins & ATMEL_UART_RTS)
933                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
934         if (pins & ATMEL_UART_CTS)
935                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
936 }
937
938 static struct resource uart2_resources[] = {
939         [0] = {
940                 .start  = AT91SAM9260_BASE_US2,
941                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
942                 .flags  = IORESOURCE_MEM,
943         },
944         [1] = {
945                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
946                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
947                 .flags  = IORESOURCE_IRQ,
948         },
949 };
950
951 static struct atmel_uart_data uart2_data = {
952         .use_dma_tx     = 1,
953         .use_dma_rx     = 1,
954 };
955
956 static u64 uart2_dmamask = DMA_BIT_MASK(32);
957
958 static struct platform_device at91sam9260_uart2_device = {
959         .name           = "atmel_usart",
960         .id             = 3,
961         .dev            = {
962                                 .dma_mask               = &uart2_dmamask,
963                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
964                                 .platform_data          = &uart2_data,
965         },
966         .resource       = uart2_resources,
967         .num_resources  = ARRAY_SIZE(uart2_resources),
968 };
969
970 static inline void configure_usart2_pins(unsigned pins)
971 {
972         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
973         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
974
975         if (pins & ATMEL_UART_RTS)
976                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
977         if (pins & ATMEL_UART_CTS)
978                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
979 }
980
981 static struct resource uart3_resources[] = {
982         [0] = {
983                 .start  = AT91SAM9260_BASE_US3,
984                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
985                 .flags  = IORESOURCE_MEM,
986         },
987         [1] = {
988                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
989                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
990                 .flags  = IORESOURCE_IRQ,
991         },
992 };
993
994 static struct atmel_uart_data uart3_data = {
995         .use_dma_tx     = 1,
996         .use_dma_rx     = 1,
997 };
998
999 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1000
1001 static struct platform_device at91sam9260_uart3_device = {
1002         .name           = "atmel_usart",
1003         .id             = 4,
1004         .dev            = {
1005                                 .dma_mask               = &uart3_dmamask,
1006                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1007                                 .platform_data          = &uart3_data,
1008         },
1009         .resource       = uart3_resources,
1010         .num_resources  = ARRAY_SIZE(uart3_resources),
1011 };
1012
1013 static inline void configure_usart3_pins(unsigned pins)
1014 {
1015         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
1016         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
1017
1018         if (pins & ATMEL_UART_RTS)
1019                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
1020         if (pins & ATMEL_UART_CTS)
1021                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
1022 }
1023
1024 static struct resource uart4_resources[] = {
1025         [0] = {
1026                 .start  = AT91SAM9260_BASE_US4,
1027                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1028                 .flags  = IORESOURCE_MEM,
1029         },
1030         [1] = {
1031                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1032                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1033                 .flags  = IORESOURCE_IRQ,
1034         },
1035 };
1036
1037 static struct atmel_uart_data uart4_data = {
1038         .use_dma_tx     = 1,
1039         .use_dma_rx     = 1,
1040 };
1041
1042 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1043
1044 static struct platform_device at91sam9260_uart4_device = {
1045         .name           = "atmel_usart",
1046         .id             = 5,
1047         .dev            = {
1048                                 .dma_mask               = &uart4_dmamask,
1049                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1050                                 .platform_data          = &uart4_data,
1051         },
1052         .resource       = uart4_resources,
1053         .num_resources  = ARRAY_SIZE(uart4_resources),
1054 };
1055
1056 static inline void configure_usart4_pins(void)
1057 {
1058         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1059         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1060 }
1061
1062 static struct resource uart5_resources[] = {
1063         [0] = {
1064                 .start  = AT91SAM9260_BASE_US5,
1065                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1066                 .flags  = IORESOURCE_MEM,
1067         },
1068         [1] = {
1069                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1070                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1071                 .flags  = IORESOURCE_IRQ,
1072         },
1073 };
1074
1075 static struct atmel_uart_data uart5_data = {
1076         .use_dma_tx     = 1,
1077         .use_dma_rx     = 1,
1078 };
1079
1080 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1081
1082 static struct platform_device at91sam9260_uart5_device = {
1083         .name           = "atmel_usart",
1084         .id             = 6,
1085         .dev            = {
1086                                 .dma_mask               = &uart5_dmamask,
1087                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1088                                 .platform_data          = &uart5_data,
1089         },
1090         .resource       = uart5_resources,
1091         .num_resources  = ARRAY_SIZE(uart5_resources),
1092 };
1093
1094 static inline void configure_usart5_pins(void)
1095 {
1096         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1097         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1098 }
1099
1100 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1101
1102 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1103 {
1104         struct platform_device *pdev;
1105         struct atmel_uart_data *pdata;
1106
1107         switch (id) {
1108                 case 0:         /* DBGU */
1109                         pdev = &at91sam9260_dbgu_device;
1110                         configure_dbgu_pins();
1111                         break;
1112                 case AT91SAM9260_ID_US0:
1113                         pdev = &at91sam9260_uart0_device;
1114                         configure_usart0_pins(pins);
1115                         break;
1116                 case AT91SAM9260_ID_US1:
1117                         pdev = &at91sam9260_uart1_device;
1118                         configure_usart1_pins(pins);
1119                         break;
1120                 case AT91SAM9260_ID_US2:
1121                         pdev = &at91sam9260_uart2_device;
1122                         configure_usart2_pins(pins);
1123                         break;
1124                 case AT91SAM9260_ID_US3:
1125                         pdev = &at91sam9260_uart3_device;
1126                         configure_usart3_pins(pins);
1127                         break;
1128                 case AT91SAM9260_ID_US4:
1129                         pdev = &at91sam9260_uart4_device;
1130                         configure_usart4_pins();
1131                         break;
1132                 case AT91SAM9260_ID_US5:
1133                         pdev = &at91sam9260_uart5_device;
1134                         configure_usart5_pins();
1135                         break;
1136                 default:
1137                         return;
1138         }
1139         pdata = pdev->dev.platform_data;
1140         pdata->num = portnr;            /* update to mapped ID */
1141
1142         if (portnr < ATMEL_MAX_UART)
1143                 at91_uarts[portnr] = pdev;
1144 }
1145
1146 void __init at91_add_device_serial(void)
1147 {
1148         int i;
1149
1150         for (i = 0; i < ATMEL_MAX_UART; i++) {
1151                 if (at91_uarts[i])
1152                         platform_device_register(at91_uarts[i]);
1153         }
1154 }
1155 #else
1156 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1157 void __init at91_add_device_serial(void) {}
1158 #endif
1159
1160 /* --------------------------------------------------------------------
1161  *  CF/IDE
1162  * -------------------------------------------------------------------- */
1163
1164 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1165         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1166
1167 static struct at91_cf_data cf0_data;
1168
1169 static struct resource cf0_resources[] = {
1170         [0] = {
1171                 .start  = AT91_CHIPSELECT_4,
1172                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
1173                 .flags  = IORESOURCE_MEM,
1174         }
1175 };
1176
1177 static struct platform_device cf0_device = {
1178         .id             = 0,
1179         .dev            = {
1180                                 .platform_data  = &cf0_data,
1181         },
1182         .resource       = cf0_resources,
1183         .num_resources  = ARRAY_SIZE(cf0_resources),
1184 };
1185
1186 static struct at91_cf_data cf1_data;
1187
1188 static struct resource cf1_resources[] = {
1189         [0] = {
1190                 .start  = AT91_CHIPSELECT_5,
1191                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
1192                 .flags  = IORESOURCE_MEM,
1193         }
1194 };
1195
1196 static struct platform_device cf1_device = {
1197         .id             = 1,
1198         .dev            = {
1199                                 .platform_data  = &cf1_data,
1200         },
1201         .resource       = cf1_resources,
1202         .num_resources  = ARRAY_SIZE(cf1_resources),
1203 };
1204
1205 void __init at91_add_device_cf(struct at91_cf_data *data)
1206 {
1207         struct platform_device *pdev;
1208         unsigned long csa;
1209
1210         if (!data)
1211                 return;
1212
1213         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1214
1215         switch (data->chipselect) {
1216         case 4:
1217                 at91_set_multi_drive(AT91_PIN_PC8, 0);
1218                 at91_set_A_periph(AT91_PIN_PC8, 0);
1219                 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1220                 cf0_data = *data;
1221                 pdev = &cf0_device;
1222                 break;
1223         case 5:
1224                 at91_set_multi_drive(AT91_PIN_PC9, 0);
1225                 at91_set_A_periph(AT91_PIN_PC9, 0);
1226                 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1227                 cf1_data = *data;
1228                 pdev = &cf1_device;
1229                 break;
1230         default:
1231                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1232                        data->chipselect);
1233                 return;
1234         }
1235
1236         at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1237
1238         if (gpio_is_valid(data->rst_pin)) {
1239                 at91_set_multi_drive(data->rst_pin, 0);
1240                 at91_set_gpio_output(data->rst_pin, 1);
1241         }
1242
1243         if (gpio_is_valid(data->irq_pin)) {
1244                 at91_set_gpio_input(data->irq_pin, 0);
1245                 at91_set_deglitch(data->irq_pin, 1);
1246         }
1247
1248         if (gpio_is_valid(data->det_pin)) {
1249                 at91_set_gpio_input(data->det_pin, 0);
1250                 at91_set_deglitch(data->det_pin, 1);
1251         }
1252
1253         at91_set_B_periph(AT91_PIN_PC6, 0);     /* CFCE1 */
1254         at91_set_B_periph(AT91_PIN_PC7, 0);     /* CFCE2 */
1255         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
1256         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
1257
1258         if (data->flags & AT91_CF_TRUE_IDE)
1259 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1260                 pdev->name = "pata_at91";
1261 #else
1262 #warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
1263 #endif
1264         else
1265                 pdev->name = "at91_cf";
1266
1267         platform_device_register(pdev);
1268 }
1269
1270 #else
1271 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1272 #endif
1273
1274 /* --------------------------------------------------------------------
1275  *  ADCs
1276  * -------------------------------------------------------------------- */
1277
1278 #if IS_ENABLED(CONFIG_AT91_ADC)
1279 static struct at91_adc_data adc_data;
1280
1281 static struct resource adc_resources[] = {
1282         [0] = {
1283                 .start  = AT91SAM9260_BASE_ADC,
1284                 .end    = AT91SAM9260_BASE_ADC + SZ_16K - 1,
1285                 .flags  = IORESOURCE_MEM,
1286         },
1287         [1] = {
1288                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1289                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1290                 .flags  = IORESOURCE_IRQ,
1291         },
1292 };
1293
1294 static struct platform_device at91_adc_device = {
1295         .name           = "at91_adc",
1296         .id             = -1,
1297         .dev            = {
1298                                 .platform_data          = &adc_data,
1299         },
1300         .resource       = adc_resources,
1301         .num_resources  = ARRAY_SIZE(adc_resources),
1302 };
1303
1304 static struct at91_adc_trigger at91_adc_triggers[] = {
1305         [0] = {
1306                 .name = "timer-counter-0",
1307                 .value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN,
1308         },
1309         [1] = {
1310                 .name = "timer-counter-1",
1311                 .value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN,
1312         },
1313         [2] = {
1314                 .name = "timer-counter-2",
1315                 .value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN,
1316         },
1317         [3] = {
1318                 .name = "external",
1319                 .value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN,
1320                 .is_external = true,
1321         },
1322 };
1323
1324 static struct at91_adc_reg_desc at91_adc_register_g20 = {
1325         .channel_base = AT91_ADC_CHR(0),
1326         .drdy_mask = AT91_ADC_DRDY,
1327         .status_register = AT91_ADC_SR,
1328         .trigger_register = AT91_ADC_MR,
1329 };
1330
1331 void __init at91_add_device_adc(struct at91_adc_data *data)
1332 {
1333         if (!data)
1334                 return;
1335
1336         if (test_bit(0, &data->channels_used))
1337                 at91_set_A_periph(AT91_PIN_PC0, 0);
1338         if (test_bit(1, &data->channels_used))
1339                 at91_set_A_periph(AT91_PIN_PC1, 0);
1340         if (test_bit(2, &data->channels_used))
1341                 at91_set_A_periph(AT91_PIN_PC2, 0);
1342         if (test_bit(3, &data->channels_used))
1343                 at91_set_A_periph(AT91_PIN_PC3, 0);
1344
1345         if (data->use_external_triggers)
1346                 at91_set_A_periph(AT91_PIN_PA22, 0);
1347
1348         data->num_channels = 4;
1349         data->startup_time = 10;
1350         data->registers = &at91_adc_register_g20;
1351         data->trigger_number = 4;
1352         data->trigger_list = at91_adc_triggers;
1353
1354         adc_data = *data;
1355         platform_device_register(&at91_adc_device);
1356 }
1357 #else
1358 void __init at91_add_device_adc(struct at91_adc_data *data) {}
1359 #endif
1360
1361 /* -------------------------------------------------------------------- */
1362 /*
1363  * These devices are always present and don't need any board-specific
1364  * setup.
1365  */
1366 static int __init at91_add_standard_devices(void)
1367 {
1368         if (of_have_populated_dt())
1369                 return 0;
1370
1371         at91_add_device_rtt();
1372         at91_add_device_watchdog();
1373         at91_add_device_tc();
1374         return 0;
1375 }
1376
1377 arch_initcall(at91_add_standard_devices);