Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux
[~shefty/rdma-dev.git] / arch / arm / mach-at91 / at91sam9263_devices.c
1 /*
2  * arch/arm/mach-at91/at91sam9263_devices.c
3  *
4  *  Copyright (C) 2007 Atmel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <linux/fb.h>
21 #include <video/atmel_lcdc.h>
22
23 #include <mach/board.h>
24 #include <mach/at91sam9263.h>
25 #include <mach/at91sam9263_matrix.h>
26 #include <mach/at91_matrix.h>
27 #include <mach/at91sam9_smc.h>
28
29 #include "generic.h"
30
31
32 /* --------------------------------------------------------------------
33  *  USB Host
34  * -------------------------------------------------------------------- */
35
36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
37 static u64 ohci_dmamask = DMA_BIT_MASK(32);
38 static struct at91_usbh_data usbh_data;
39
40 static struct resource usbh_resources[] = {
41         [0] = {
42                 .start  = AT91SAM9263_UHP_BASE,
43                 .end    = AT91SAM9263_UHP_BASE + SZ_1M - 1,
44                 .flags  = IORESOURCE_MEM,
45         },
46         [1] = {
47                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
48                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
49                 .flags  = IORESOURCE_IRQ,
50         },
51 };
52
53 static struct platform_device at91_usbh_device = {
54         .name           = "at91_ohci",
55         .id             = -1,
56         .dev            = {
57                                 .dma_mask               = &ohci_dmamask,
58                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
59                                 .platform_data          = &usbh_data,
60         },
61         .resource       = usbh_resources,
62         .num_resources  = ARRAY_SIZE(usbh_resources),
63 };
64
65 void __init at91_add_device_usbh(struct at91_usbh_data *data)
66 {
67         int i;
68
69         if (!data)
70                 return;
71
72         /* Enable VBus control for UHP ports */
73         for (i = 0; i < data->ports; i++) {
74                 if (gpio_is_valid(data->vbus_pin[i]))
75                         at91_set_gpio_output(data->vbus_pin[i],
76                                              data->vbus_pin_active_low[i]);
77         }
78
79         /* Enable overcurrent notification */
80         for (i = 0; i < data->ports; i++) {
81                 if (data->overcurrent_pin[i])
82                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
83         }
84
85         usbh_data = *data;
86         platform_device_register(&at91_usbh_device);
87 }
88 #else
89 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
90 #endif
91
92
93 /* --------------------------------------------------------------------
94  *  USB Device (Gadget)
95  * -------------------------------------------------------------------- */
96
97 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
98 static struct at91_udc_data udc_data;
99
100 static struct resource udc_resources[] = {
101         [0] = {
102                 .start  = AT91SAM9263_BASE_UDP,
103                 .end    = AT91SAM9263_BASE_UDP + SZ_16K - 1,
104                 .flags  = IORESOURCE_MEM,
105         },
106         [1] = {
107                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
108                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
109                 .flags  = IORESOURCE_IRQ,
110         },
111 };
112
113 static struct platform_device at91_udc_device = {
114         .name           = "at91_udc",
115         .id             = -1,
116         .dev            = {
117                                 .platform_data          = &udc_data,
118         },
119         .resource       = udc_resources,
120         .num_resources  = ARRAY_SIZE(udc_resources),
121 };
122
123 void __init at91_add_device_udc(struct at91_udc_data *data)
124 {
125         if (!data)
126                 return;
127
128         if (gpio_is_valid(data->vbus_pin)) {
129                 at91_set_gpio_input(data->vbus_pin, 0);
130                 at91_set_deglitch(data->vbus_pin, 1);
131         }
132
133         /* Pullup pin is handled internally by USB device peripheral */
134
135         udc_data = *data;
136         platform_device_register(&at91_udc_device);
137 }
138 #else
139 void __init at91_add_device_udc(struct at91_udc_data *data) {}
140 #endif
141
142
143 /* --------------------------------------------------------------------
144  *  Ethernet
145  * -------------------------------------------------------------------- */
146
147 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
148 static u64 eth_dmamask = DMA_BIT_MASK(32);
149 static struct macb_platform_data eth_data;
150
151 static struct resource eth_resources[] = {
152         [0] = {
153                 .start  = AT91SAM9263_BASE_EMAC,
154                 .end    = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
155                 .flags  = IORESOURCE_MEM,
156         },
157         [1] = {
158                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
159                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
160                 .flags  = IORESOURCE_IRQ,
161         },
162 };
163
164 static struct platform_device at91sam9263_eth_device = {
165         .name           = "macb",
166         .id             = -1,
167         .dev            = {
168                                 .dma_mask               = &eth_dmamask,
169                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
170                                 .platform_data          = &eth_data,
171         },
172         .resource       = eth_resources,
173         .num_resources  = ARRAY_SIZE(eth_resources),
174 };
175
176 void __init at91_add_device_eth(struct macb_platform_data *data)
177 {
178         if (!data)
179                 return;
180
181         if (gpio_is_valid(data->phy_irq_pin)) {
182                 at91_set_gpio_input(data->phy_irq_pin, 0);
183                 at91_set_deglitch(data->phy_irq_pin, 1);
184         }
185
186         /* Pins used for MII and RMII */
187         at91_set_A_periph(AT91_PIN_PE21, 0);    /* ETXCK_EREFCK */
188         at91_set_B_periph(AT91_PIN_PC25, 0);    /* ERXDV */
189         at91_set_A_periph(AT91_PIN_PE25, 0);    /* ERX0 */
190         at91_set_A_periph(AT91_PIN_PE26, 0);    /* ERX1 */
191         at91_set_A_periph(AT91_PIN_PE27, 0);    /* ERXER */
192         at91_set_A_periph(AT91_PIN_PE28, 0);    /* ETXEN */
193         at91_set_A_periph(AT91_PIN_PE23, 0);    /* ETX0 */
194         at91_set_A_periph(AT91_PIN_PE24, 0);    /* ETX1 */
195         at91_set_A_periph(AT91_PIN_PE30, 0);    /* EMDIO */
196         at91_set_A_periph(AT91_PIN_PE29, 0);    /* EMDC */
197
198         if (!data->is_rmii) {
199                 at91_set_A_periph(AT91_PIN_PE22, 0);    /* ECRS */
200                 at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
201                 at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
202                 at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
203                 at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
204                 at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
205                 at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
206                 at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
207         }
208
209         eth_data = *data;
210         platform_device_register(&at91sam9263_eth_device);
211 }
212 #else
213 void __init at91_add_device_eth(struct macb_platform_data *data) {}
214 #endif
215
216
217 /* --------------------------------------------------------------------
218  *  MMC / SD
219  * -------------------------------------------------------------------- */
220
221 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
222 static u64 mmc_dmamask = DMA_BIT_MASK(32);
223 static struct mci_platform_data mmc0_data, mmc1_data;
224
225 static struct resource mmc0_resources[] = {
226         [0] = {
227                 .start  = AT91SAM9263_BASE_MCI0,
228                 .end    = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
229                 .flags  = IORESOURCE_MEM,
230         },
231         [1] = {
232                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
233                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
234                 .flags  = IORESOURCE_IRQ,
235         },
236 };
237
238 static struct platform_device at91sam9263_mmc0_device = {
239         .name           = "atmel_mci",
240         .id             = 0,
241         .dev            = {
242                                 .dma_mask               = &mmc_dmamask,
243                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
244                                 .platform_data          = &mmc0_data,
245         },
246         .resource       = mmc0_resources,
247         .num_resources  = ARRAY_SIZE(mmc0_resources),
248 };
249
250 static struct resource mmc1_resources[] = {
251         [0] = {
252                 .start  = AT91SAM9263_BASE_MCI1,
253                 .end    = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
254                 .flags  = IORESOURCE_MEM,
255         },
256         [1] = {
257                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
258                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
259                 .flags  = IORESOURCE_IRQ,
260         },
261 };
262
263 static struct platform_device at91sam9263_mmc1_device = {
264         .name           = "atmel_mci",
265         .id             = 1,
266         .dev            = {
267                                 .dma_mask               = &mmc_dmamask,
268                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
269                                 .platform_data          = &mmc1_data,
270         },
271         .resource       = mmc1_resources,
272         .num_resources  = ARRAY_SIZE(mmc1_resources),
273 };
274
275 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
276 {
277         unsigned int i;
278         unsigned int slot_count = 0;
279
280         if (!data)
281                 return;
282
283         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
284
285                 if (!data->slot[i].bus_width)
286                         continue;
287
288                 /* input/irq */
289                 if (gpio_is_valid(data->slot[i].detect_pin)) {
290                         at91_set_gpio_input(data->slot[i].detect_pin,
291                                         1);
292                         at91_set_deglitch(data->slot[i].detect_pin,
293                                         1);
294                 }
295                 if (gpio_is_valid(data->slot[i].wp_pin))
296                         at91_set_gpio_input(data->slot[i].wp_pin, 1);
297
298                 if (mmc_id == 0) {                              /* MCI0 */
299                         switch (i) {
300                         case 0:                                 /* slot A */
301                                 /* CMD */
302                                 at91_set_A_periph(AT91_PIN_PA1, 1);
303                                 /* DAT0, maybe DAT1..DAT3 */
304                                 at91_set_A_periph(AT91_PIN_PA0, 1);
305                                 if (data->slot[i].bus_width == 4) {
306                                         at91_set_A_periph(AT91_PIN_PA3, 1);
307                                         at91_set_A_periph(AT91_PIN_PA4, 1);
308                                         at91_set_A_periph(AT91_PIN_PA5, 1);
309                                 }
310                                 slot_count++;
311                                 break;
312                         case 1:                                 /* slot B */
313                                 /* CMD */
314                                 at91_set_A_periph(AT91_PIN_PA16, 1);
315                                 /* DAT0, maybe DAT1..DAT3 */
316                                 at91_set_A_periph(AT91_PIN_PA17, 1);
317                                 if (data->slot[i].bus_width == 4) {
318                                         at91_set_A_periph(AT91_PIN_PA18, 1);
319                                         at91_set_A_periph(AT91_PIN_PA19, 1);
320                                         at91_set_A_periph(AT91_PIN_PA20, 1);
321                                 }
322                                 slot_count++;
323                                 break;
324                         default:
325                                 printk(KERN_ERR
326                                        "AT91: SD/MMC slot %d not available\n", i);
327                                 break;
328                         }
329                         if (slot_count) {
330                                 /* CLK */
331                                 at91_set_A_periph(AT91_PIN_PA12, 0);
332
333                                 mmc0_data = *data;
334                                 platform_device_register(&at91sam9263_mmc0_device);
335                         }
336                 } else if (mmc_id == 1) {                       /* MCI1 */
337                         switch (i) {
338                         case 0:                                 /* slot A */
339                                 /* CMD */
340                                 at91_set_A_periph(AT91_PIN_PA7, 1);
341                                 /* DAT0, maybe DAT1..DAT3 */
342                                 at91_set_A_periph(AT91_PIN_PA8, 1);
343                                 if (data->slot[i].bus_width == 4) {
344                                         at91_set_A_periph(AT91_PIN_PA9, 1);
345                                         at91_set_A_periph(AT91_PIN_PA10, 1);
346                                         at91_set_A_periph(AT91_PIN_PA11, 1);
347                                 }
348                                 slot_count++;
349                                 break;
350                         case 1:                                 /* slot B */
351                                 /* CMD */
352                                 at91_set_A_periph(AT91_PIN_PA21, 1);
353                                 /* DAT0, maybe DAT1..DAT3 */
354                                 at91_set_A_periph(AT91_PIN_PA22, 1);
355                                 if (data->slot[i].bus_width == 4) {
356                                         at91_set_A_periph(AT91_PIN_PA23, 1);
357                                         at91_set_A_periph(AT91_PIN_PA24, 1);
358                                         at91_set_A_periph(AT91_PIN_PA25, 1);
359                                 }
360                                 slot_count++;
361                                 break;
362                         default:
363                                 printk(KERN_ERR
364                                        "AT91: SD/MMC slot %d not available\n", i);
365                                 break;
366                         }
367                         if (slot_count) {
368                                 /* CLK */
369                                 at91_set_A_periph(AT91_PIN_PA6, 0);
370
371                                 mmc1_data = *data;
372                                 platform_device_register(&at91sam9263_mmc1_device);
373                         }
374                 }
375         }
376 }
377 #else
378 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
379 #endif
380
381 /* --------------------------------------------------------------------
382  *  Compact Flash (PCMCIA or IDE)
383  * -------------------------------------------------------------------- */
384
385 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
386         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
387
388 static struct at91_cf_data cf0_data;
389
390 static struct resource cf0_resources[] = {
391         [0] = {
392                 .start  = AT91_CHIPSELECT_4,
393                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
394                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
395         }
396 };
397
398 static struct platform_device cf0_device = {
399         .id             = 0,
400         .dev            = {
401                                 .platform_data  = &cf0_data,
402         },
403         .resource       = cf0_resources,
404         .num_resources  = ARRAY_SIZE(cf0_resources),
405 };
406
407 static struct at91_cf_data cf1_data;
408
409 static struct resource cf1_resources[] = {
410         [0] = {
411                 .start  = AT91_CHIPSELECT_5,
412                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
413                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
414         }
415 };
416
417 static struct platform_device cf1_device = {
418         .id             = 1,
419         .dev            = {
420                                 .platform_data  = &cf1_data,
421         },
422         .resource       = cf1_resources,
423         .num_resources  = ARRAY_SIZE(cf1_resources),
424 };
425
426 void __init at91_add_device_cf(struct at91_cf_data *data)
427 {
428         unsigned long ebi0_csa;
429         struct platform_device *pdev;
430
431         if (!data)
432                 return;
433
434         /*
435          * assign CS4 or CS5 to SMC with Compact Flash logic support,
436          * we assume SMC timings are configured by board code,
437          * except True IDE where timings are controlled by driver
438          */
439         ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
440         switch (data->chipselect) {
441         case 4:
442                 at91_set_A_periph(AT91_PIN_PD6, 0);  /* EBI0_NCS4/CFCS0 */
443                 ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
444                 cf0_data = *data;
445                 pdev = &cf0_device;
446                 break;
447         case 5:
448                 at91_set_A_periph(AT91_PIN_PD7, 0);  /* EBI0_NCS5/CFCS1 */
449                 ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
450                 cf1_data = *data;
451                 pdev = &cf1_device;
452                 break;
453         default:
454                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
455                        data->chipselect);
456                 return;
457         }
458         at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
459
460         if (gpio_is_valid(data->det_pin)) {
461                 at91_set_gpio_input(data->det_pin, 1);
462                 at91_set_deglitch(data->det_pin, 1);
463         }
464
465         if (gpio_is_valid(data->irq_pin)) {
466                 at91_set_gpio_input(data->irq_pin, 1);
467                 at91_set_deglitch(data->irq_pin, 1);
468         }
469
470         if (gpio_is_valid(data->vcc_pin))
471                 /* initially off */
472                 at91_set_gpio_output(data->vcc_pin, 0);
473
474         /* enable EBI controlled pins */
475         at91_set_A_periph(AT91_PIN_PD5, 1);  /* NWAIT */
476         at91_set_A_periph(AT91_PIN_PD8, 0);  /* CFCE1 */
477         at91_set_A_periph(AT91_PIN_PD9, 0);  /* CFCE2 */
478         at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
479
480         pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "pata_at91" : "at91_cf";
481         platform_device_register(pdev);
482 }
483 #else
484 void __init at91_add_device_cf(struct at91_cf_data *data) {}
485 #endif
486
487 /* --------------------------------------------------------------------
488  *  NAND / SmartMedia
489  * -------------------------------------------------------------------- */
490
491 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
492 static struct atmel_nand_data nand_data;
493
494 #define NAND_BASE       AT91_CHIPSELECT_3
495
496 static struct resource nand_resources[] = {
497         [0] = {
498                 .start  = NAND_BASE,
499                 .end    = NAND_BASE + SZ_256M - 1,
500                 .flags  = IORESOURCE_MEM,
501         },
502         [1] = {
503                 .start  = AT91SAM9263_BASE_ECC0,
504                 .end    = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
505                 .flags  = IORESOURCE_MEM,
506         }
507 };
508
509 static struct platform_device at91sam9263_nand_device = {
510         .name           = "atmel_nand",
511         .id             = -1,
512         .dev            = {
513                                 .platform_data  = &nand_data,
514         },
515         .resource       = nand_resources,
516         .num_resources  = ARRAY_SIZE(nand_resources),
517 };
518
519 void __init at91_add_device_nand(struct atmel_nand_data *data)
520 {
521         unsigned long csa;
522
523         if (!data)
524                 return;
525
526         csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
527         at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
528
529         /* enable pin */
530         if (gpio_is_valid(data->enable_pin))
531                 at91_set_gpio_output(data->enable_pin, 1);
532
533         /* ready/busy pin */
534         if (gpio_is_valid(data->rdy_pin))
535                 at91_set_gpio_input(data->rdy_pin, 1);
536
537         /* card detect pin */
538         if (gpio_is_valid(data->det_pin))
539                 at91_set_gpio_input(data->det_pin, 1);
540
541         nand_data = *data;
542         platform_device_register(&at91sam9263_nand_device);
543 }
544 #else
545 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
546 #endif
547
548
549 /* --------------------------------------------------------------------
550  *  TWI (i2c)
551  * -------------------------------------------------------------------- */
552
553 /*
554  * Prefer the GPIO code since the TWI controller isn't robust
555  * (gets overruns and underruns under load) and can only issue
556  * repeated STARTs in one scenario (the driver doesn't yet handle them).
557  */
558 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
559
560 static struct i2c_gpio_platform_data pdata = {
561         .sda_pin                = AT91_PIN_PB4,
562         .sda_is_open_drain      = 1,
563         .scl_pin                = AT91_PIN_PB5,
564         .scl_is_open_drain      = 1,
565         .udelay                 = 2,            /* ~100 kHz */
566 };
567
568 static struct platform_device at91sam9263_twi_device = {
569         .name                   = "i2c-gpio",
570         .id                     = -1,
571         .dev.platform_data      = &pdata,
572 };
573
574 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
575 {
576         at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
577         at91_set_multi_drive(AT91_PIN_PB4, 1);
578
579         at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
580         at91_set_multi_drive(AT91_PIN_PB5, 1);
581
582         i2c_register_board_info(0, devices, nr_devices);
583         platform_device_register(&at91sam9263_twi_device);
584 }
585
586 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
587
588 static struct resource twi_resources[] = {
589         [0] = {
590                 .start  = AT91SAM9263_BASE_TWI,
591                 .end    = AT91SAM9263_BASE_TWI + SZ_16K - 1,
592                 .flags  = IORESOURCE_MEM,
593         },
594         [1] = {
595                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
596                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
597                 .flags  = IORESOURCE_IRQ,
598         },
599 };
600
601 static struct platform_device at91sam9263_twi_device = {
602         .name           = "i2c-at91sam9260",
603         .id             = -1,
604         .resource       = twi_resources,
605         .num_resources  = ARRAY_SIZE(twi_resources),
606 };
607
608 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
609 {
610         /* pins used for TWI interface */
611         at91_set_A_periph(AT91_PIN_PB4, 0);             /* TWD */
612         at91_set_multi_drive(AT91_PIN_PB4, 1);
613
614         at91_set_A_periph(AT91_PIN_PB5, 0);             /* TWCK */
615         at91_set_multi_drive(AT91_PIN_PB5, 1);
616
617         i2c_register_board_info(0, devices, nr_devices);
618         platform_device_register(&at91sam9263_twi_device);
619 }
620 #else
621 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
622 #endif
623
624
625 /* --------------------------------------------------------------------
626  *  SPI
627  * -------------------------------------------------------------------- */
628
629 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
630 static u64 spi_dmamask = DMA_BIT_MASK(32);
631
632 static struct resource spi0_resources[] = {
633         [0] = {
634                 .start  = AT91SAM9263_BASE_SPI0,
635                 .end    = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
636                 .flags  = IORESOURCE_MEM,
637         },
638         [1] = {
639                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
640                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
641                 .flags  = IORESOURCE_IRQ,
642         },
643 };
644
645 static struct platform_device at91sam9263_spi0_device = {
646         .name           = "atmel_spi",
647         .id             = 0,
648         .dev            = {
649                                 .dma_mask               = &spi_dmamask,
650                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
651         },
652         .resource       = spi0_resources,
653         .num_resources  = ARRAY_SIZE(spi0_resources),
654 };
655
656 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
657
658 static struct resource spi1_resources[] = {
659         [0] = {
660                 .start  = AT91SAM9263_BASE_SPI1,
661                 .end    = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
662                 .flags  = IORESOURCE_MEM,
663         },
664         [1] = {
665                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
666                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
667                 .flags  = IORESOURCE_IRQ,
668         },
669 };
670
671 static struct platform_device at91sam9263_spi1_device = {
672         .name           = "atmel_spi",
673         .id             = 1,
674         .dev            = {
675                                 .dma_mask               = &spi_dmamask,
676                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
677         },
678         .resource       = spi1_resources,
679         .num_resources  = ARRAY_SIZE(spi1_resources),
680 };
681
682 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
683
684 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
685 {
686         int i;
687         unsigned long cs_pin;
688         short enable_spi0 = 0;
689         short enable_spi1 = 0;
690
691         /* Choose SPI chip-selects */
692         for (i = 0; i < nr_devices; i++) {
693                 if (devices[i].controller_data)
694                         cs_pin = (unsigned long) devices[i].controller_data;
695                 else if (devices[i].bus_num == 0)
696                         cs_pin = spi0_standard_cs[devices[i].chip_select];
697                 else
698                         cs_pin = spi1_standard_cs[devices[i].chip_select];
699
700                 if (!gpio_is_valid(cs_pin))
701                         continue;
702
703                 if (devices[i].bus_num == 0)
704                         enable_spi0 = 1;
705                 else
706                         enable_spi1 = 1;
707
708                 /* enable chip-select pin */
709                 at91_set_gpio_output(cs_pin, 1);
710
711                 /* pass chip-select pin to driver */
712                 devices[i].controller_data = (void *) cs_pin;
713         }
714
715         spi_register_board_info(devices, nr_devices);
716
717         /* Configure SPI bus(es) */
718         if (enable_spi0) {
719                 at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
720                 at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
721                 at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
722
723                 platform_device_register(&at91sam9263_spi0_device);
724         }
725         if (enable_spi1) {
726                 at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
727                 at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
728                 at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
729
730                 platform_device_register(&at91sam9263_spi1_device);
731         }
732 }
733 #else
734 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
735 #endif
736
737
738 /* --------------------------------------------------------------------
739  *  AC97
740  * -------------------------------------------------------------------- */
741
742 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
743 static u64 ac97_dmamask = DMA_BIT_MASK(32);
744 static struct ac97c_platform_data ac97_data;
745
746 static struct resource ac97_resources[] = {
747         [0] = {
748                 .start  = AT91SAM9263_BASE_AC97C,
749                 .end    = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
750                 .flags  = IORESOURCE_MEM,
751         },
752         [1] = {
753                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
754                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
755                 .flags  = IORESOURCE_IRQ,
756         },
757 };
758
759 static struct platform_device at91sam9263_ac97_device = {
760         .name           = "atmel_ac97c",
761         .id             = 0,
762         .dev            = {
763                                 .dma_mask               = &ac97_dmamask,
764                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
765                                 .platform_data          = &ac97_data,
766         },
767         .resource       = ac97_resources,
768         .num_resources  = ARRAY_SIZE(ac97_resources),
769 };
770
771 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
772 {
773         if (!data)
774                 return;
775
776         at91_set_A_periph(AT91_PIN_PB0, 0);     /* AC97FS */
777         at91_set_A_periph(AT91_PIN_PB1, 0);     /* AC97CK */
778         at91_set_A_periph(AT91_PIN_PB2, 0);     /* AC97TX */
779         at91_set_A_periph(AT91_PIN_PB3, 0);     /* AC97RX */
780
781         /* reset */
782         if (gpio_is_valid(data->reset_pin))
783                 at91_set_gpio_output(data->reset_pin, 0);
784
785         ac97_data = *data;
786         platform_device_register(&at91sam9263_ac97_device);
787 }
788 #else
789 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
790 #endif
791
792 /* --------------------------------------------------------------------
793  *  CAN Controller
794  * -------------------------------------------------------------------- */
795
796 #if defined(CONFIG_CAN_AT91) || defined(CONFIG_CAN_AT91_MODULE)
797 static struct resource can_resources[] = {
798         [0] = {
799                 .start  = AT91SAM9263_BASE_CAN,
800                 .end    = AT91SAM9263_BASE_CAN + SZ_16K - 1,
801                 .flags  = IORESOURCE_MEM,
802         },
803         [1] = {
804                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
805                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
806                 .flags  = IORESOURCE_IRQ,
807         },
808 };
809
810 static struct platform_device at91sam9263_can_device = {
811         .name           = "at91_can",
812         .id             = -1,
813         .resource       = can_resources,
814         .num_resources  = ARRAY_SIZE(can_resources),
815 };
816
817 void __init at91_add_device_can(struct at91_can_data *data)
818 {
819         at91_set_A_periph(AT91_PIN_PA13, 0);    /* CANTX */
820         at91_set_A_periph(AT91_PIN_PA14, 0);    /* CANRX */
821         at91sam9263_can_device.dev.platform_data = data;
822
823         platform_device_register(&at91sam9263_can_device);
824 }
825 #else
826 void __init at91_add_device_can(struct at91_can_data *data) {}
827 #endif
828
829 /* --------------------------------------------------------------------
830  *  LCD Controller
831  * -------------------------------------------------------------------- */
832
833 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
834 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
835 static struct atmel_lcdfb_info lcdc_data;
836
837 static struct resource lcdc_resources[] = {
838         [0] = {
839                 .start  = AT91SAM9263_LCDC_BASE,
840                 .end    = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
841                 .flags  = IORESOURCE_MEM,
842         },
843         [1] = {
844                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
845                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
846                 .flags  = IORESOURCE_IRQ,
847         },
848 };
849
850 static struct platform_device at91_lcdc_device = {
851         .name           = "atmel_lcdfb",
852         .id             = 0,
853         .dev            = {
854                                 .dma_mask               = &lcdc_dmamask,
855                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
856                                 .platform_data          = &lcdc_data,
857         },
858         .resource       = lcdc_resources,
859         .num_resources  = ARRAY_SIZE(lcdc_resources),
860 };
861
862 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
863 {
864         if (!data)
865                 return;
866
867         at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
868         at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
869         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
870         at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
871         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
872         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
873         at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
874         at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
875         at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
876         at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
877         at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
878         at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
879         at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
880         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD13 */
881         at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
882         at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
883         at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
884         at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
885         at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
886         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD21 */
887         at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
888         at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
889
890         lcdc_data = *data;
891         platform_device_register(&at91_lcdc_device);
892 }
893 #else
894 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
895 #endif
896
897
898 /* --------------------------------------------------------------------
899  *  Image Sensor Interface
900  * -------------------------------------------------------------------- */
901
902 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
903
904 struct resource isi_resources[] = {
905         [0] = {
906                 .start  = AT91SAM9263_BASE_ISI,
907                 .end    = AT91SAM9263_BASE_ISI + SZ_16K - 1,
908                 .flags  = IORESOURCE_MEM,
909         },
910         [1] = {
911                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
912                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
913                 .flags  = IORESOURCE_IRQ,
914         },
915 };
916
917 static struct platform_device at91sam9263_isi_device = {
918         .name           = "at91_isi",
919         .id             = -1,
920         .resource       = isi_resources,
921         .num_resources  = ARRAY_SIZE(isi_resources),
922 };
923
924 void __init at91_add_device_isi(struct isi_platform_data *data,
925                 bool use_pck_as_mck)
926 {
927         at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
928         at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
929         at91_set_A_periph(AT91_PIN_PE2, 0);     /* ISI_D2 */
930         at91_set_A_periph(AT91_PIN_PE3, 0);     /* ISI_D3 */
931         at91_set_A_periph(AT91_PIN_PE4, 0);     /* ISI_D4 */
932         at91_set_A_periph(AT91_PIN_PE5, 0);     /* ISI_D5 */
933         at91_set_A_periph(AT91_PIN_PE6, 0);     /* ISI_D6 */
934         at91_set_A_periph(AT91_PIN_PE7, 0);     /* ISI_D7 */
935         at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
936         at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
937         at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
938         at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
939         at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
940         at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
941         at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
942
943         if (use_pck_as_mck) {
944                 at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
945
946                 /* TODO: register the PCK for ISI_MCK and set its parent */
947         }
948 }
949 #else
950 void __init at91_add_device_isi(struct isi_platform_data *data,
951                 bool use_pck_as_mck) {}
952 #endif
953
954
955 /* --------------------------------------------------------------------
956  *  Timer/Counter block
957  * -------------------------------------------------------------------- */
958
959 #ifdef CONFIG_ATMEL_TCLIB
960
961 static struct resource tcb_resources[] = {
962         [0] = {
963                 .start  = AT91SAM9263_BASE_TCB0,
964                 .end    = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
965                 .flags  = IORESOURCE_MEM,
966         },
967         [1] = {
968                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
969                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
970                 .flags  = IORESOURCE_IRQ,
971         },
972 };
973
974 static struct platform_device at91sam9263_tcb_device = {
975         .name           = "atmel_tcb",
976         .id             = 0,
977         .resource       = tcb_resources,
978         .num_resources  = ARRAY_SIZE(tcb_resources),
979 };
980
981 #if defined(CONFIG_OF)
982 static struct of_device_id tcb_ids[] = {
983         { .compatible = "atmel,at91rm9200-tcb" },
984         { /*sentinel*/ }
985 };
986 #endif
987
988 static void __init at91_add_device_tc(void)
989 {
990 #if defined(CONFIG_OF)
991         struct device_node *np;
992
993         np = of_find_matching_node(NULL, tcb_ids);
994         if (np) {
995                 of_node_put(np);
996                 return;
997         }
998 #endif
999
1000         platform_device_register(&at91sam9263_tcb_device);
1001 }
1002 #else
1003 static void __init at91_add_device_tc(void) { }
1004 #endif
1005
1006
1007 /* --------------------------------------------------------------------
1008  *  RTT
1009  * -------------------------------------------------------------------- */
1010
1011 static struct resource rtt0_resources[] = {
1012         {
1013                 .start  = AT91SAM9263_BASE_RTT0,
1014                 .end    = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
1015                 .flags  = IORESOURCE_MEM,
1016         }, {
1017                 .flags  = IORESOURCE_MEM,
1018         }, {
1019                 .flags  = IORESOURCE_IRQ,
1020         }
1021 };
1022
1023 static struct platform_device at91sam9263_rtt0_device = {
1024         .name           = "at91_rtt",
1025         .id             = 0,
1026         .resource       = rtt0_resources,
1027 };
1028
1029 static struct resource rtt1_resources[] = {
1030         {
1031                 .start  = AT91SAM9263_BASE_RTT1,
1032                 .end    = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
1033                 .flags  = IORESOURCE_MEM,
1034         }, {
1035                 .flags  = IORESOURCE_MEM,
1036         }, {
1037                 .flags  = IORESOURCE_IRQ,
1038         }
1039 };
1040
1041 static struct platform_device at91sam9263_rtt1_device = {
1042         .name           = "at91_rtt",
1043         .id             = 1,
1044         .resource       = rtt1_resources,
1045 };
1046
1047 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
1048 static void __init at91_add_device_rtt_rtc(void)
1049 {
1050         struct platform_device *pdev;
1051         struct resource *r;
1052
1053         switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
1054         case 0:
1055                 /*
1056                  * The second resource is needed only for the chosen RTT:
1057                  * GPBR will serve as the storage for RTC time offset
1058                  */
1059                 at91sam9263_rtt0_device.num_resources = 3;
1060                 at91sam9263_rtt1_device.num_resources = 1;
1061                 pdev = &at91sam9263_rtt0_device;
1062                 r = rtt0_resources;
1063                 break;
1064         case 1:
1065                 at91sam9263_rtt0_device.num_resources = 1;
1066                 at91sam9263_rtt1_device.num_resources = 3;
1067                 pdev = &at91sam9263_rtt1_device;
1068                 r = rtt1_resources;
1069                 break;
1070         default:
1071                 pr_err("at91sam9263: only supports 2 RTT (%d)\n",
1072                        CONFIG_RTC_DRV_AT91SAM9_RTT);
1073                 return;
1074         }
1075
1076         pdev->name = "rtc-at91sam9";
1077         r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
1078         r[1].end = r[1].start + 3;
1079         r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
1080         r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
1081 }
1082 #else
1083 static void __init at91_add_device_rtt_rtc(void)
1084 {
1085         /* Only one resource is needed: RTT not used as RTC */
1086         at91sam9263_rtt0_device.num_resources = 1;
1087         at91sam9263_rtt1_device.num_resources = 1;
1088 }
1089 #endif
1090
1091 static void __init at91_add_device_rtt(void)
1092 {
1093         at91_add_device_rtt_rtc();
1094         platform_device_register(&at91sam9263_rtt0_device);
1095         platform_device_register(&at91sam9263_rtt1_device);
1096 }
1097
1098
1099 /* --------------------------------------------------------------------
1100  *  Watchdog
1101  * -------------------------------------------------------------------- */
1102
1103 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
1104 static struct resource wdt_resources[] = {
1105         {
1106                 .start  = AT91SAM9263_BASE_WDT,
1107                 .end    = AT91SAM9263_BASE_WDT + SZ_16 - 1,
1108                 .flags  = IORESOURCE_MEM,
1109         }
1110 };
1111
1112 static struct platform_device at91sam9263_wdt_device = {
1113         .name           = "at91_wdt",
1114         .id             = -1,
1115         .resource       = wdt_resources,
1116         .num_resources  = ARRAY_SIZE(wdt_resources),
1117 };
1118
1119 static void __init at91_add_device_watchdog(void)
1120 {
1121         platform_device_register(&at91sam9263_wdt_device);
1122 }
1123 #else
1124 static void __init at91_add_device_watchdog(void) {}
1125 #endif
1126
1127
1128 /* --------------------------------------------------------------------
1129  *  PWM
1130  * --------------------------------------------------------------------*/
1131
1132 #if defined(CONFIG_ATMEL_PWM)
1133 static u32 pwm_mask;
1134
1135 static struct resource pwm_resources[] = {
1136         [0] = {
1137                 .start  = AT91SAM9263_BASE_PWMC,
1138                 .end    = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
1139                 .flags  = IORESOURCE_MEM,
1140         },
1141         [1] = {
1142                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1143                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
1144                 .flags  = IORESOURCE_IRQ,
1145         },
1146 };
1147
1148 static struct platform_device at91sam9263_pwm0_device = {
1149         .name   = "atmel_pwm",
1150         .id     = -1,
1151         .dev    = {
1152                 .platform_data          = &pwm_mask,
1153         },
1154         .resource       = pwm_resources,
1155         .num_resources  = ARRAY_SIZE(pwm_resources),
1156 };
1157
1158 void __init at91_add_device_pwm(u32 mask)
1159 {
1160         if (mask & (1 << AT91_PWM0))
1161                 at91_set_B_periph(AT91_PIN_PB7, 1);     /* enable PWM0 */
1162
1163         if (mask & (1 << AT91_PWM1))
1164                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM1 */
1165
1166         if (mask & (1 << AT91_PWM2))
1167                 at91_set_B_periph(AT91_PIN_PC29, 1);    /* enable PWM2 */
1168
1169         if (mask & (1 << AT91_PWM3))
1170                 at91_set_B_periph(AT91_PIN_PB29, 1);    /* enable PWM3 */
1171
1172         pwm_mask = mask;
1173
1174         platform_device_register(&at91sam9263_pwm0_device);
1175 }
1176 #else
1177 void __init at91_add_device_pwm(u32 mask) {}
1178 #endif
1179
1180
1181 /* --------------------------------------------------------------------
1182  *  SSC -- Synchronous Serial Controller
1183  * -------------------------------------------------------------------- */
1184
1185 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
1186 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
1187
1188 static struct resource ssc0_resources[] = {
1189         [0] = {
1190                 .start  = AT91SAM9263_BASE_SSC0,
1191                 .end    = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
1192                 .flags  = IORESOURCE_MEM,
1193         },
1194         [1] = {
1195                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1196                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
1197                 .flags  = IORESOURCE_IRQ,
1198         },
1199 };
1200
1201 static struct platform_device at91sam9263_ssc0_device = {
1202         .name   = "ssc",
1203         .id     = 0,
1204         .dev    = {
1205                 .dma_mask               = &ssc0_dmamask,
1206                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1207         },
1208         .resource       = ssc0_resources,
1209         .num_resources  = ARRAY_SIZE(ssc0_resources),
1210 };
1211
1212 static inline void configure_ssc0_pins(unsigned pins)
1213 {
1214         if (pins & ATMEL_SSC_TF)
1215                 at91_set_B_periph(AT91_PIN_PB0, 1);
1216         if (pins & ATMEL_SSC_TK)
1217                 at91_set_B_periph(AT91_PIN_PB1, 1);
1218         if (pins & ATMEL_SSC_TD)
1219                 at91_set_B_periph(AT91_PIN_PB2, 1);
1220         if (pins & ATMEL_SSC_RD)
1221                 at91_set_B_periph(AT91_PIN_PB3, 1);
1222         if (pins & ATMEL_SSC_RK)
1223                 at91_set_B_periph(AT91_PIN_PB4, 1);
1224         if (pins & ATMEL_SSC_RF)
1225                 at91_set_B_periph(AT91_PIN_PB5, 1);
1226 }
1227
1228 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
1229
1230 static struct resource ssc1_resources[] = {
1231         [0] = {
1232                 .start  = AT91SAM9263_BASE_SSC1,
1233                 .end    = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
1234                 .flags  = IORESOURCE_MEM,
1235         },
1236         [1] = {
1237                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1238                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
1239                 .flags  = IORESOURCE_IRQ,
1240         },
1241 };
1242
1243 static struct platform_device at91sam9263_ssc1_device = {
1244         .name   = "ssc",
1245         .id     = 1,
1246         .dev    = {
1247                 .dma_mask               = &ssc1_dmamask,
1248                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1249         },
1250         .resource       = ssc1_resources,
1251         .num_resources  = ARRAY_SIZE(ssc1_resources),
1252 };
1253
1254 static inline void configure_ssc1_pins(unsigned pins)
1255 {
1256         if (pins & ATMEL_SSC_TF)
1257                 at91_set_A_periph(AT91_PIN_PB6, 1);
1258         if (pins & ATMEL_SSC_TK)
1259                 at91_set_A_periph(AT91_PIN_PB7, 1);
1260         if (pins & ATMEL_SSC_TD)
1261                 at91_set_A_periph(AT91_PIN_PB8, 1);
1262         if (pins & ATMEL_SSC_RD)
1263                 at91_set_A_periph(AT91_PIN_PB9, 1);
1264         if (pins & ATMEL_SSC_RK)
1265                 at91_set_A_periph(AT91_PIN_PB10, 1);
1266         if (pins & ATMEL_SSC_RF)
1267                 at91_set_A_periph(AT91_PIN_PB11, 1);
1268 }
1269
1270 /*
1271  * SSC controllers are accessed through library code, instead of any
1272  * kind of all-singing/all-dancing driver.  For example one could be
1273  * used by a particular I2S audio codec's driver, while another one
1274  * on the same system might be used by a custom data capture driver.
1275  */
1276 void __init at91_add_device_ssc(unsigned id, unsigned pins)
1277 {
1278         struct platform_device *pdev;
1279
1280         /*
1281          * NOTE: caller is responsible for passing information matching
1282          * "pins" to whatever will be using each particular controller.
1283          */
1284         switch (id) {
1285         case AT91SAM9263_ID_SSC0:
1286                 pdev = &at91sam9263_ssc0_device;
1287                 configure_ssc0_pins(pins);
1288                 break;
1289         case AT91SAM9263_ID_SSC1:
1290                 pdev = &at91sam9263_ssc1_device;
1291                 configure_ssc1_pins(pins);
1292                 break;
1293         default:
1294                 return;
1295         }
1296
1297         platform_device_register(pdev);
1298 }
1299
1300 #else
1301 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1302 #endif
1303
1304
1305 /* --------------------------------------------------------------------
1306  *  UART
1307  * -------------------------------------------------------------------- */
1308
1309 #if defined(CONFIG_SERIAL_ATMEL)
1310
1311 static struct resource dbgu_resources[] = {
1312         [0] = {
1313                 .start  = AT91SAM9263_BASE_DBGU,
1314                 .end    = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
1315                 .flags  = IORESOURCE_MEM,
1316         },
1317         [1] = {
1318                 .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
1319                 .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
1320                 .flags  = IORESOURCE_IRQ,
1321         },
1322 };
1323
1324 static struct atmel_uart_data dbgu_data = {
1325         .use_dma_tx     = 0,
1326         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
1327 };
1328
1329 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1330
1331 static struct platform_device at91sam9263_dbgu_device = {
1332         .name           = "atmel_usart",
1333         .id             = 0,
1334         .dev            = {
1335                                 .dma_mask               = &dbgu_dmamask,
1336                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1337                                 .platform_data          = &dbgu_data,
1338         },
1339         .resource       = dbgu_resources,
1340         .num_resources  = ARRAY_SIZE(dbgu_resources),
1341 };
1342
1343 static inline void configure_dbgu_pins(void)
1344 {
1345         at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
1346         at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
1347 }
1348
1349 static struct resource uart0_resources[] = {
1350         [0] = {
1351                 .start  = AT91SAM9263_BASE_US0,
1352                 .end    = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1353                 .flags  = IORESOURCE_MEM,
1354         },
1355         [1] = {
1356                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1357                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
1358                 .flags  = IORESOURCE_IRQ,
1359         },
1360 };
1361
1362 static struct atmel_uart_data uart0_data = {
1363         .use_dma_tx     = 1,
1364         .use_dma_rx     = 1,
1365 };
1366
1367 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1368
1369 static struct platform_device at91sam9263_uart0_device = {
1370         .name           = "atmel_usart",
1371         .id             = 1,
1372         .dev            = {
1373                                 .dma_mask               = &uart0_dmamask,
1374                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1375                                 .platform_data          = &uart0_data,
1376         },
1377         .resource       = uart0_resources,
1378         .num_resources  = ARRAY_SIZE(uart0_resources),
1379 };
1380
1381 static inline void configure_usart0_pins(unsigned pins)
1382 {
1383         at91_set_A_periph(AT91_PIN_PA26, 1);            /* TXD0 */
1384         at91_set_A_periph(AT91_PIN_PA27, 0);            /* RXD0 */
1385
1386         if (pins & ATMEL_UART_RTS)
1387                 at91_set_A_periph(AT91_PIN_PA28, 0);    /* RTS0 */
1388         if (pins & ATMEL_UART_CTS)
1389                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* CTS0 */
1390 }
1391
1392 static struct resource uart1_resources[] = {
1393         [0] = {
1394                 .start  = AT91SAM9263_BASE_US1,
1395                 .end    = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1396                 .flags  = IORESOURCE_MEM,
1397         },
1398         [1] = {
1399                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1400                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
1401                 .flags  = IORESOURCE_IRQ,
1402         },
1403 };
1404
1405 static struct atmel_uart_data uart1_data = {
1406         .use_dma_tx     = 1,
1407         .use_dma_rx     = 1,
1408 };
1409
1410 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1411
1412 static struct platform_device at91sam9263_uart1_device = {
1413         .name           = "atmel_usart",
1414         .id             = 2,
1415         .dev            = {
1416                                 .dma_mask               = &uart1_dmamask,
1417                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1418                                 .platform_data          = &uart1_data,
1419         },
1420         .resource       = uart1_resources,
1421         .num_resources  = ARRAY_SIZE(uart1_resources),
1422 };
1423
1424 static inline void configure_usart1_pins(unsigned pins)
1425 {
1426         at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
1427         at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
1428
1429         if (pins & ATMEL_UART_RTS)
1430                 at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
1431         if (pins & ATMEL_UART_CTS)
1432                 at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
1433 }
1434
1435 static struct resource uart2_resources[] = {
1436         [0] = {
1437                 .start  = AT91SAM9263_BASE_US2,
1438                 .end    = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1439                 .flags  = IORESOURCE_MEM,
1440         },
1441         [1] = {
1442                 .start  = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1443                 .end    = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
1444                 .flags  = IORESOURCE_IRQ,
1445         },
1446 };
1447
1448 static struct atmel_uart_data uart2_data = {
1449         .use_dma_tx     = 1,
1450         .use_dma_rx     = 1,
1451 };
1452
1453 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1454
1455 static struct platform_device at91sam9263_uart2_device = {
1456         .name           = "atmel_usart",
1457         .id             = 3,
1458         .dev            = {
1459                                 .dma_mask               = &uart2_dmamask,
1460                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1461                                 .platform_data          = &uart2_data,
1462         },
1463         .resource       = uart2_resources,
1464         .num_resources  = ARRAY_SIZE(uart2_resources),
1465 };
1466
1467 static inline void configure_usart2_pins(unsigned pins)
1468 {
1469         at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
1470         at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
1471
1472         if (pins & ATMEL_UART_RTS)
1473                 at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
1474         if (pins & ATMEL_UART_CTS)
1475                 at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
1476 }
1477
1478 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1479
1480 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1481 {
1482         struct platform_device *pdev;
1483         struct atmel_uart_data *pdata;
1484
1485         switch (id) {
1486                 case 0:         /* DBGU */
1487                         pdev = &at91sam9263_dbgu_device;
1488                         configure_dbgu_pins();
1489                         break;
1490                 case AT91SAM9263_ID_US0:
1491                         pdev = &at91sam9263_uart0_device;
1492                         configure_usart0_pins(pins);
1493                         break;
1494                 case AT91SAM9263_ID_US1:
1495                         pdev = &at91sam9263_uart1_device;
1496                         configure_usart1_pins(pins);
1497                         break;
1498                 case AT91SAM9263_ID_US2:
1499                         pdev = &at91sam9263_uart2_device;
1500                         configure_usart2_pins(pins);
1501                         break;
1502                 default:
1503                         return;
1504         }
1505         pdata = pdev->dev.platform_data;
1506         pdata->num = portnr;            /* update to mapped ID */
1507
1508         if (portnr < ATMEL_MAX_UART)
1509                 at91_uarts[portnr] = pdev;
1510 }
1511
1512 void __init at91_add_device_serial(void)
1513 {
1514         int i;
1515
1516         for (i = 0; i < ATMEL_MAX_UART; i++) {
1517                 if (at91_uarts[i])
1518                         platform_device_register(at91_uarts[i]);
1519         }
1520 }
1521 #else
1522 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1523 void __init at91_add_device_serial(void) {}
1524 #endif
1525
1526
1527 /* -------------------------------------------------------------------- */
1528 /*
1529  * These devices are always present and don't need any board-specific
1530  * setup.
1531  */
1532 static int __init at91_add_standard_devices(void)
1533 {
1534         if (of_have_populated_dt())
1535                 return 0;
1536
1537         at91_add_device_rtt();
1538         at91_add_device_watchdog();
1539         at91_add_device_tc();
1540         return 0;
1541 }
1542
1543 arch_initcall(at91_add_standard_devices);