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1 /* linux/arch/arm/plat-s3c24xx/gpiolib.c
2  *
3  * Copyright (c) 2008-2010 Simtec Electronics
4  *      http://armlinux.simtec.co.uk/
5  *      Ben Dooks <ben@simtec.co.uk>
6  *
7  * S3C24XX GPIOlib support
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/sysdev.h>
19 #include <linux/ioport.h>
20 #include <linux/io.h>
21 #include <linux/gpio.h>
22
23 #include <plat/gpio-core.h>
24 #include <plat/gpio-cfg.h>
25 #include <plat/gpio-cfg-helpers.h>
26 #include <mach/hardware.h>
27 #include <asm/irq.h>
28 #include <plat/pm.h>
29
30 #include <mach/regs-gpio.h>
31
32 static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
33 {
34         return -EINVAL;
35 }
36
37 static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
38                                         unsigned offset, int value)
39 {
40         struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
41         void __iomem *base = ourchip->base;
42         unsigned long flags;
43         unsigned long dat;
44         unsigned long con;
45
46         local_irq_save(flags);
47
48         con = __raw_readl(base + 0x00);
49         dat = __raw_readl(base + 0x04);
50
51         dat &= ~(1 << offset);
52         if (value)
53                 dat |= 1 << offset;
54
55         __raw_writel(dat, base + 0x04);
56
57         con &= ~(1 << offset);
58
59         __raw_writel(con, base + 0x00);
60         __raw_writel(dat, base + 0x04);
61
62         local_irq_restore(flags);
63         return 0;
64 }
65
66 static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
67 {
68         if (offset < 4)
69                 return IRQ_EINT0 + offset;
70         
71         if (offset < 8)
72                 return IRQ_EINT4 + offset - 4;
73         
74         return -EINVAL;
75 }
76
77 static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
78 {
79         return IRQ_EINT8 + offset;
80 }
81
82 static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
83         .set_config     = s3c_gpio_setcfg_s3c24xx_a,
84         .get_config     = s3c_gpio_getcfg_s3c24xx_a,
85 };
86
87 struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
88         .set_config     = s3c_gpio_setcfg_s3c24xx,
89         .get_config     = s3c_gpio_getcfg_s3c24xx,
90         .set_pull       = s3c_gpio_setpull_1up,
91         .get_pull       = s3c_gpio_getpull_1up,
92 };
93
94 struct s3c_gpio_chip s3c24xx_gpios[] = {
95         [0] = {
96                 .base   = S3C2410_GPACON,
97                 .pm     = __gpio_pm(&s3c_gpio_pm_1bit),
98                 .config = &s3c24xx_gpiocfg_banka,
99                 .chip   = {
100                         .base                   = S3C2410_GPA(0),
101                         .owner                  = THIS_MODULE,
102                         .label                  = "GPIOA",
103                         .ngpio                  = 24,
104                         .direction_input        = s3c24xx_gpiolib_banka_input,
105                         .direction_output       = s3c24xx_gpiolib_banka_output,
106                 },
107         },
108         [1] = {
109                 .base   = S3C2410_GPBCON,
110                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
111                 .chip   = {
112                         .base                   = S3C2410_GPB(0),
113                         .owner                  = THIS_MODULE,
114                         .label                  = "GPIOB",
115                         .ngpio                  = 16,
116                 },
117         },
118         [2] = {
119                 .base   = S3C2410_GPCCON,
120                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
121                 .chip   = {
122                         .base                   = S3C2410_GPC(0),
123                         .owner                  = THIS_MODULE,
124                         .label                  = "GPIOC",
125                         .ngpio                  = 16,
126                 },
127         },
128         [3] = {
129                 .base   = S3C2410_GPDCON,
130                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
131                 .chip   = {
132                         .base                   = S3C2410_GPD(0),
133                         .owner                  = THIS_MODULE,
134                         .label                  = "GPIOD",
135                         .ngpio                  = 16,
136                 },
137         },
138         [4] = {
139                 .base   = S3C2410_GPECON,
140                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
141                 .chip   = {
142                         .base                   = S3C2410_GPE(0),
143                         .label                  = "GPIOE",
144                         .owner                  = THIS_MODULE,
145                         .ngpio                  = 16,
146                 },
147         },
148         [5] = {
149                 .base   = S3C2410_GPFCON,
150                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
151                 .chip   = {
152                         .base                   = S3C2410_GPF(0),
153                         .owner                  = THIS_MODULE,
154                         .label                  = "GPIOF",
155                         .ngpio                  = 8,
156                         .to_irq                 = s3c24xx_gpiolib_bankf_toirq,
157                 },
158         },
159         [6] = {
160                 .base   = S3C2410_GPGCON,
161                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
162                 .chip   = {
163                         .base                   = S3C2410_GPG(0),
164                         .owner                  = THIS_MODULE,
165                         .label                  = "GPIOG",
166                         .ngpio                  = 16,
167                         .to_irq                 = s3c24xx_gpiolib_bankg_toirq,
168                 },
169         }, {
170                 .base   = S3C2410_GPHCON,
171                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
172                 .chip   = {
173                         .base                   = S3C2410_GPH(0),
174                         .owner                  = THIS_MODULE,
175                         .label                  = "GPIOH",
176                         .ngpio                  = 11,
177                 },
178         },
179                 /* GPIOS for the S3C2443 and later devices. */
180         {
181                 .base   = S3C2440_GPJCON,
182                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
183                 .chip   = {
184                         .base                   = S3C2410_GPJ(0),
185                         .owner                  = THIS_MODULE,
186                         .label                  = "GPIOJ",
187                         .ngpio                  = 16,
188                 },
189         }, {
190                 .base   = S3C2443_GPKCON,
191                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
192                 .chip   = {
193                         .base                   = S3C2410_GPK(0),
194                         .owner                  = THIS_MODULE,
195                         .label                  = "GPIOK",
196                         .ngpio                  = 16,
197                 },
198         }, {
199                 .base   = S3C2443_GPLCON,
200                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
201                 .chip   = {
202                         .base                   = S3C2410_GPL(0),
203                         .owner                  = THIS_MODULE,
204                         .label                  = "GPIOL",
205                         .ngpio                  = 15,
206                 },
207         }, {
208                 .base   = S3C2443_GPMCON,
209                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
210                 .chip   = {
211                         .base                   = S3C2410_GPM(0),
212                         .owner                  = THIS_MODULE,
213                         .label                  = "GPIOM",
214                         .ngpio                  = 2,
215                 },
216         },
217 };
218
219
220 static __init int s3c24xx_gpiolib_init(void)
221 {
222         struct s3c_gpio_chip *chip = s3c24xx_gpios;
223         int gpn;
224
225         for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) {
226                 if (!chip->config)
227                         chip->config = &s3c24xx_gpiocfg_default;
228
229                 s3c_gpiolib_add(chip);
230         }
231
232         return 0;
233 }
234
235 core_initcall(s3c24xx_gpiolib_init);