]> git.openfabrics.org - ~shefty/rdma-dev.git/blob - arch/x86/kernel/microcode_amd.c
Merge branch 'x86-microcode-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[~shefty/rdma-dev.git] / arch / x86 / kernel / microcode_amd.c
1 /*
2  *  AMD CPU Microcode Update Driver for Linux
3  *  Copyright (C) 2008-2011 Advanced Micro Devices Inc.
4  *
5  *  Author: Peter Oruba <peter.oruba@amd.com>
6  *
7  *  Based on work by:
8  *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
9  *
10  *  Maintainers:
11  *  Andreas Herrmann <andreas.herrmann3@amd.com>
12  *  Borislav Petkov <borislav.petkov@amd.com>
13  *
14  *  This driver allows to upgrade microcode on F10h AMD
15  *  CPUs and later.
16  *
17  *  Licensed under the terms of the GNU General Public
18  *  License version 2. See file COPYING for details.
19  */
20
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23 #include <linux/firmware.h>
24 #include <linux/pci_ids.h>
25 #include <linux/uaccess.h>
26 #include <linux/vmalloc.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30
31 #include <asm/microcode.h>
32 #include <asm/processor.h>
33 #include <asm/msr.h>
34
35 MODULE_DESCRIPTION("AMD Microcode Update Driver");
36 MODULE_AUTHOR("Peter Oruba");
37 MODULE_LICENSE("GPL v2");
38
39 #define UCODE_MAGIC                0x00414d44
40 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
41 #define UCODE_UCODE_TYPE           0x00000001
42
43 struct equiv_cpu_entry {
44         u32     installed_cpu;
45         u32     fixed_errata_mask;
46         u32     fixed_errata_compare;
47         u16     equiv_cpu;
48         u16     res;
49 } __attribute__((packed));
50
51 struct microcode_header_amd {
52         u32     data_code;
53         u32     patch_id;
54         u16     mc_patch_data_id;
55         u8      mc_patch_data_len;
56         u8      init_flag;
57         u32     mc_patch_data_checksum;
58         u32     nb_dev_id;
59         u32     sb_dev_id;
60         u16     processor_rev_id;
61         u8      nb_rev_id;
62         u8      sb_rev_id;
63         u8      bios_api_rev;
64         u8      reserved1[3];
65         u32     match_reg[8];
66 } __attribute__((packed));
67
68 struct microcode_amd {
69         struct microcode_header_amd     hdr;
70         unsigned int                    mpb[0];
71 };
72
73 #define SECTION_HDR_SIZE        8
74 #define CONTAINER_HDR_SZ        12
75
76 static struct equiv_cpu_entry *equiv_cpu_table;
77
78 /* page-sized ucode patch buffer */
79 void *patch;
80
81 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
82 {
83         struct cpuinfo_x86 *c = &cpu_data(cpu);
84
85         if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
86                 pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
87                 return -1;
88         }
89
90         csig->rev = c->microcode;
91         pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
92
93         return 0;
94 }
95
96 static unsigned int verify_ucode_size(int cpu, u32 patch_size,
97                                       unsigned int size)
98 {
99         struct cpuinfo_x86 *c = &cpu_data(cpu);
100         u32 max_size;
101
102 #define F1XH_MPB_MAX_SIZE 2048
103 #define F14H_MPB_MAX_SIZE 1824
104 #define F15H_MPB_MAX_SIZE 4096
105
106         switch (c->x86) {
107         case 0x14:
108                 max_size = F14H_MPB_MAX_SIZE;
109                 break;
110         case 0x15:
111                 max_size = F15H_MPB_MAX_SIZE;
112                 break;
113         default:
114                 max_size = F1XH_MPB_MAX_SIZE;
115                 break;
116         }
117
118         if (patch_size > min_t(u32, size, max_size)) {
119                 pr_err("patch size mismatch\n");
120                 return 0;
121         }
122
123         return patch_size;
124 }
125
126 static u16 find_equiv_id(void)
127 {
128         unsigned int current_cpu_id, i = 0;
129
130         BUG_ON(equiv_cpu_table == NULL);
131
132         current_cpu_id = cpuid_eax(0x00000001);
133
134         while (equiv_cpu_table[i].installed_cpu != 0) {
135                 if (current_cpu_id == equiv_cpu_table[i].installed_cpu)
136                         return equiv_cpu_table[i].equiv_cpu;
137
138                 i++;
139         }
140         return 0;
141 }
142
143 /*
144  * we signal a good patch is found by returning its size > 0
145  */
146 static int get_matching_microcode(int cpu, const u8 *ucode_ptr,
147                                   unsigned int leftover_size, int rev,
148                                   unsigned int *current_size)
149 {
150         struct microcode_header_amd *mc_hdr;
151         unsigned int actual_size;
152         u16 equiv_cpu_id;
153
154         /* size of the current patch we're staring at */
155         *current_size = *(u32 *)(ucode_ptr + 4) + SECTION_HDR_SIZE;
156
157         equiv_cpu_id = find_equiv_id();
158         if (!equiv_cpu_id)
159                 return 0;
160
161         /*
162          * let's look at the patch header itself now
163          */
164         mc_hdr = (struct microcode_header_amd *)(ucode_ptr + SECTION_HDR_SIZE);
165
166         if (mc_hdr->processor_rev_id != equiv_cpu_id)
167                 return 0;
168
169         /* ucode might be chipset specific -- currently we don't support this */
170         if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
171                 pr_err("CPU%d: chipset specific code not yet supported\n",
172                        cpu);
173                 return 0;
174         }
175
176         if (mc_hdr->patch_id <= rev)
177                 return 0;
178
179         /*
180          * now that the header looks sane, verify its size
181          */
182         actual_size = verify_ucode_size(cpu, *current_size, leftover_size);
183         if (!actual_size)
184                 return 0;
185
186         /* clear the patch buffer */
187         memset(patch, 0, PAGE_SIZE);
188
189         /* all looks ok, get the binary patch */
190         get_ucode_data(patch, ucode_ptr + SECTION_HDR_SIZE, actual_size);
191
192         return actual_size;
193 }
194
195 static int apply_microcode_amd(int cpu)
196 {
197         u32 rev, dummy;
198         int cpu_num = raw_smp_processor_id();
199         struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
200         struct microcode_amd *mc_amd = uci->mc;
201         struct cpuinfo_x86 *c = &cpu_data(cpu);
202
203         /* We should bind the task to the CPU */
204         BUG_ON(cpu_num != cpu);
205
206         if (mc_amd == NULL)
207                 return 0;
208
209         wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
210         /* get patch id after patching */
211         rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
212
213         /* check current patch id and patch's id for match */
214         if (rev != mc_amd->hdr.patch_id) {
215                 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
216                        cpu, mc_amd->hdr.patch_id);
217                 return -1;
218         }
219
220         pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
221         uci->cpu_sig.rev = rev;
222         c->microcode = rev;
223
224         return 0;
225 }
226
227 static int install_equiv_cpu_table(const u8 *buf)
228 {
229         unsigned int *ibuf = (unsigned int *)buf;
230         unsigned int type = ibuf[1];
231         unsigned int size = ibuf[2];
232
233         if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
234                 pr_err("empty section/"
235                        "invalid type field in container file section header\n");
236                 return -EINVAL;
237         }
238
239         equiv_cpu_table = vmalloc(size);
240         if (!equiv_cpu_table) {
241                 pr_err("failed to allocate equivalent CPU table\n");
242                 return -ENOMEM;
243         }
244
245         get_ucode_data(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
246
247         /* add header length */
248         return size + CONTAINER_HDR_SZ;
249 }
250
251 static void free_equiv_cpu_table(void)
252 {
253         vfree(equiv_cpu_table);
254         equiv_cpu_table = NULL;
255 }
256
257 static enum ucode_state
258 generic_load_microcode(int cpu, const u8 *data, size_t size)
259 {
260         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
261         struct microcode_header_amd *mc_hdr = NULL;
262         unsigned int mc_size, leftover, current_size = 0;
263         int offset;
264         const u8 *ucode_ptr = data;
265         void *new_mc = NULL;
266         unsigned int new_rev = uci->cpu_sig.rev;
267         enum ucode_state state = UCODE_ERROR;
268
269         offset = install_equiv_cpu_table(ucode_ptr);
270         if (offset < 0) {
271                 pr_err("failed to create equivalent cpu table\n");
272                 goto out;
273         }
274         ucode_ptr += offset;
275         leftover = size - offset;
276
277         if (*(u32 *)ucode_ptr != UCODE_UCODE_TYPE) {
278                 pr_err("invalid type field in container file section header\n");
279                 goto free_table;
280         }
281
282         while (leftover) {
283                 mc_size = get_matching_microcode(cpu, ucode_ptr, leftover,
284                                                  new_rev, &current_size);
285                 if (mc_size) {
286                         mc_hdr  = patch;
287                         new_mc  = patch;
288                         new_rev = mc_hdr->patch_id;
289                         goto out_ok;
290                 }
291
292                 ucode_ptr += current_size;
293                 leftover  -= current_size;
294         }
295
296         if (!new_mc) {
297                 state = UCODE_NFOUND;
298                 goto free_table;
299         }
300
301 out_ok:
302         uci->mc = new_mc;
303         state = UCODE_OK;
304         pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
305                  cpu, uci->cpu_sig.rev, new_rev);
306
307 free_table:
308         free_equiv_cpu_table();
309
310 out:
311         return state;
312 }
313
314 static enum ucode_state request_microcode_amd(int cpu, struct device *device)
315 {
316         const char *fw_name = "amd-ucode/microcode_amd.bin";
317         const struct firmware *fw;
318         enum ucode_state ret = UCODE_NFOUND;
319
320         if (request_firmware(&fw, fw_name, device)) {
321                 pr_err("failed to load file %s\n", fw_name);
322                 goto out;
323         }
324
325         ret = UCODE_ERROR;
326         if (*(u32 *)fw->data != UCODE_MAGIC) {
327                 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
328                 goto fw_release;
329         }
330
331         ret = generic_load_microcode(cpu, fw->data, fw->size);
332
333 fw_release:
334         release_firmware(fw);
335
336 out:
337         return ret;
338 }
339
340 static enum ucode_state
341 request_microcode_user(int cpu, const void __user *buf, size_t size)
342 {
343         pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
344         return UCODE_ERROR;
345 }
346
347 static void microcode_fini_cpu_amd(int cpu)
348 {
349         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
350
351         uci->mc = NULL;
352 }
353
354 static struct microcode_ops microcode_amd_ops = {
355         .request_microcode_user           = request_microcode_user,
356         .request_microcode_fw             = request_microcode_amd,
357         .collect_cpu_info                 = collect_cpu_info_amd,
358         .apply_microcode                  = apply_microcode_amd,
359         .microcode_fini_cpu               = microcode_fini_cpu_amd,
360 };
361
362 struct microcode_ops * __init init_amd_microcode(void)
363 {
364         patch = (void *)get_zeroed_page(GFP_KERNEL);
365         if (!patch)
366                 return NULL;
367
368         return &microcode_amd_ops;
369 }
370
371 void __exit exit_amd_microcode(void)
372 {
373         free_page((unsigned long)patch);
374 }