]> git.openfabrics.org - ~shefty/rdma-dev.git/blob - arch/xtensa/kernel/setup.c
xtensa: display s32c1i feature flag in cpuinfo
[~shefty/rdma-dev.git] / arch / xtensa / kernel / setup.c
1 /*
2  * arch/xtensa/kernel/setup.c
3  *
4  * This file is subject to the terms and conditions of the GNU General Public
5  * License.  See the file "COPYING" in the main directory of this archive
6  * for more details.
7  *
8  * Copyright (C) 1995  Linus Torvalds
9  * Copyright (C) 2001 - 2005  Tensilica Inc.
10  *
11  * Chris Zankel <chris@zankel.net>
12  * Joe Taylor   <joe@tensilica.com, joetylr@yahoo.com>
13  * Kevin Chea
14  * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
15  */
16
17 #include <linux/errno.h>
18 #include <linux/init.h>
19 #include <linux/mm.h>
20 #include <linux/proc_fs.h>
21 #include <linux/screen_info.h>
22 #include <linux/bootmem.h>
23 #include <linux/kernel.h>
24
25 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
26 # include <linux/console.h>
27 #endif
28
29 #ifdef CONFIG_RTC
30 # include <linux/timex.h>
31 #endif
32
33 #ifdef CONFIG_PROC_FS
34 # include <linux/seq_file.h>
35 #endif
36
37 #include <asm/bootparam.h>
38 #include <asm/pgtable.h>
39 #include <asm/processor.h>
40 #include <asm/timex.h>
41 #include <asm/platform.h>
42 #include <asm/page.h>
43 #include <asm/setup.h>
44 #include <asm/param.h>
45
46 #include <platform/hardware.h>
47
48 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
49 struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
50 #endif
51
52 #ifdef CONFIG_BLK_DEV_FD
53 extern struct fd_ops no_fd_ops;
54 struct fd_ops *fd_ops;
55 #endif
56
57 extern struct rtc_ops no_rtc_ops;
58 struct rtc_ops *rtc_ops;
59
60 #ifdef CONFIG_BLK_DEV_INITRD
61 extern void *initrd_start;
62 extern void *initrd_end;
63 int initrd_is_mapped = 0;
64 extern int initrd_below_start_ok;
65 #endif
66
67 unsigned char aux_device_present;
68 extern unsigned long loops_per_jiffy;
69
70 /* Command line specified as configuration option. */
71
72 static char __initdata command_line[COMMAND_LINE_SIZE];
73
74 #ifdef CONFIG_CMDLINE_BOOL
75 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
76 #endif
77
78 sysmem_info_t __initdata sysmem;
79
80 #ifdef CONFIG_MMU
81 extern void init_mmu(void);
82 #else
83 static inline void init_mmu(void) { }
84 #endif
85
86 extern void zones_init(void);
87
88 /*
89  * Boot parameter parsing.
90  *
91  * The Xtensa port uses a list of variable-sized tags to pass data to
92  * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
93  * to be recognised. The list is terminated with a zero-sized
94  * BP_TAG_LAST tag.
95  */
96
97 typedef struct tagtable {
98         u32 tag;
99         int (*parse)(const bp_tag_t*);
100 } tagtable_t;
101
102 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn           \
103         __attribute__((used, section(".taglist"))) = { tag, fn }
104
105 /* parse current tag */
106
107 static int __init parse_tag_mem(const bp_tag_t *tag)
108 {
109         meminfo_t *mi = (meminfo_t*)(tag->data);
110
111         if (mi->type != MEMORY_TYPE_CONVENTIONAL)
112                 return -1;
113
114         if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
115                 printk(KERN_WARNING
116                        "Ignoring memory bank 0x%08lx size %ldKB\n",
117                        (unsigned long)mi->start,
118                        (unsigned long)mi->end - (unsigned long)mi->start);
119                 return -EINVAL;
120         }
121         sysmem.bank[sysmem.nr_banks].type  = mi->type;
122         sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
123         sysmem.bank[sysmem.nr_banks].end   = mi->end & PAGE_MASK;
124         sysmem.nr_banks++;
125
126         return 0;
127 }
128
129 __tagtable(BP_TAG_MEMORY, parse_tag_mem);
130
131 #ifdef CONFIG_BLK_DEV_INITRD
132
133 static int __init parse_tag_initrd(const bp_tag_t* tag)
134 {
135         meminfo_t* mi;
136         mi = (meminfo_t*)(tag->data);
137         initrd_start = (void*)(mi->start);
138         initrd_end = (void*)(mi->end);
139
140         return 0;
141 }
142
143 __tagtable(BP_TAG_INITRD, parse_tag_initrd);
144
145 #endif /* CONFIG_BLK_DEV_INITRD */
146
147 static int __init parse_tag_cmdline(const bp_tag_t* tag)
148 {
149         strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
150         command_line[COMMAND_LINE_SIZE - 1] = '\0';
151         return 0;
152 }
153
154 __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
155
156 static int __init parse_bootparam(const bp_tag_t* tag)
157 {
158         extern tagtable_t __tagtable_begin, __tagtable_end;
159         tagtable_t *t;
160
161         /* Boot parameters must start with a BP_TAG_FIRST tag. */
162
163         if (tag->id != BP_TAG_FIRST) {
164                 printk(KERN_WARNING "Invalid boot parameters!\n");
165                 return 0;
166         }
167
168         tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
169
170         /* Parse all tags. */
171
172         while (tag != NULL && tag->id != BP_TAG_LAST) {
173                 for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
174                         if (tag->id == t->tag) {
175                                 t->parse(tag);
176                                 break;
177                         }
178                 }
179                 if (t == &__tagtable_end)
180                         printk(KERN_WARNING "Ignoring tag "
181                                "0x%08x\n", tag->id);
182                 tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
183         }
184
185         return 0;
186 }
187
188 /*
189  * Initialize architecture. (Early stage)
190  */
191
192 void __init init_arch(bp_tag_t *bp_start)
193 {
194         sysmem.nr_banks = 0;
195
196 #ifdef CONFIG_CMDLINE_BOOL
197         strcpy(command_line, default_command_line);
198 #endif
199
200         /* Parse boot parameters */
201
202         if (bp_start)
203           parse_bootparam(bp_start);
204
205         if (sysmem.nr_banks == 0) {
206                 sysmem.nr_banks = 1;
207                 sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
208                 sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
209                                      + PLATFORM_DEFAULT_MEM_SIZE;
210         }
211
212         /* Early hook for platforms */
213
214         platform_init(bp_start);
215
216         /* Initialize MMU. */
217
218         init_mmu();
219 }
220
221 /*
222  * Initialize system. Setup memory and reserve regions.
223  */
224
225 extern char _end;
226 extern char _stext;
227 extern char _WindowVectors_text_start;
228 extern char _WindowVectors_text_end;
229 extern char _DebugInterruptVector_literal_start;
230 extern char _DebugInterruptVector_text_end;
231 extern char _KernelExceptionVector_literal_start;
232 extern char _KernelExceptionVector_text_end;
233 extern char _UserExceptionVector_literal_start;
234 extern char _UserExceptionVector_text_end;
235 extern char _DoubleExceptionVector_literal_start;
236 extern char _DoubleExceptionVector_text_end;
237
238 void __init setup_arch(char **cmdline_p)
239 {
240         extern int mem_reserve(unsigned long, unsigned long, int);
241         extern void bootmem_init(void);
242
243         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
244         boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
245         *cmdline_p = command_line;
246
247         /* Reserve some memory regions */
248
249 #ifdef CONFIG_BLK_DEV_INITRD
250         if (initrd_start < initrd_end) {
251                 initrd_is_mapped = mem_reserve(__pa(initrd_start),
252                                                __pa(initrd_end), 0);
253                 initrd_below_start_ok = 1;
254         } else {
255                 initrd_start = 0;
256         }
257 #endif
258
259         mem_reserve(__pa(&_stext),__pa(&_end), 1);
260
261         mem_reserve(__pa(&_WindowVectors_text_start),
262                     __pa(&_WindowVectors_text_end), 0);
263
264         mem_reserve(__pa(&_DebugInterruptVector_literal_start),
265                     __pa(&_DebugInterruptVector_text_end), 0);
266
267         mem_reserve(__pa(&_KernelExceptionVector_literal_start),
268                     __pa(&_KernelExceptionVector_text_end), 0);
269
270         mem_reserve(__pa(&_UserExceptionVector_literal_start),
271                     __pa(&_UserExceptionVector_text_end), 0);
272
273         mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
274                     __pa(&_DoubleExceptionVector_text_end), 0);
275
276         bootmem_init();
277
278         platform_setup(cmdline_p);
279
280
281         paging_init();
282         zones_init();
283
284 #ifdef CONFIG_VT
285 # if defined(CONFIG_VGA_CONSOLE)
286         conswitchp = &vga_con;
287 # elif defined(CONFIG_DUMMY_CONSOLE)
288         conswitchp = &dummy_con;
289 # endif
290 #endif
291
292 #ifdef CONFIG_PCI
293         platform_pcibios_init();
294 #endif
295 }
296
297 void machine_restart(char * cmd)
298 {
299         platform_restart();
300 }
301
302 void machine_halt(void)
303 {
304         platform_halt();
305         while (1);
306 }
307
308 void machine_power_off(void)
309 {
310         platform_power_off();
311         while (1);
312 }
313 #ifdef CONFIG_PROC_FS
314
315 /*
316  * Display some core information through /proc/cpuinfo.
317  */
318
319 static int
320 c_show(struct seq_file *f, void *slot)
321 {
322         /* high-level stuff */
323         seq_printf(f,"processor\t: 0\n"
324                      "vendor_id\t: Tensilica\n"
325                      "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
326                      "core ID\t\t: " XCHAL_CORE_ID "\n"
327                      "build ID\t: 0x%x\n"
328                      "byte order\t: %s\n"
329                      "cpu MHz\t\t: %lu.%02lu\n"
330                      "bogomips\t: %lu.%02lu\n",
331                      XCHAL_BUILD_UNIQUE_ID,
332                      XCHAL_HAVE_BE ?  "big" : "little",
333                      CCOUNT_PER_JIFFY/(1000000/HZ),
334                      (CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
335                      loops_per_jiffy/(500000/HZ),
336                      (loops_per_jiffy/(5000/HZ)) % 100);
337
338         seq_printf(f,"flags\t\t: "
339 #if XCHAL_HAVE_NMI
340                      "nmi "
341 #endif
342 #if XCHAL_HAVE_DEBUG
343                      "debug "
344 # if XCHAL_HAVE_OCD
345                      "ocd "
346 # endif
347 #endif
348 #if XCHAL_HAVE_DENSITY
349                      "density "
350 #endif
351 #if XCHAL_HAVE_BOOLEANS
352                      "boolean "
353 #endif
354 #if XCHAL_HAVE_LOOPS
355                      "loop "
356 #endif
357 #if XCHAL_HAVE_NSA
358                      "nsa "
359 #endif
360 #if XCHAL_HAVE_MINMAX
361                      "minmax "
362 #endif
363 #if XCHAL_HAVE_SEXT
364                      "sext "
365 #endif
366 #if XCHAL_HAVE_CLAMPS
367                      "clamps "
368 #endif
369 #if XCHAL_HAVE_MAC16
370                      "mac16 "
371 #endif
372 #if XCHAL_HAVE_MUL16
373                      "mul16 "
374 #endif
375 #if XCHAL_HAVE_MUL32
376                      "mul32 "
377 #endif
378 #if XCHAL_HAVE_MUL32_HIGH
379                      "mul32h "
380 #endif
381 #if XCHAL_HAVE_FP
382                      "fpu "
383 #endif
384 #if XCHAL_HAVE_S32C1I
385                      "s32c1i "
386 #endif
387                      "\n");
388
389         /* Registers. */
390         seq_printf(f,"physical aregs\t: %d\n"
391                      "misc regs\t: %d\n"
392                      "ibreak\t\t: %d\n"
393                      "dbreak\t\t: %d\n",
394                      XCHAL_NUM_AREGS,
395                      XCHAL_NUM_MISC_REGS,
396                      XCHAL_NUM_IBREAK,
397                      XCHAL_NUM_DBREAK);
398
399
400         /* Interrupt. */
401         seq_printf(f,"num ints\t: %d\n"
402                      "ext ints\t: %d\n"
403                      "int levels\t: %d\n"
404                      "timers\t\t: %d\n"
405                      "debug level\t: %d\n",
406                      XCHAL_NUM_INTERRUPTS,
407                      XCHAL_NUM_EXTINTERRUPTS,
408                      XCHAL_NUM_INTLEVELS,
409                      XCHAL_NUM_TIMERS,
410                      XCHAL_DEBUGLEVEL);
411
412         /* Cache */
413         seq_printf(f,"icache line size: %d\n"
414                      "icache ways\t: %d\n"
415                      "icache size\t: %d\n"
416                      "icache flags\t: "
417 #if XCHAL_ICACHE_LINE_LOCKABLE
418                      "lock "
419 #endif
420                      "\n"
421                      "dcache line size: %d\n"
422                      "dcache ways\t: %d\n"
423                      "dcache size\t: %d\n"
424                      "dcache flags\t: "
425 #if XCHAL_DCACHE_IS_WRITEBACK
426                      "writeback "
427 #endif
428 #if XCHAL_DCACHE_LINE_LOCKABLE
429                      "lock "
430 #endif
431                      "\n",
432                      XCHAL_ICACHE_LINESIZE,
433                      XCHAL_ICACHE_WAYS,
434                      XCHAL_ICACHE_SIZE,
435                      XCHAL_DCACHE_LINESIZE,
436                      XCHAL_DCACHE_WAYS,
437                      XCHAL_DCACHE_SIZE);
438
439         return 0;
440 }
441
442 /*
443  * We show only CPU #0 info.
444  */
445 static void *
446 c_start(struct seq_file *f, loff_t *pos)
447 {
448         return (void *) ((*pos == 0) ? (void *)1 : NULL);
449 }
450
451 static void *
452 c_next(struct seq_file *f, void *v, loff_t *pos)
453 {
454         return NULL;
455 }
456
457 static void
458 c_stop(struct seq_file *f, void *v)
459 {
460 }
461
462 const struct seq_operations cpuinfo_op =
463 {
464         start:  c_start,
465         next:   c_next,
466         stop:   c_stop,
467         show:   c_show
468 };
469
470 #endif /* CONFIG_PROC_FS */
471