]> git.openfabrics.org - ~shefty/rdma-dev.git/blob - drivers/char/tpm/tpm_tis.c
Merge branch 'next/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux...
[~shefty/rdma-dev.git] / drivers / char / tpm / tpm_tis.c
1 /*
2  * Copyright (C) 2005, 2006 IBM Corporation
3  *
4  * Authors:
5  * Leendert van Doorn <leendert@watson.ibm.com>
6  * Kylene Hall <kjhall@us.ibm.com>
7  *
8  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
9  *
10  * Device driver for TCG/TCPA TPM (trusted platform module).
11  * Specifications at www.trustedcomputinggroup.org
12  *
13  * This device driver implements the TPM interface as defined in
14  * the TCG TPM Interface Spec version 1.2, revision 1.0.
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License as
18  * published by the Free Software Foundation, version 2 of the
19  * License.
20  */
21 #include <linux/init.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/pnp.h>
25 #include <linux/slab.h>
26 #include <linux/interrupt.h>
27 #include <linux/wait.h>
28 #include <linux/acpi.h>
29 #include <linux/freezer.h>
30 #include "tpm.h"
31
32 #define TPM_HEADER_SIZE 10
33
34 enum tis_access {
35         TPM_ACCESS_VALID = 0x80,
36         TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
37         TPM_ACCESS_REQUEST_PENDING = 0x04,
38         TPM_ACCESS_REQUEST_USE = 0x02,
39 };
40
41 enum tis_status {
42         TPM_STS_VALID = 0x80,
43         TPM_STS_COMMAND_READY = 0x40,
44         TPM_STS_GO = 0x20,
45         TPM_STS_DATA_AVAIL = 0x10,
46         TPM_STS_DATA_EXPECT = 0x08,
47 };
48
49 enum tis_int_flags {
50         TPM_GLOBAL_INT_ENABLE = 0x80000000,
51         TPM_INTF_BURST_COUNT_STATIC = 0x100,
52         TPM_INTF_CMD_READY_INT = 0x080,
53         TPM_INTF_INT_EDGE_FALLING = 0x040,
54         TPM_INTF_INT_EDGE_RISING = 0x020,
55         TPM_INTF_INT_LEVEL_LOW = 0x010,
56         TPM_INTF_INT_LEVEL_HIGH = 0x008,
57         TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
58         TPM_INTF_STS_VALID_INT = 0x002,
59         TPM_INTF_DATA_AVAIL_INT = 0x001,
60 };
61
62 enum tis_defaults {
63         TIS_MEM_BASE = 0xFED40000,
64         TIS_MEM_LEN = 0x5000,
65         TIS_SHORT_TIMEOUT = 750,        /* ms */
66         TIS_LONG_TIMEOUT = 2000,        /* 2 sec */
67 };
68
69 #define TPM_ACCESS(l)                   (0x0000 | ((l) << 12))
70 #define TPM_INT_ENABLE(l)               (0x0008 | ((l) << 12))
71 #define TPM_INT_VECTOR(l)               (0x000C | ((l) << 12))
72 #define TPM_INT_STATUS(l)               (0x0010 | ((l) << 12))
73 #define TPM_INTF_CAPS(l)                (0x0014 | ((l) << 12))
74 #define TPM_STS(l)                      (0x0018 | ((l) << 12))
75 #define TPM_DATA_FIFO(l)                (0x0024 | ((l) << 12))
76
77 #define TPM_DID_VID(l)                  (0x0F00 | ((l) << 12))
78 #define TPM_RID(l)                      (0x0F04 | ((l) << 12))
79
80 static LIST_HEAD(tis_chips);
81 static DEFINE_SPINLOCK(tis_lock);
82
83 #ifdef CONFIG_PNP
84 static int is_itpm(struct pnp_dev *dev)
85 {
86         struct acpi_device *acpi = pnp_acpi_device(dev);
87         struct acpi_hardware_id *id;
88
89         list_for_each_entry(id, &acpi->pnp.ids, list) {
90                 if (!strcmp("INTC0102", id->id))
91                         return 1;
92         }
93
94         return 0;
95 }
96 #endif
97
98 static int check_locality(struct tpm_chip *chip, int l)
99 {
100         if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
101              (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
102             (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
103                 return chip->vendor.locality = l;
104
105         return -1;
106 }
107
108 static void release_locality(struct tpm_chip *chip, int l, int force)
109 {
110         if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
111                       (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
112             (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
113                 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
114                          chip->vendor.iobase + TPM_ACCESS(l));
115 }
116
117 static int request_locality(struct tpm_chip *chip, int l)
118 {
119         unsigned long stop, timeout;
120         long rc;
121
122         if (check_locality(chip, l) >= 0)
123                 return l;
124
125         iowrite8(TPM_ACCESS_REQUEST_USE,
126                  chip->vendor.iobase + TPM_ACCESS(l));
127
128         stop = jiffies + chip->vendor.timeout_a;
129
130         if (chip->vendor.irq) {
131 again:
132                 timeout = stop - jiffies;
133                 if ((long)timeout <= 0)
134                         return -1;
135                 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
136                                                       (check_locality
137                                                        (chip, l) >= 0),
138                                                       timeout);
139                 if (rc > 0)
140                         return l;
141                 if (rc == -ERESTARTSYS && freezing(current)) {
142                         clear_thread_flag(TIF_SIGPENDING);
143                         goto again;
144                 }
145         } else {
146                 /* wait for burstcount */
147                 do {
148                         if (check_locality(chip, l) >= 0)
149                                 return l;
150                         msleep(TPM_TIMEOUT);
151                 }
152                 while (time_before(jiffies, stop));
153         }
154         return -1;
155 }
156
157 static u8 tpm_tis_status(struct tpm_chip *chip)
158 {
159         return ioread8(chip->vendor.iobase +
160                        TPM_STS(chip->vendor.locality));
161 }
162
163 static void tpm_tis_ready(struct tpm_chip *chip)
164 {
165         /* this causes the current command to be aborted */
166         iowrite8(TPM_STS_COMMAND_READY,
167                  chip->vendor.iobase + TPM_STS(chip->vendor.locality));
168 }
169
170 static int get_burstcount(struct tpm_chip *chip)
171 {
172         unsigned long stop;
173         int burstcnt;
174
175         /* wait for burstcount */
176         /* which timeout value, spec has 2 answers (c & d) */
177         stop = jiffies + chip->vendor.timeout_d;
178         do {
179                 burstcnt = ioread8(chip->vendor.iobase +
180                                    TPM_STS(chip->vendor.locality) + 1);
181                 burstcnt += ioread8(chip->vendor.iobase +
182                                     TPM_STS(chip->vendor.locality) +
183                                     2) << 8;
184                 if (burstcnt)
185                         return burstcnt;
186                 msleep(TPM_TIMEOUT);
187         } while (time_before(jiffies, stop));
188         return -EBUSY;
189 }
190
191 static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
192                          wait_queue_head_t *queue)
193 {
194         unsigned long stop;
195         long rc;
196         u8 status;
197
198         /* check current status */
199         status = tpm_tis_status(chip);
200         if ((status & mask) == mask)
201                 return 0;
202
203         stop = jiffies + timeout;
204
205         if (chip->vendor.irq) {
206 again:
207                 timeout = stop - jiffies;
208                 if ((long)timeout <= 0)
209                         return -ETIME;
210                 rc = wait_event_interruptible_timeout(*queue,
211                                                       ((tpm_tis_status
212                                                         (chip) & mask) ==
213                                                        mask), timeout);
214                 if (rc > 0)
215                         return 0;
216                 if (rc == -ERESTARTSYS && freezing(current)) {
217                         clear_thread_flag(TIF_SIGPENDING);
218                         goto again;
219                 }
220         } else {
221                 do {
222                         msleep(TPM_TIMEOUT);
223                         status = tpm_tis_status(chip);
224                         if ((status & mask) == mask)
225                                 return 0;
226                 } while (time_before(jiffies, stop));
227         }
228         return -ETIME;
229 }
230
231 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
232 {
233         int size = 0, burstcnt;
234         while (size < count &&
235                wait_for_stat(chip,
236                              TPM_STS_DATA_AVAIL | TPM_STS_VALID,
237                              chip->vendor.timeout_c,
238                              &chip->vendor.read_queue)
239                == 0) {
240                 burstcnt = get_burstcount(chip);
241                 for (; burstcnt > 0 && size < count; burstcnt--)
242                         buf[size++] = ioread8(chip->vendor.iobase +
243                                               TPM_DATA_FIFO(chip->vendor.
244                                                             locality));
245         }
246         return size;
247 }
248
249 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
250 {
251         int size = 0;
252         int expected, status;
253
254         if (count < TPM_HEADER_SIZE) {
255                 size = -EIO;
256                 goto out;
257         }
258
259         /* read first 10 bytes, including tag, paramsize, and result */
260         if ((size =
261              recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
262                 dev_err(chip->dev, "Unable to read header\n");
263                 goto out;
264         }
265
266         expected = be32_to_cpu(*(__be32 *) (buf + 2));
267         if (expected > count) {
268                 size = -EIO;
269                 goto out;
270         }
271
272         if ((size +=
273              recv_data(chip, &buf[TPM_HEADER_SIZE],
274                        expected - TPM_HEADER_SIZE)) < expected) {
275                 dev_err(chip->dev, "Unable to read remainder of result\n");
276                 size = -ETIME;
277                 goto out;
278         }
279
280         wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
281                       &chip->vendor.int_queue);
282         status = tpm_tis_status(chip);
283         if (status & TPM_STS_DATA_AVAIL) {      /* retry? */
284                 dev_err(chip->dev, "Error left over data\n");
285                 size = -EIO;
286                 goto out;
287         }
288
289 out:
290         tpm_tis_ready(chip);
291         release_locality(chip, chip->vendor.locality, 0);
292         return size;
293 }
294
295 static int itpm;
296 module_param(itpm, bool, 0444);
297 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
298
299 /*
300  * If interrupts are used (signaled by an irq set in the vendor structure)
301  * tpm.c can skip polling for the data to be available as the interrupt is
302  * waited for here
303  */
304 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
305 {
306         int rc, status, burstcnt;
307         size_t count = 0;
308
309         if (request_locality(chip, 0) < 0)
310                 return -EBUSY;
311
312         status = tpm_tis_status(chip);
313         if ((status & TPM_STS_COMMAND_READY) == 0) {
314                 tpm_tis_ready(chip);
315                 if (wait_for_stat
316                     (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
317                      &chip->vendor.int_queue) < 0) {
318                         rc = -ETIME;
319                         goto out_err;
320                 }
321         }
322
323         while (count < len - 1) {
324                 burstcnt = get_burstcount(chip);
325                 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
326                         iowrite8(buf[count], chip->vendor.iobase +
327                                  TPM_DATA_FIFO(chip->vendor.locality));
328                         count++;
329                 }
330
331                 wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
332                               &chip->vendor.int_queue);
333                 status = tpm_tis_status(chip);
334                 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
335                         rc = -EIO;
336                         goto out_err;
337                 }
338         }
339
340         /* write last byte */
341         iowrite8(buf[count],
342                  chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
343         wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
344                       &chip->vendor.int_queue);
345         status = tpm_tis_status(chip);
346         if ((status & TPM_STS_DATA_EXPECT) != 0) {
347                 rc = -EIO;
348                 goto out_err;
349         }
350
351         return 0;
352
353 out_err:
354         tpm_tis_ready(chip);
355         release_locality(chip, chip->vendor.locality, 0);
356         return rc;
357 }
358
359 /*
360  * If interrupts are used (signaled by an irq set in the vendor structure)
361  * tpm.c can skip polling for the data to be available as the interrupt is
362  * waited for here
363  */
364 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
365 {
366         int rc;
367         u32 ordinal;
368
369         rc = tpm_tis_send_data(chip, buf, len);
370         if (rc < 0)
371                 return rc;
372
373         /* go and do it */
374         iowrite8(TPM_STS_GO,
375                  chip->vendor.iobase + TPM_STS(chip->vendor.locality));
376
377         if (chip->vendor.irq) {
378                 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
379                 if (wait_for_stat
380                     (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
381                      tpm_calc_ordinal_duration(chip, ordinal),
382                      &chip->vendor.read_queue) < 0) {
383                         rc = -ETIME;
384                         goto out_err;
385                 }
386         }
387         return len;
388 out_err:
389         tpm_tis_ready(chip);
390         release_locality(chip, chip->vendor.locality, 0);
391         return rc;
392 }
393
394 /*
395  * Early probing for iTPM with STS_DATA_EXPECT flaw.
396  * Try sending command without itpm flag set and if that
397  * fails, repeat with itpm flag set.
398  */
399 static int probe_itpm(struct tpm_chip *chip)
400 {
401         int rc = 0;
402         u8 cmd_getticks[] = {
403                 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
404                 0x00, 0x00, 0x00, 0xf1
405         };
406         size_t len = sizeof(cmd_getticks);
407         int rem_itpm = itpm;
408
409         itpm = 0;
410
411         rc = tpm_tis_send_data(chip, cmd_getticks, len);
412         if (rc == 0)
413                 goto out;
414
415         tpm_tis_ready(chip);
416         release_locality(chip, chip->vendor.locality, 0);
417
418         itpm = 1;
419
420         rc = tpm_tis_send_data(chip, cmd_getticks, len);
421         if (rc == 0) {
422                 dev_info(chip->dev, "Detected an iTPM.\n");
423                 rc = 1;
424         } else
425                 rc = -EFAULT;
426
427 out:
428         itpm = rem_itpm;
429         tpm_tis_ready(chip);
430         release_locality(chip, chip->vendor.locality, 0);
431
432         return rc;
433 }
434
435 static const struct file_operations tis_ops = {
436         .owner = THIS_MODULE,
437         .llseek = no_llseek,
438         .open = tpm_open,
439         .read = tpm_read,
440         .write = tpm_write,
441         .release = tpm_release,
442 };
443
444 static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
445 static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
446 static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
447 static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
448 static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
449 static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
450                    NULL);
451 static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
452 static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
453 static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL);
454 static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
455
456 static struct attribute *tis_attrs[] = {
457         &dev_attr_pubek.attr,
458         &dev_attr_pcrs.attr,
459         &dev_attr_enabled.attr,
460         &dev_attr_active.attr,
461         &dev_attr_owned.attr,
462         &dev_attr_temp_deactivated.attr,
463         &dev_attr_caps.attr,
464         &dev_attr_cancel.attr,
465         &dev_attr_durations.attr,
466         &dev_attr_timeouts.attr, NULL,
467 };
468
469 static struct attribute_group tis_attr_grp = {
470         .attrs = tis_attrs
471 };
472
473 static struct tpm_vendor_specific tpm_tis = {
474         .status = tpm_tis_status,
475         .recv = tpm_tis_recv,
476         .send = tpm_tis_send,
477         .cancel = tpm_tis_ready,
478         .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
479         .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
480         .req_canceled = TPM_STS_COMMAND_READY,
481         .attr_group = &tis_attr_grp,
482         .miscdev = {
483                     .fops = &tis_ops,},
484 };
485
486 static irqreturn_t tis_int_probe(int irq, void *dev_id)
487 {
488         struct tpm_chip *chip = dev_id;
489         u32 interrupt;
490
491         interrupt = ioread32(chip->vendor.iobase +
492                              TPM_INT_STATUS(chip->vendor.locality));
493
494         if (interrupt == 0)
495                 return IRQ_NONE;
496
497         chip->vendor.probed_irq = irq;
498
499         /* Clear interrupts handled with TPM_EOI */
500         iowrite32(interrupt,
501                   chip->vendor.iobase +
502                   TPM_INT_STATUS(chip->vendor.locality));
503         return IRQ_HANDLED;
504 }
505
506 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
507 {
508         struct tpm_chip *chip = dev_id;
509         u32 interrupt;
510         int i;
511
512         interrupt = ioread32(chip->vendor.iobase +
513                              TPM_INT_STATUS(chip->vendor.locality));
514
515         if (interrupt == 0)
516                 return IRQ_NONE;
517
518         if (interrupt & TPM_INTF_DATA_AVAIL_INT)
519                 wake_up_interruptible(&chip->vendor.read_queue);
520         if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
521                 for (i = 0; i < 5; i++)
522                         if (check_locality(chip, i) >= 0)
523                                 break;
524         if (interrupt &
525             (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
526              TPM_INTF_CMD_READY_INT))
527                 wake_up_interruptible(&chip->vendor.int_queue);
528
529         /* Clear interrupts handled with TPM_EOI */
530         iowrite32(interrupt,
531                   chip->vendor.iobase +
532                   TPM_INT_STATUS(chip->vendor.locality));
533         ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
534         return IRQ_HANDLED;
535 }
536
537 static int interrupts = 1;
538 module_param(interrupts, bool, 0444);
539 MODULE_PARM_DESC(interrupts, "Enable interrupts");
540
541 static int tpm_tis_init(struct device *dev, resource_size_t start,
542                         resource_size_t len, unsigned int irq)
543 {
544         u32 vendor, intfcaps, intmask;
545         int rc, i, irq_s, irq_e;
546         struct tpm_chip *chip;
547
548         if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
549                 return -ENODEV;
550
551         chip->vendor.iobase = ioremap(start, len);
552         if (!chip->vendor.iobase) {
553                 rc = -EIO;
554                 goto out_err;
555         }
556
557         /* Default timeouts */
558         chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
559         chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
560         chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
561         chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
562
563         if (request_locality(chip, 0) != 0) {
564                 rc = -ENODEV;
565                 goto out_err;
566         }
567
568         vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
569
570         dev_info(dev,
571                  "1.2 TPM (device-id 0x%X, rev-id %d)\n",
572                  vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
573
574         if (!itpm) {
575                 itpm = probe_itpm(chip);
576                 if (itpm < 0) {
577                         rc = -ENODEV;
578                         goto out_err;
579                 }
580         }
581
582         if (itpm)
583                 dev_info(dev, "Intel iTPM workaround enabled\n");
584
585
586         /* Figure out the capabilities */
587         intfcaps =
588             ioread32(chip->vendor.iobase +
589                      TPM_INTF_CAPS(chip->vendor.locality));
590         dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
591                 intfcaps);
592         if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
593                 dev_dbg(dev, "\tBurst Count Static\n");
594         if (intfcaps & TPM_INTF_CMD_READY_INT)
595                 dev_dbg(dev, "\tCommand Ready Int Support\n");
596         if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
597                 dev_dbg(dev, "\tInterrupt Edge Falling\n");
598         if (intfcaps & TPM_INTF_INT_EDGE_RISING)
599                 dev_dbg(dev, "\tInterrupt Edge Rising\n");
600         if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
601                 dev_dbg(dev, "\tInterrupt Level Low\n");
602         if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
603                 dev_dbg(dev, "\tInterrupt Level High\n");
604         if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
605                 dev_dbg(dev, "\tLocality Change Int Support\n");
606         if (intfcaps & TPM_INTF_STS_VALID_INT)
607                 dev_dbg(dev, "\tSts Valid Int Support\n");
608         if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
609                 dev_dbg(dev, "\tData Avail Int Support\n");
610
611         /* get the timeouts before testing for irqs */
612         tpm_get_timeouts(chip);
613
614         /* INTERRUPT Setup */
615         init_waitqueue_head(&chip->vendor.read_queue);
616         init_waitqueue_head(&chip->vendor.int_queue);
617
618         intmask =
619             ioread32(chip->vendor.iobase +
620                      TPM_INT_ENABLE(chip->vendor.locality));
621
622         intmask |= TPM_INTF_CMD_READY_INT
623             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
624             | TPM_INTF_STS_VALID_INT;
625
626         iowrite32(intmask,
627                   chip->vendor.iobase +
628                   TPM_INT_ENABLE(chip->vendor.locality));
629         if (interrupts)
630                 chip->vendor.irq = irq;
631         if (interrupts && !chip->vendor.irq) {
632                 irq_s =
633                     ioread8(chip->vendor.iobase +
634                             TPM_INT_VECTOR(chip->vendor.locality));
635                 if (irq_s) {
636                         irq_e = irq_s;
637                 } else {
638                         irq_s = 3;
639                         irq_e = 15;
640                 }
641
642                 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
643                         iowrite8(i, chip->vendor.iobase +
644                                  TPM_INT_VECTOR(chip->vendor.locality));
645                         if (request_irq
646                             (i, tis_int_probe, IRQF_SHARED,
647                              chip->vendor.miscdev.name, chip) != 0) {
648                                 dev_info(chip->dev,
649                                          "Unable to request irq: %d for probe\n",
650                                          i);
651                                 continue;
652                         }
653
654                         /* Clear all existing */
655                         iowrite32(ioread32
656                                   (chip->vendor.iobase +
657                                    TPM_INT_STATUS(chip->vendor.locality)),
658                                   chip->vendor.iobase +
659                                   TPM_INT_STATUS(chip->vendor.locality));
660
661                         /* Turn on */
662                         iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
663                                   chip->vendor.iobase +
664                                   TPM_INT_ENABLE(chip->vendor.locality));
665
666                         chip->vendor.probed_irq = 0;
667
668                         /* Generate Interrupts */
669                         tpm_gen_interrupt(chip);
670
671                         chip->vendor.irq = chip->vendor.probed_irq;
672
673                         /* free_irq will call into tis_int_probe;
674                            clear all irqs we haven't seen while doing
675                            tpm_gen_interrupt */
676                         iowrite32(ioread32
677                                   (chip->vendor.iobase +
678                                    TPM_INT_STATUS(chip->vendor.locality)),
679                                   chip->vendor.iobase +
680                                   TPM_INT_STATUS(chip->vendor.locality));
681
682                         /* Turn off */
683                         iowrite32(intmask,
684                                   chip->vendor.iobase +
685                                   TPM_INT_ENABLE(chip->vendor.locality));
686                         free_irq(i, chip);
687                 }
688         }
689         if (chip->vendor.irq) {
690                 iowrite8(chip->vendor.irq,
691                          chip->vendor.iobase +
692                          TPM_INT_VECTOR(chip->vendor.locality));
693                 if (request_irq
694                     (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
695                      chip->vendor.miscdev.name, chip) != 0) {
696                         dev_info(chip->dev,
697                                  "Unable to request irq: %d for use\n",
698                                  chip->vendor.irq);
699                         chip->vendor.irq = 0;
700                 } else {
701                         /* Clear all existing */
702                         iowrite32(ioread32
703                                   (chip->vendor.iobase +
704                                    TPM_INT_STATUS(chip->vendor.locality)),
705                                   chip->vendor.iobase +
706                                   TPM_INT_STATUS(chip->vendor.locality));
707
708                         /* Turn on */
709                         iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
710                                   chip->vendor.iobase +
711                                   TPM_INT_ENABLE(chip->vendor.locality));
712                 }
713         }
714
715         INIT_LIST_HEAD(&chip->vendor.list);
716         spin_lock(&tis_lock);
717         list_add(&chip->vendor.list, &tis_chips);
718         spin_unlock(&tis_lock);
719
720         tpm_continue_selftest(chip);
721
722         return 0;
723 out_err:
724         if (chip->vendor.iobase)
725                 iounmap(chip->vendor.iobase);
726         tpm_remove_hardware(chip->dev);
727         return rc;
728 }
729
730 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
731 {
732         u32 intmask;
733
734         /* reenable interrupts that device may have lost or
735            BIOS/firmware may have disabled */
736         iowrite8(chip->vendor.irq, chip->vendor.iobase +
737                  TPM_INT_VECTOR(chip->vendor.locality));
738
739         intmask =
740             ioread32(chip->vendor.iobase +
741                      TPM_INT_ENABLE(chip->vendor.locality));
742
743         intmask |= TPM_INTF_CMD_READY_INT
744             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
745             | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
746
747         iowrite32(intmask,
748                   chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
749 }
750
751
752 #ifdef CONFIG_PNP
753 static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
754                                       const struct pnp_device_id *pnp_id)
755 {
756         resource_size_t start, len;
757         unsigned int irq = 0;
758
759         start = pnp_mem_start(pnp_dev, 0);
760         len = pnp_mem_len(pnp_dev, 0);
761
762         if (pnp_irq_valid(pnp_dev, 0))
763                 irq = pnp_irq(pnp_dev, 0);
764         else
765                 interrupts = 0;
766
767         if (is_itpm(pnp_dev))
768                 itpm = 1;
769
770         return tpm_tis_init(&pnp_dev->dev, start, len, irq);
771 }
772
773 static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
774 {
775         return tpm_pm_suspend(&dev->dev, msg);
776 }
777
778 static int tpm_tis_pnp_resume(struct pnp_dev *dev)
779 {
780         struct tpm_chip *chip = pnp_get_drvdata(dev);
781         int ret;
782
783         if (chip->vendor.irq)
784                 tpm_tis_reenable_interrupts(chip);
785
786         ret = tpm_pm_resume(&dev->dev);
787         if (!ret)
788                 tpm_continue_selftest(chip);
789
790         return ret;
791 }
792
793 static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
794         {"PNP0C31", 0},         /* TPM */
795         {"ATM1200", 0},         /* Atmel */
796         {"IFX0102", 0},         /* Infineon */
797         {"BCM0101", 0},         /* Broadcom */
798         {"BCM0102", 0},         /* Broadcom */
799         {"NSC1200", 0},         /* National */
800         {"ICO0102", 0},         /* Intel */
801         /* Add new here */
802         {"", 0},                /* User Specified */
803         {"", 0}                 /* Terminator */
804 };
805 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
806
807 static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev)
808 {
809         struct tpm_chip *chip = pnp_get_drvdata(dev);
810
811         tpm_dev_vendor_release(chip);
812
813         kfree(chip);
814 }
815
816
817 static struct pnp_driver tis_pnp_driver = {
818         .name = "tpm_tis",
819         .id_table = tpm_pnp_tbl,
820         .probe = tpm_tis_pnp_init,
821         .suspend = tpm_tis_pnp_suspend,
822         .resume = tpm_tis_pnp_resume,
823         .remove = tpm_tis_pnp_remove,
824 };
825
826 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
827 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
828                     sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
829 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
830 #endif
831 static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg)
832 {
833         return tpm_pm_suspend(&dev->dev, msg);
834 }
835
836 static int tpm_tis_resume(struct platform_device *dev)
837 {
838         struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
839
840         if (chip->vendor.irq)
841                 tpm_tis_reenable_interrupts(chip);
842
843         return tpm_pm_resume(&dev->dev);
844 }
845 static struct platform_driver tis_drv = {
846         .driver = {
847                 .name = "tpm_tis",
848                 .owner          = THIS_MODULE,
849         },
850         .suspend = tpm_tis_suspend,
851         .resume = tpm_tis_resume,
852 };
853
854 static struct platform_device *pdev;
855
856 static int force;
857 module_param(force, bool, 0444);
858 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
859 static int __init init_tis(void)
860 {
861         int rc;
862 #ifdef CONFIG_PNP
863         if (!force)
864                 return pnp_register_driver(&tis_pnp_driver);
865 #endif
866
867         rc = platform_driver_register(&tis_drv);
868         if (rc < 0)
869                 return rc;
870         if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0)))
871                 return PTR_ERR(pdev);
872         if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) {
873                 platform_device_unregister(pdev);
874                 platform_driver_unregister(&tis_drv);
875         }
876         return rc;
877 }
878
879 static void __exit cleanup_tis(void)
880 {
881         struct tpm_vendor_specific *i, *j;
882         struct tpm_chip *chip;
883         spin_lock(&tis_lock);
884         list_for_each_entry_safe(i, j, &tis_chips, list) {
885                 chip = to_tpm_chip(i);
886                 tpm_remove_hardware(chip->dev);
887                 iowrite32(~TPM_GLOBAL_INT_ENABLE &
888                           ioread32(chip->vendor.iobase +
889                                    TPM_INT_ENABLE(chip->vendor.
890                                                   locality)),
891                           chip->vendor.iobase +
892                           TPM_INT_ENABLE(chip->vendor.locality));
893                 release_locality(chip, chip->vendor.locality, 1);
894                 if (chip->vendor.irq)
895                         free_irq(chip->vendor.irq, chip);
896                 iounmap(i->iobase);
897                 list_del(&i->list);
898         }
899         spin_unlock(&tis_lock);
900 #ifdef CONFIG_PNP
901         if (!force) {
902                 pnp_unregister_driver(&tis_pnp_driver);
903                 return;
904         }
905 #endif
906         platform_device_unregister(pdev);
907         platform_driver_unregister(&tis_drv);
908 }
909
910 module_init(init_tis);
911 module_exit(cleanup_tis);
912 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
913 MODULE_DESCRIPTION("TPM Driver");
914 MODULE_VERSION("2.0");
915 MODULE_LICENSE("GPL");