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1 /*
2  * Copyright (c) 2010 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include "htc.h"
18
19 MODULE_AUTHOR("Atheros Communications");
20 MODULE_LICENSE("Dual BSD/GPL");
21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
22
23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
24 module_param_named(debug, ath9k_debug, uint, 0);
25 MODULE_PARM_DESC(debug, "Debugging mask");
26
27 int htc_modparam_nohwcrypt;
28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
30
31 #define CHAN2G(_freq, _idx)  { \
32         .center_freq = (_freq), \
33         .hw_value = (_idx), \
34         .max_power = 20, \
35 }
36
37 #define CHAN5G(_freq, _idx) { \
38         .band = IEEE80211_BAND_5GHZ, \
39         .center_freq = (_freq), \
40         .hw_value = (_idx), \
41         .max_power = 20, \
42 }
43
44 #define ATH_HTC_BTCOEX_PRODUCT_ID "wb193"
45
46 static struct ieee80211_channel ath9k_2ghz_channels[] = {
47         CHAN2G(2412, 0), /* Channel 1 */
48         CHAN2G(2417, 1), /* Channel 2 */
49         CHAN2G(2422, 2), /* Channel 3 */
50         CHAN2G(2427, 3), /* Channel 4 */
51         CHAN2G(2432, 4), /* Channel 5 */
52         CHAN2G(2437, 5), /* Channel 6 */
53         CHAN2G(2442, 6), /* Channel 7 */
54         CHAN2G(2447, 7), /* Channel 8 */
55         CHAN2G(2452, 8), /* Channel 9 */
56         CHAN2G(2457, 9), /* Channel 10 */
57         CHAN2G(2462, 10), /* Channel 11 */
58         CHAN2G(2467, 11), /* Channel 12 */
59         CHAN2G(2472, 12), /* Channel 13 */
60         CHAN2G(2484, 13), /* Channel 14 */
61 };
62
63 static struct ieee80211_channel ath9k_5ghz_channels[] = {
64         /* _We_ call this UNII 1 */
65         CHAN5G(5180, 14), /* Channel 36 */
66         CHAN5G(5200, 15), /* Channel 40 */
67         CHAN5G(5220, 16), /* Channel 44 */
68         CHAN5G(5240, 17), /* Channel 48 */
69         /* _We_ call this UNII 2 */
70         CHAN5G(5260, 18), /* Channel 52 */
71         CHAN5G(5280, 19), /* Channel 56 */
72         CHAN5G(5300, 20), /* Channel 60 */
73         CHAN5G(5320, 21), /* Channel 64 */
74         /* _We_ call this "Middle band" */
75         CHAN5G(5500, 22), /* Channel 100 */
76         CHAN5G(5520, 23), /* Channel 104 */
77         CHAN5G(5540, 24), /* Channel 108 */
78         CHAN5G(5560, 25), /* Channel 112 */
79         CHAN5G(5580, 26), /* Channel 116 */
80         CHAN5G(5600, 27), /* Channel 120 */
81         CHAN5G(5620, 28), /* Channel 124 */
82         CHAN5G(5640, 29), /* Channel 128 */
83         CHAN5G(5660, 30), /* Channel 132 */
84         CHAN5G(5680, 31), /* Channel 136 */
85         CHAN5G(5700, 32), /* Channel 140 */
86         /* _We_ call this UNII 3 */
87         CHAN5G(5745, 33), /* Channel 149 */
88         CHAN5G(5765, 34), /* Channel 153 */
89         CHAN5G(5785, 35), /* Channel 157 */
90         CHAN5G(5805, 36), /* Channel 161 */
91         CHAN5G(5825, 37), /* Channel 165 */
92 };
93
94 /* Atheros hardware rate code addition for short premble */
95 #define SHPCHECK(__hw_rate, __flags) \
96         ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
97
98 #define RATE(_bitrate, _hw_rate, _flags) {              \
99         .bitrate        = (_bitrate),                   \
100         .flags          = (_flags),                     \
101         .hw_value       = (_hw_rate),                   \
102         .hw_value_short = (SHPCHECK(_hw_rate, _flags))  \
103 }
104
105 static struct ieee80211_rate ath9k_legacy_rates[] = {
106         RATE(10, 0x1b, 0),
107         RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
108         RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
109         RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
110         RATE(60, 0x0b, 0),
111         RATE(90, 0x0f, 0),
112         RATE(120, 0x0a, 0),
113         RATE(180, 0x0e, 0),
114         RATE(240, 0x09, 0),
115         RATE(360, 0x0d, 0),
116         RATE(480, 0x08, 0),
117         RATE(540, 0x0c, 0),
118 };
119
120 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
121 {
122         int time_left;
123
124         if (atomic_read(&priv->htc->tgt_ready) > 0) {
125                 atomic_dec(&priv->htc->tgt_ready);
126                 return 0;
127         }
128
129         /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
130         time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
131         if (!time_left) {
132                 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
133                 return -ETIMEDOUT;
134         }
135
136         atomic_dec(&priv->htc->tgt_ready);
137
138         return 0;
139 }
140
141 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
142 {
143         ath9k_htc_exit_debug(priv->ah);
144         ath9k_hw_deinit(priv->ah);
145         tasklet_kill(&priv->wmi_tasklet);
146         tasklet_kill(&priv->rx_tasklet);
147         tasklet_kill(&priv->tx_tasklet);
148         kfree(priv->ah);
149         priv->ah = NULL;
150 }
151
152 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
153 {
154         struct ieee80211_hw *hw = priv->hw;
155
156         wiphy_rfkill_stop_polling(hw->wiphy);
157         ath9k_deinit_leds(priv);
158         ieee80211_unregister_hw(hw);
159         ath9k_rx_cleanup(priv);
160         ath9k_tx_cleanup(priv);
161         ath9k_deinit_priv(priv);
162 }
163
164 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
165                                         u16 service_id,
166                                         void (*tx) (void *,
167                                                     struct sk_buff *,
168                                                     enum htc_endpoint_id,
169                                                     bool txok),
170                                         enum htc_endpoint_id *ep_id)
171 {
172         struct htc_service_connreq req;
173
174         memset(&req, 0, sizeof(struct htc_service_connreq));
175
176         req.service_id = service_id;
177         req.ep_callbacks.priv = priv;
178         req.ep_callbacks.rx = ath9k_htc_rxep;
179         req.ep_callbacks.tx = tx;
180
181         return htc_connect_service(priv->htc, &req, ep_id);
182 }
183
184 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid)
185 {
186         int ret;
187
188         /* WMI CMD*/
189         ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
190         if (ret)
191                 goto err;
192
193         /* Beacon */
194         ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
195                                     &priv->beacon_ep);
196         if (ret)
197                 goto err;
198
199         /* CAB */
200         ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
201                                     &priv->cab_ep);
202         if (ret)
203                 goto err;
204
205
206         /* UAPSD */
207         ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
208                                     &priv->uapsd_ep);
209         if (ret)
210                 goto err;
211
212         /* MGMT */
213         ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
214                                     &priv->mgmt_ep);
215         if (ret)
216                 goto err;
217
218         /* DATA BE */
219         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
220                                     &priv->data_be_ep);
221         if (ret)
222                 goto err;
223
224         /* DATA BK */
225         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
226                                     &priv->data_bk_ep);
227         if (ret)
228                 goto err;
229
230         /* DATA VI */
231         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
232                                     &priv->data_vi_ep);
233         if (ret)
234                 goto err;
235
236         /* DATA VO */
237         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
238                                     &priv->data_vo_ep);
239         if (ret)
240                 goto err;
241
242         /*
243          * Setup required credits before initializing HTC.
244          * This is a bit hacky, but, since queuing is done in
245          * the HIF layer, shouldn't matter much.
246          */
247
248         switch(devid) {
249         case 0x7010:
250         case 0x7015:
251         case 0x9018:
252         case 0xA704:
253         case 0x1200:
254                 priv->htc->credits = 45;
255                 break;
256         default:
257                 priv->htc->credits = 33;
258         }
259
260         ret = htc_init(priv->htc);
261         if (ret)
262                 goto err;
263
264         dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
265                  priv->htc->credits);
266
267         return 0;
268
269 err:
270         dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
271         return ret;
272 }
273
274 static int ath9k_reg_notifier(struct wiphy *wiphy,
275                               struct regulatory_request *request)
276 {
277         struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
278         struct ath9k_htc_priv *priv = hw->priv;
279
280         return ath_reg_notifier_apply(wiphy, request,
281                                       ath9k_hw_regulatory(priv->ah));
282 }
283
284 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
285 {
286         struct ath_hw *ah = (struct ath_hw *) hw_priv;
287         struct ath_common *common = ath9k_hw_common(ah);
288         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
289         __be32 val, reg = cpu_to_be32(reg_offset);
290         int r;
291
292         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
293                           (u8 *) &reg, sizeof(reg),
294                           (u8 *) &val, sizeof(val),
295                           100);
296         if (unlikely(r)) {
297                 ath_print(common, ATH_DBG_WMI,
298                           "REGISTER READ FAILED: (0x%04x, %d)\n",
299                            reg_offset, r);
300                 return -EIO;
301         }
302
303         return be32_to_cpu(val);
304 }
305
306 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
307 {
308         struct ath_hw *ah = (struct ath_hw *) hw_priv;
309         struct ath_common *common = ath9k_hw_common(ah);
310         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
311         __be32 buf[2] = {
312                 cpu_to_be32(reg_offset),
313                 cpu_to_be32(val),
314         };
315         int r;
316
317         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
318                           (u8 *) &buf, sizeof(buf),
319                           (u8 *) &val, sizeof(val),
320                           100);
321         if (unlikely(r)) {
322                 ath_print(common, ATH_DBG_WMI,
323                           "REGISTER WRITE FAILED:(0x%04x, %d)\n",
324                           reg_offset, r);
325         }
326 }
327
328 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
329 {
330         struct ath_hw *ah = (struct ath_hw *) hw_priv;
331         struct ath_common *common = ath9k_hw_common(ah);
332         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
333         u32 rsp_status;
334         int r;
335
336         mutex_lock(&priv->wmi->multi_write_mutex);
337
338         /* Store the register/value */
339         priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
340                 cpu_to_be32(reg_offset);
341         priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
342                 cpu_to_be32(val);
343
344         priv->wmi->multi_write_idx++;
345
346         /* If the buffer is full, send it out. */
347         if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
348                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
349                           (u8 *) &priv->wmi->multi_write,
350                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
351                           (u8 *) &rsp_status, sizeof(rsp_status),
352                           100);
353                 if (unlikely(r)) {
354                         ath_print(common, ATH_DBG_WMI,
355                                   "REGISTER WRITE FAILED, multi len: %d\n",
356                                   priv->wmi->multi_write_idx);
357                 }
358                 priv->wmi->multi_write_idx = 0;
359         }
360
361         mutex_unlock(&priv->wmi->multi_write_mutex);
362 }
363
364 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
365 {
366         struct ath_hw *ah = (struct ath_hw *) hw_priv;
367         struct ath_common *common = ath9k_hw_common(ah);
368         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
369
370         if (atomic_read(&priv->wmi->mwrite_cnt))
371                 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
372         else
373                 ath9k_regwrite_single(hw_priv, val, reg_offset);
374 }
375
376 static void ath9k_enable_regwrite_buffer(void *hw_priv)
377 {
378         struct ath_hw *ah = (struct ath_hw *) hw_priv;
379         struct ath_common *common = ath9k_hw_common(ah);
380         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
381
382         atomic_inc(&priv->wmi->mwrite_cnt);
383 }
384
385 static void ath9k_regwrite_flush(void *hw_priv)
386 {
387         struct ath_hw *ah = (struct ath_hw *) hw_priv;
388         struct ath_common *common = ath9k_hw_common(ah);
389         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
390         u32 rsp_status;
391         int r;
392
393         atomic_dec(&priv->wmi->mwrite_cnt);
394
395         mutex_lock(&priv->wmi->multi_write_mutex);
396
397         if (priv->wmi->multi_write_idx) {
398                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
399                           (u8 *) &priv->wmi->multi_write,
400                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
401                           (u8 *) &rsp_status, sizeof(rsp_status),
402                           100);
403                 if (unlikely(r)) {
404                         ath_print(common, ATH_DBG_WMI,
405                                   "REGISTER WRITE FAILED, multi len: %d\n",
406                                   priv->wmi->multi_write_idx);
407                 }
408                 priv->wmi->multi_write_idx = 0;
409         }
410
411         mutex_unlock(&priv->wmi->multi_write_mutex);
412 }
413
414 static const struct ath_ops ath9k_common_ops = {
415         .read = ath9k_regread,
416         .write = ath9k_regwrite,
417         .enable_write_buffer = ath9k_enable_regwrite_buffer,
418         .write_flush = ath9k_regwrite_flush,
419 };
420
421 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
422 {
423         *csz = L1_CACHE_BYTES >> 2;
424 }
425
426 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
427 {
428         struct ath_hw *ah = (struct ath_hw *) common->ah;
429
430         (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
431
432         if (!ath9k_hw_wait(ah,
433                            AR_EEPROM_STATUS_DATA,
434                            AR_EEPROM_STATUS_DATA_BUSY |
435                            AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
436                            AH_WAIT_TIMEOUT))
437                 return false;
438
439         *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
440                    AR_EEPROM_STATUS_DATA_VAL);
441
442         return true;
443 }
444
445 static const struct ath_bus_ops ath9k_usb_bus_ops = {
446         .ath_bus_type = ATH_USB,
447         .read_cachesize = ath_usb_read_cachesize,
448         .eeprom_read = ath_usb_eeprom_read,
449 };
450
451 static void setup_ht_cap(struct ath9k_htc_priv *priv,
452                          struct ieee80211_sta_ht_cap *ht_info)
453 {
454         struct ath_common *common = ath9k_hw_common(priv->ah);
455         u8 tx_streams, rx_streams;
456         int i;
457
458         ht_info->ht_supported = true;
459         ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
460                        IEEE80211_HT_CAP_SM_PS |
461                        IEEE80211_HT_CAP_SGI_40 |
462                        IEEE80211_HT_CAP_DSSSCCK40;
463
464         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
465                 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
466
467         ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
468
469         ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
470         ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
471
472         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
473
474         /* ath9k_htc supports only 1 or 2 stream devices */
475         tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
476         rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
477
478         ath_print(common, ATH_DBG_CONFIG,
479                   "TX streams %d, RX streams: %d\n",
480                   tx_streams, rx_streams);
481
482         if (tx_streams != rx_streams) {
483                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
484                 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
485                                            IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
486         }
487
488         for (i = 0; i < rx_streams; i++)
489                 ht_info->mcs.rx_mask[i] = 0xff;
490
491         ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
492 }
493
494 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
495 {
496         struct ath_common *common = ath9k_hw_common(priv->ah);
497         int i;
498
499         for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
500                 priv->hwq_map[i] = -1;
501
502         priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
503         if (priv->beaconq == -1) {
504                 ath_print(common, ATH_DBG_FATAL,
505                           "Unable to setup BEACON xmit queue\n");
506                 goto err;
507         }
508
509         priv->cabq = ath9k_htc_cabq_setup(priv);
510         if (priv->cabq == -1) {
511                 ath_print(common, ATH_DBG_FATAL,
512                           "Unable to setup CAB xmit queue\n");
513                 goto err;
514         }
515
516         if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
517                 ath_print(common, ATH_DBG_FATAL,
518                           "Unable to setup xmit queue for BE traffic\n");
519                 goto err;
520         }
521
522         if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
523                 ath_print(common, ATH_DBG_FATAL,
524                           "Unable to setup xmit queue for BK traffic\n");
525                 goto err;
526         }
527         if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
528                 ath_print(common, ATH_DBG_FATAL,
529                           "Unable to setup xmit queue for VI traffic\n");
530                 goto err;
531         }
532         if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
533                 ath_print(common, ATH_DBG_FATAL,
534                           "Unable to setup xmit queue for VO traffic\n");
535                 goto err;
536         }
537
538         return 0;
539
540 err:
541         return -EINVAL;
542 }
543
544 static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
545 {
546         struct ath_common *common = ath9k_hw_common(priv->ah);
547         int i = 0;
548
549         /* Get the hardware key cache size. */
550         common->keymax = priv->ah->caps.keycache_size;
551         if (common->keymax > ATH_KEYMAX) {
552                 ath_print(common, ATH_DBG_ANY,
553                           "Warning, using only %u entries in %u key cache\n",
554                           ATH_KEYMAX, common->keymax);
555                 common->keymax = ATH_KEYMAX;
556         }
557
558         if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
559                 common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
560
561         /*
562          * Reset the key cache since some parts do not
563          * reset the contents on initial power up.
564          */
565         for (i = 0; i < common->keymax; i++)
566                 ath_hw_keyreset(common, (u16) i);
567 }
568
569 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
570 {
571         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
572                 priv->sbands[IEEE80211_BAND_2GHZ].channels =
573                         ath9k_2ghz_channels;
574                 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
575                 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
576                         ARRAY_SIZE(ath9k_2ghz_channels);
577                 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
578                 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
579                         ARRAY_SIZE(ath9k_legacy_rates);
580         }
581
582         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
583                 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
584                 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
585                 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
586                         ARRAY_SIZE(ath9k_5ghz_channels);
587                 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
588                         ath9k_legacy_rates + 4;
589                 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
590                         ARRAY_SIZE(ath9k_legacy_rates) - 4;
591         }
592 }
593
594 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
595 {
596         struct ath_common *common = ath9k_hw_common(priv->ah);
597
598         common->tx_chainmask = priv->ah->caps.tx_chainmask;
599         common->rx_chainmask = priv->ah->caps.rx_chainmask;
600
601         memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
602
603         priv->ah->opmode = NL80211_IFTYPE_STATION;
604 }
605
606 static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
607 {
608         int qnum;
609
610         switch (priv->ah->btcoex_hw.scheme) {
611         case ATH_BTCOEX_CFG_NONE:
612                 break;
613         case ATH_BTCOEX_CFG_3WIRE:
614                 priv->ah->btcoex_hw.btactive_gpio = 7;
615                 priv->ah->btcoex_hw.btpriority_gpio = 6;
616                 priv->ah->btcoex_hw.wlanactive_gpio = 8;
617                 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
618                 ath9k_hw_btcoex_init_3wire(priv->ah);
619                 ath_htc_init_btcoex_work(priv);
620                 qnum = priv->hwq_map[WME_AC_BE];
621                 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
622                 break;
623         default:
624                 WARN_ON(1);
625                 break;
626         }
627 }
628
629 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
630                            u16 devid, char *product)
631 {
632         struct ath_hw *ah = NULL;
633         struct ath_common *common;
634         int ret = 0, csz = 0;
635
636         priv->op_flags |= OP_INVALID;
637
638         ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
639         if (!ah)
640                 return -ENOMEM;
641
642         ah->hw_version.devid = devid;
643         ah->hw_version.subsysid = 0; /* FIXME */
644         priv->ah = ah;
645
646         common = ath9k_hw_common(ah);
647         common->ops = &ath9k_common_ops;
648         common->bus_ops = &ath9k_usb_bus_ops;
649         common->ah = ah;
650         common->hw = priv->hw;
651         common->priv = priv;
652         common->debug_mask = ath9k_debug;
653
654         spin_lock_init(&priv->wmi->wmi_lock);
655         spin_lock_init(&priv->beacon_lock);
656         spin_lock_init(&priv->tx_lock);
657         mutex_init(&priv->mutex);
658         mutex_init(&priv->htc_pm_lock);
659         tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
660                      (unsigned long)priv);
661         tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
662                      (unsigned long)priv);
663         tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
664         INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
665         INIT_WORK(&priv->ps_work, ath9k_ps_work);
666
667         /*
668          * Cache line size is used to size and align various
669          * structures used to communicate with the hardware.
670          */
671         ath_read_cachesize(common, &csz);
672         common->cachelsz = csz << 2; /* convert to bytes */
673
674         ret = ath9k_hw_init(ah);
675         if (ret) {
676                 ath_print(common, ATH_DBG_FATAL,
677                           "Unable to initialize hardware; "
678                           "initialization status: %d\n", ret);
679                 goto err_hw;
680         }
681
682         ret = ath9k_htc_init_debug(ah);
683         if (ret) {
684                 ath_print(common, ATH_DBG_FATAL,
685                           "Unable to create debugfs files\n");
686                 goto err_debug;
687         }
688
689         ret = ath9k_init_queues(priv);
690         if (ret)
691                 goto err_queues;
692
693         ath9k_init_crypto(priv);
694         ath9k_init_channels_rates(priv);
695         ath9k_init_misc(priv);
696
697         if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
698                 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
699                 ath9k_init_btcoex(priv);
700         }
701
702         return 0;
703
704 err_queues:
705         ath9k_htc_exit_debug(ah);
706 err_debug:
707         ath9k_hw_deinit(ah);
708 err_hw:
709
710         kfree(ah);
711         priv->ah = NULL;
712
713         return ret;
714 }
715
716 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
717                                struct ieee80211_hw *hw)
718 {
719         struct ath_common *common = ath9k_hw_common(priv->ah);
720
721         hw->flags = IEEE80211_HW_SIGNAL_DBM |
722                 IEEE80211_HW_AMPDU_AGGREGATION |
723                 IEEE80211_HW_SPECTRUM_MGMT |
724                 IEEE80211_HW_HAS_RATE_CONTROL |
725                 IEEE80211_HW_RX_INCLUDES_FCS |
726                 IEEE80211_HW_SUPPORTS_PS |
727                 IEEE80211_HW_PS_NULLFUNC_STACK;
728
729         hw->wiphy->interface_modes =
730                 BIT(NL80211_IFTYPE_STATION) |
731                 BIT(NL80211_IFTYPE_ADHOC);
732
733         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
734
735         hw->queues = 4;
736         hw->channel_change_time = 5000;
737         hw->max_listen_interval = 10;
738         hw->vif_data_size = sizeof(struct ath9k_htc_vif);
739         hw->sta_data_size = sizeof(struct ath9k_htc_sta);
740
741         /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
742         hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
743                 sizeof(struct htc_frame_hdr) + 4;
744
745         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
746                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
747                         &priv->sbands[IEEE80211_BAND_2GHZ];
748         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
749                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
750                         &priv->sbands[IEEE80211_BAND_5GHZ];
751
752         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
753                 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
754                         setup_ht_cap(priv,
755                                      &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
756                 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
757                         setup_ht_cap(priv,
758                                      &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
759         }
760
761         SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
762 }
763
764 static int ath9k_init_device(struct ath9k_htc_priv *priv,
765                              u16 devid, char *product)
766 {
767         struct ieee80211_hw *hw = priv->hw;
768         struct ath_common *common;
769         struct ath_hw *ah;
770         int error = 0;
771         struct ath_regulatory *reg;
772
773         /* Bring up device */
774         error = ath9k_init_priv(priv, devid, product);
775         if (error != 0)
776                 goto err_init;
777
778         ah = priv->ah;
779         common = ath9k_hw_common(ah);
780         ath9k_set_hw_capab(priv, hw);
781
782         /* Initialize regulatory */
783         error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
784                               ath9k_reg_notifier);
785         if (error)
786                 goto err_regd;
787
788         reg = &common->regulatory;
789
790         /* Setup TX */
791         error = ath9k_tx_init(priv);
792         if (error != 0)
793                 goto err_tx;
794
795         /* Setup RX */
796         error = ath9k_rx_init(priv);
797         if (error != 0)
798                 goto err_rx;
799
800         /* Register with mac80211 */
801         error = ieee80211_register_hw(hw);
802         if (error)
803                 goto err_register;
804
805         /* Handle world regulatory */
806         if (!ath_is_world_regd(reg)) {
807                 error = regulatory_hint(hw->wiphy, reg->alpha2);
808                 if (error)
809                         goto err_world;
810         }
811
812         ath9k_init_leds(priv);
813         ath9k_start_rfkill_poll(priv);
814
815         return 0;
816
817 err_world:
818         ieee80211_unregister_hw(hw);
819 err_register:
820         ath9k_rx_cleanup(priv);
821 err_rx:
822         ath9k_tx_cleanup(priv);
823 err_tx:
824         /* Nothing */
825 err_regd:
826         ath9k_deinit_priv(priv);
827 err_init:
828         return error;
829 }
830
831 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
832                            u16 devid, char *product)
833 {
834         struct ieee80211_hw *hw;
835         struct ath9k_htc_priv *priv;
836         int ret;
837
838         hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
839         if (!hw)
840                 return -ENOMEM;
841
842         priv = hw->priv;
843         priv->hw = hw;
844         priv->htc = htc_handle;
845         priv->dev = dev;
846         htc_handle->drv_priv = priv;
847         SET_IEEE80211_DEV(hw, priv->dev);
848
849         ret = ath9k_htc_wait_for_target(priv);
850         if (ret)
851                 goto err_free;
852
853         priv->wmi = ath9k_init_wmi(priv);
854         if (!priv->wmi) {
855                 ret = -EINVAL;
856                 goto err_free;
857         }
858
859         ret = ath9k_init_htc_services(priv, devid);
860         if (ret)
861                 goto err_init;
862
863         /* The device may have been unplugged earlier. */
864         priv->op_flags &= ~OP_UNPLUGGED;
865
866         ret = ath9k_init_device(priv, devid, product);
867         if (ret)
868                 goto err_init;
869
870         return 0;
871
872 err_init:
873         ath9k_deinit_wmi(priv);
874 err_free:
875         ieee80211_free_hw(hw);
876         return ret;
877 }
878
879 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
880 {
881         if (htc_handle->drv_priv) {
882
883                 /* Check if the device has been yanked out. */
884                 if (hotunplug)
885                         htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
886
887                 ath9k_deinit_device(htc_handle->drv_priv);
888                 ath9k_deinit_wmi(htc_handle->drv_priv);
889                 ieee80211_free_hw(htc_handle->drv_priv->hw);
890         }
891 }
892
893 #ifdef CONFIG_PM
894
895 void ath9k_htc_suspend(struct htc_target *htc_handle)
896 {
897         ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
898 }
899
900 int ath9k_htc_resume(struct htc_target *htc_handle)
901 {
902         int ret;
903
904         ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
905         if (ret)
906                 return ret;
907
908         ret = ath9k_init_htc_services(htc_handle->drv_priv,
909                               htc_handle->drv_priv->ah->hw_version.devid);
910         return ret;
911 }
912 #endif
913
914 static int __init ath9k_htc_init(void)
915 {
916         int error;
917
918         error = ath9k_htc_debug_create_root();
919         if (error < 0) {
920                 printk(KERN_ERR
921                         "ath9k_htc: Unable to create debugfs root: %d\n",
922                         error);
923                 goto err_dbg;
924         }
925
926         error = ath9k_hif_usb_init();
927         if (error < 0) {
928                 printk(KERN_ERR
929                         "ath9k_htc: No USB devices found,"
930                         " driver not installed.\n");
931                 error = -ENODEV;
932                 goto err_usb;
933         }
934
935         return 0;
936
937 err_usb:
938         ath9k_htc_debug_remove_root();
939 err_dbg:
940         return error;
941 }
942 module_init(ath9k_htc_init);
943
944 static void __exit ath9k_htc_exit(void)
945 {
946         ath9k_hif_usb_exit();
947         ath9k_htc_debug_remove_root();
948         printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
949 }
950 module_exit(ath9k_htc_exit);