ath9k_hw: warn if we cannot change the power to the chip
[~shefty/rdma-dev.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2  * Copyright (c) 2008-2009 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_update_txpow(struct ath_softc *sc)
22 {
23         struct ath_hw *ah = sc->sc_ah;
24
25         if (sc->curtxpow != sc->config.txpowlimit) {
26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27                 /* read back in case value is clamped */
28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29         }
30 }
31
32 static u8 parse_mpdudensity(u8 mpdudensity)
33 {
34         /*
35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36          *   0 for no restriction
37          *   1 for 1/4 us
38          *   2 for 1/2 us
39          *   3 for 1 us
40          *   4 for 2 us
41          *   5 for 4 us
42          *   6 for 8 us
43          *   7 for 16 us
44          */
45         switch (mpdudensity) {
46         case 0:
47                 return 0;
48         case 1:
49         case 2:
50         case 3:
51                 /* Our lower layer calculations limit our precision to
52                    1 microsecond */
53                 return 1;
54         case 4:
55                 return 2;
56         case 5:
57                 return 4;
58         case 6:
59                 return 8;
60         case 7:
61                 return 16;
62         default:
63                 return 0;
64         }
65 }
66
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68                                                 struct ieee80211_hw *hw)
69 {
70         struct ieee80211_channel *curchan = hw->conf.channel;
71         struct ath9k_channel *channel;
72         u8 chan_idx;
73
74         chan_idx = curchan->hw_value;
75         channel = &sc->sc_ah->channels[chan_idx];
76         ath9k_update_ichannel(sc, hw, channel);
77         return channel;
78 }
79
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81 {
82         unsigned long flags;
83         bool ret;
84
85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89         return ret;
90 }
91
92 void ath9k_ps_wakeup(struct ath_softc *sc)
93 {
94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95         unsigned long flags;
96         enum ath9k_power_mode power_mode;
97
98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
99         if (++sc->ps_usecount != 1)
100                 goto unlock;
101
102         power_mode = sc->sc_ah->power_mode;
103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104
105         /*
106          * While the hardware is asleep, the cycle counters contain no
107          * useful data. Better clear them now so that they don't mess up
108          * survey data results.
109          */
110         if (power_mode != ATH9K_PM_AWAKE) {
111                 spin_lock(&common->cc_lock);
112                 ath_hw_cycle_counters_update(common);
113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114                 spin_unlock(&common->cc_lock);
115         }
116
117  unlock:
118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
119 }
120
121 void ath9k_ps_restore(struct ath_softc *sc)
122 {
123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124         unsigned long flags;
125
126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
127         if (--sc->ps_usecount != 0)
128                 goto unlock;
129
130         spin_lock(&common->cc_lock);
131         ath_hw_cycle_counters_update(common);
132         spin_unlock(&common->cc_lock);
133
134         if (sc->ps_idle)
135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136         else if (sc->ps_enabled &&
137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138                               PS_WAIT_FOR_CAB |
139                               PS_WAIT_FOR_PSPOLL_DATA |
140                               PS_WAIT_FOR_TX_ACK)))
141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
142
143  unlock:
144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
145 }
146
147 static void ath_start_ani(struct ath_common *common)
148 {
149         struct ath_hw *ah = common->ah;
150         unsigned long timestamp = jiffies_to_msecs(jiffies);
151         struct ath_softc *sc = (struct ath_softc *) common->priv;
152
153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
154                 return;
155
156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
157                 return;
158
159         common->ani.longcal_timer = timestamp;
160         common->ani.shortcal_timer = timestamp;
161         common->ani.checkani_timer = timestamp;
162
163         mod_timer(&common->ani.timer,
164                   jiffies +
165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
166 }
167
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
169 {
170         struct ath_hw *ah = sc->sc_ah;
171         struct ath9k_channel *chan = &ah->channels[channel];
172         struct survey_info *survey = &sc->survey[channel];
173
174         if (chan->noisefloor) {
175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
176                 survey->noise = chan->noisefloor;
177         }
178 }
179
180 static void ath_update_survey_stats(struct ath_softc *sc)
181 {
182         struct ath_hw *ah = sc->sc_ah;
183         struct ath_common *common = ath9k_hw_common(ah);
184         int pos = ah->curchan - &ah->channels[0];
185         struct survey_info *survey = &sc->survey[pos];
186         struct ath_cycle_counters *cc = &common->cc_survey;
187         unsigned int div = common->clockrate * 1000;
188
189         if (!ah->curchan)
190                 return;
191
192         if (ah->power_mode == ATH9K_PM_AWAKE)
193                 ath_hw_cycle_counters_update(common);
194
195         if (cc->cycles > 0) {
196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
198                         SURVEY_INFO_CHANNEL_TIME_RX |
199                         SURVEY_INFO_CHANNEL_TIME_TX;
200                 survey->channel_time += cc->cycles / div;
201                 survey->channel_time_busy += cc->rx_busy / div;
202                 survey->channel_time_rx += cc->rx_frame / div;
203                 survey->channel_time_tx += cc->tx_frame / div;
204         }
205         memset(cc, 0, sizeof(*cc));
206
207         ath_update_survey_nf(sc, pos);
208 }
209
210 /*
211  * Set/change channels.  If the channel is really being changed, it's done
212  * by reseting the chip.  To accomplish this we must first cleanup any pending
213  * DMA, then restart stuff.
214 */
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216                     struct ath9k_channel *hchan)
217 {
218         struct ath_wiphy *aphy = hw->priv;
219         struct ath_hw *ah = sc->sc_ah;
220         struct ath_common *common = ath9k_hw_common(ah);
221         struct ieee80211_conf *conf = &common->hw->conf;
222         bool fastcc = true, stopped;
223         struct ieee80211_channel *channel = hw->conf.channel;
224         struct ath9k_hw_cal_data *caldata = NULL;
225         int r;
226
227         if (sc->sc_flags & SC_OP_INVALID)
228                 return -EIO;
229
230         del_timer_sync(&common->ani.timer);
231         cancel_work_sync(&sc->paprd_work);
232         cancel_work_sync(&sc->hw_check_work);
233         cancel_delayed_work_sync(&sc->tx_complete_work);
234
235         ath9k_ps_wakeup(sc);
236
237         spin_lock_bh(&sc->sc_pcu_lock);
238
239         /*
240          * This is only performed if the channel settings have
241          * actually changed.
242          *
243          * To switch channels clear any pending DMA operations;
244          * wait long enough for the RX fifo to drain, reset the
245          * hardware at the new frequency, and then re-enable
246          * the relevant bits of the h/w.
247          */
248         ath9k_hw_disable_interrupts(ah);
249         ath_drain_all_txq(sc, false);
250
251         stopped = ath_stoprecv(sc);
252
253         /* XXX: do not flush receive queue here. We don't want
254          * to flush data frames already in queue because of
255          * changing channel. */
256
257         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
258                 fastcc = false;
259
260         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
261                 caldata = &aphy->caldata;
262
263         ath_dbg(common, ATH_DBG_CONFIG,
264                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
265                 sc->sc_ah->curchan->channel,
266                 channel->center_freq, conf_is_ht40(conf),
267                 fastcc);
268
269         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
270         if (r) {
271                 ath_err(common,
272                         "Unable to reset channel (%u MHz), reset status %d\n",
273                         channel->center_freq, r);
274                 goto ps_restore;
275         }
276
277         if (ath_startrecv(sc) != 0) {
278                 ath_err(common, "Unable to restart recv logic\n");
279                 r = -EIO;
280                 goto ps_restore;
281         }
282
283         ath_update_txpow(sc);
284         ath9k_hw_set_interrupts(ah, ah->imask);
285
286         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
287                 ath_beacon_config(sc, NULL);
288                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
289                 ath_start_ani(common);
290         }
291
292  ps_restore:
293         spin_unlock_bh(&sc->sc_pcu_lock);
294
295         ath9k_ps_restore(sc);
296         return r;
297 }
298
299 static void ath_paprd_activate(struct ath_softc *sc)
300 {
301         struct ath_hw *ah = sc->sc_ah;
302         struct ath9k_hw_cal_data *caldata = ah->caldata;
303         struct ath_common *common = ath9k_hw_common(ah);
304         int chain;
305
306         if (!caldata || !caldata->paprd_done)
307                 return;
308
309         ath9k_ps_wakeup(sc);
310         ar9003_paprd_enable(ah, false);
311         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
312                 if (!(common->tx_chainmask & BIT(chain)))
313                         continue;
314
315                 ar9003_paprd_populate_single_table(ah, caldata, chain);
316         }
317
318         ar9003_paprd_enable(ah, true);
319         ath9k_ps_restore(sc);
320 }
321
322 void ath_paprd_calibrate(struct work_struct *work)
323 {
324         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
325         struct ieee80211_hw *hw = sc->hw;
326         struct ath_hw *ah = sc->sc_ah;
327         struct ieee80211_hdr *hdr;
328         struct sk_buff *skb = NULL;
329         struct ieee80211_tx_info *tx_info;
330         int band = hw->conf.channel->band;
331         struct ieee80211_supported_band *sband = &sc->sbands[band];
332         struct ath_tx_control txctl;
333         struct ath9k_hw_cal_data *caldata = ah->caldata;
334         struct ath_common *common = ath9k_hw_common(ah);
335         int ftype;
336         int chain_ok = 0;
337         int chain;
338         int len = 1800;
339         int time_left;
340         int i;
341
342         if (!caldata)
343                 return;
344
345         skb = alloc_skb(len, GFP_KERNEL);
346         if (!skb)
347                 return;
348
349         tx_info = IEEE80211_SKB_CB(skb);
350
351         skb_put(skb, len);
352         memset(skb->data, 0, len);
353         hdr = (struct ieee80211_hdr *)skb->data;
354         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
355         hdr->frame_control = cpu_to_le16(ftype);
356         hdr->duration_id = cpu_to_le16(10);
357         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
358         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
359         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
360
361         memset(&txctl, 0, sizeof(txctl));
362         txctl.txq = sc->tx.txq_map[WME_AC_BE];
363
364         ath9k_ps_wakeup(sc);
365         ar9003_paprd_init_table(ah);
366         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
367                 if (!(common->tx_chainmask & BIT(chain)))
368                         continue;
369
370                 chain_ok = 0;
371                 memset(tx_info, 0, sizeof(*tx_info));
372                 tx_info->band = band;
373
374                 for (i = 0; i < 4; i++) {
375                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
376                         tx_info->control.rates[i].count = 6;
377                 }
378
379                 init_completion(&sc->paprd_complete);
380                 sc->paprd_pending = true;
381                 ar9003_paprd_setup_gain_table(ah, chain);
382                 txctl.paprd = BIT(chain);
383                 if (ath_tx_start(hw, skb, &txctl) != 0)
384                         break;
385
386                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
387                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
388                 sc->paprd_pending = false;
389                 if (!time_left) {
390                         ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
391                                 "Timeout waiting for paprd training on TX chain %d\n",
392                                 chain);
393                         goto fail_paprd;
394                 }
395
396                 if (!ar9003_paprd_is_done(ah))
397                         break;
398
399                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
400                         break;
401
402                 chain_ok = 1;
403         }
404         kfree_skb(skb);
405
406         if (chain_ok) {
407                 caldata->paprd_done = true;
408                 ath_paprd_activate(sc);
409         }
410
411 fail_paprd:
412         ath9k_ps_restore(sc);
413 }
414
415 /*
416  *  This routine performs the periodic noise floor calibration function
417  *  that is used to adjust and optimize the chip performance.  This
418  *  takes environmental changes (location, temperature) into account.
419  *  When the task is complete, it reschedules itself depending on the
420  *  appropriate interval that was calculated.
421  */
422 void ath_ani_calibrate(unsigned long data)
423 {
424         struct ath_softc *sc = (struct ath_softc *)data;
425         struct ath_hw *ah = sc->sc_ah;
426         struct ath_common *common = ath9k_hw_common(ah);
427         bool longcal = false;
428         bool shortcal = false;
429         bool aniflag = false;
430         unsigned int timestamp = jiffies_to_msecs(jiffies);
431         u32 cal_interval, short_cal_interval, long_cal_interval;
432         unsigned long flags;
433
434         if (ah->caldata && ah->caldata->nfcal_interference)
435                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
436         else
437                 long_cal_interval = ATH_LONG_CALINTERVAL;
438
439         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
440                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
441
442         /* Only calibrate if awake */
443         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
444                 goto set_timer;
445
446         ath9k_ps_wakeup(sc);
447
448         /* Long calibration runs independently of short calibration. */
449         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
450                 longcal = true;
451                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
452                 common->ani.longcal_timer = timestamp;
453         }
454
455         /* Short calibration applies only while caldone is false */
456         if (!common->ani.caldone) {
457                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
458                         shortcal = true;
459                         ath_dbg(common, ATH_DBG_ANI,
460                                 "shortcal @%lu\n", jiffies);
461                         common->ani.shortcal_timer = timestamp;
462                         common->ani.resetcal_timer = timestamp;
463                 }
464         } else {
465                 if ((timestamp - common->ani.resetcal_timer) >=
466                     ATH_RESTART_CALINTERVAL) {
467                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
468                         if (common->ani.caldone)
469                                 common->ani.resetcal_timer = timestamp;
470                 }
471         }
472
473         /* Verify whether we must check ANI */
474         if ((timestamp - common->ani.checkani_timer) >=
475              ah->config.ani_poll_interval) {
476                 aniflag = true;
477                 common->ani.checkani_timer = timestamp;
478         }
479
480         /* Skip all processing if there's nothing to do. */
481         if (longcal || shortcal || aniflag) {
482                 /* Call ANI routine if necessary */
483                 if (aniflag) {
484                         spin_lock_irqsave(&common->cc_lock, flags);
485                         ath9k_hw_ani_monitor(ah, ah->curchan);
486                         ath_update_survey_stats(sc);
487                         spin_unlock_irqrestore(&common->cc_lock, flags);
488                 }
489
490                 /* Perform calibration if necessary */
491                 if (longcal || shortcal) {
492                         common->ani.caldone =
493                                 ath9k_hw_calibrate(ah,
494                                                    ah->curchan,
495                                                    common->rx_chainmask,
496                                                    longcal);
497                 }
498         }
499
500         ath9k_ps_restore(sc);
501
502 set_timer:
503         /*
504         * Set timer interval based on previous results.
505         * The interval must be the shortest necessary to satisfy ANI,
506         * short calibration and long calibration.
507         */
508         cal_interval = ATH_LONG_CALINTERVAL;
509         if (sc->sc_ah->config.enable_ani)
510                 cal_interval = min(cal_interval,
511                                    (u32)ah->config.ani_poll_interval);
512         if (!common->ani.caldone)
513                 cal_interval = min(cal_interval, (u32)short_cal_interval);
514
515         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
516         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
517                 if (!ah->caldata->paprd_done)
518                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
519                 else
520                         ath_paprd_activate(sc);
521         }
522 }
523
524 /*
525  * Update tx/rx chainmask. For legacy association,
526  * hard code chainmask to 1x1, for 11n association, use
527  * the chainmask configuration, for bt coexistence, use
528  * the chainmask configuration even in legacy mode.
529  */
530 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
531 {
532         struct ath_hw *ah = sc->sc_ah;
533         struct ath_common *common = ath9k_hw_common(ah);
534
535         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
536             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
537                 common->tx_chainmask = ah->caps.tx_chainmask;
538                 common->rx_chainmask = ah->caps.rx_chainmask;
539         } else {
540                 common->tx_chainmask = 1;
541                 common->rx_chainmask = 1;
542         }
543
544         ath_dbg(common, ATH_DBG_CONFIG,
545                 "tx chmask: %d, rx chmask: %d\n",
546                 common->tx_chainmask,
547                 common->rx_chainmask);
548 }
549
550 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
551 {
552         struct ath_node *an;
553         struct ath_hw *ah = sc->sc_ah;
554         an = (struct ath_node *)sta->drv_priv;
555
556         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
557                 sc->sc_flags |= SC_OP_ENABLE_APM;
558
559         if (sc->sc_flags & SC_OP_TXAGGR) {
560                 ath_tx_node_init(sc, an);
561                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
562                                      sta->ht_cap.ampdu_factor);
563                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
564         }
565 }
566
567 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
568 {
569         struct ath_node *an = (struct ath_node *)sta->drv_priv;
570
571         if (sc->sc_flags & SC_OP_TXAGGR)
572                 ath_tx_node_cleanup(sc, an);
573 }
574
575 void ath_hw_check(struct work_struct *work)
576 {
577         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
578         int i;
579
580         ath9k_ps_wakeup(sc);
581
582         for (i = 0; i < 3; i++) {
583                 if (ath9k_hw_check_alive(sc->sc_ah))
584                         goto out;
585
586                 msleep(1);
587         }
588         ath_reset(sc, true);
589
590 out:
591         ath9k_ps_restore(sc);
592 }
593
594 void ath9k_tasklet(unsigned long data)
595 {
596         struct ath_softc *sc = (struct ath_softc *)data;
597         struct ath_hw *ah = sc->sc_ah;
598         struct ath_common *common = ath9k_hw_common(ah);
599
600         u32 status = sc->intrstatus;
601         u32 rxmask;
602
603         ath9k_ps_wakeup(sc);
604
605         if (status & ATH9K_INT_FATAL) {
606                 ath_reset(sc, true);
607                 ath9k_ps_restore(sc);
608                 return;
609         }
610
611         spin_lock_bh(&sc->sc_pcu_lock);
612
613         if (!ath9k_hw_check_alive(ah))
614                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
615
616         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
617                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
618                           ATH9K_INT_RXORN);
619         else
620                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
621
622         if (status & rxmask) {
623                 /* Check for high priority Rx first */
624                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
625                     (status & ATH9K_INT_RXHP))
626                         ath_rx_tasklet(sc, 0, true);
627
628                 ath_rx_tasklet(sc, 0, false);
629         }
630
631         if (status & ATH9K_INT_TX) {
632                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
633                         ath_tx_edma_tasklet(sc);
634                 else
635                         ath_tx_tasklet(sc);
636         }
637
638         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
639                 /*
640                  * TSF sync does not look correct; remain awake to sync with
641                  * the next Beacon.
642                  */
643                 ath_dbg(common, ATH_DBG_PS,
644                         "TSFOOR - Sync with next Beacon\n");
645                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
646         }
647
648         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
649                 if (status & ATH9K_INT_GENTIMER)
650                         ath_gen_timer_isr(sc->sc_ah);
651
652         /* re-enable hardware interrupt */
653         ath9k_hw_enable_interrupts(ah);
654
655         spin_unlock_bh(&sc->sc_pcu_lock);
656         ath9k_ps_restore(sc);
657 }
658
659 irqreturn_t ath_isr(int irq, void *dev)
660 {
661 #define SCHED_INTR (                            \
662                 ATH9K_INT_FATAL |               \
663                 ATH9K_INT_RXORN |               \
664                 ATH9K_INT_RXEOL |               \
665                 ATH9K_INT_RX |                  \
666                 ATH9K_INT_RXLP |                \
667                 ATH9K_INT_RXHP |                \
668                 ATH9K_INT_TX |                  \
669                 ATH9K_INT_BMISS |               \
670                 ATH9K_INT_CST |                 \
671                 ATH9K_INT_TSFOOR |              \
672                 ATH9K_INT_GENTIMER)
673
674         struct ath_softc *sc = dev;
675         struct ath_hw *ah = sc->sc_ah;
676         struct ath_common *common = ath9k_hw_common(ah);
677         enum ath9k_int status;
678         bool sched = false;
679
680         /*
681          * The hardware is not ready/present, don't
682          * touch anything. Note this can happen early
683          * on if the IRQ is shared.
684          */
685         if (sc->sc_flags & SC_OP_INVALID)
686                 return IRQ_NONE;
687
688
689         /* shared irq, not for us */
690
691         if (!ath9k_hw_intrpend(ah))
692                 return IRQ_NONE;
693
694         /*
695          * Figure out the reason(s) for the interrupt.  Note
696          * that the hal returns a pseudo-ISR that may include
697          * bits we haven't explicitly enabled so we mask the
698          * value to insure we only process bits we requested.
699          */
700         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
701         status &= ah->imask;    /* discard unasked-for bits */
702
703         /*
704          * If there are no status bits set, then this interrupt was not
705          * for me (should have been caught above).
706          */
707         if (!status)
708                 return IRQ_NONE;
709
710         /* Cache the status */
711         sc->intrstatus = status;
712
713         if (status & SCHED_INTR)
714                 sched = true;
715
716         /*
717          * If a FATAL or RXORN interrupt is received, we have to reset the
718          * chip immediately.
719          */
720         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
721             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
722                 goto chip_reset;
723
724         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
725             (status & ATH9K_INT_BB_WATCHDOG)) {
726
727                 spin_lock(&common->cc_lock);
728                 ath_hw_cycle_counters_update(common);
729                 ar9003_hw_bb_watchdog_dbg_info(ah);
730                 spin_unlock(&common->cc_lock);
731
732                 goto chip_reset;
733         }
734
735         if (status & ATH9K_INT_SWBA)
736                 tasklet_schedule(&sc->bcon_tasklet);
737
738         if (status & ATH9K_INT_TXURN)
739                 ath9k_hw_updatetxtriglevel(ah, true);
740
741         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
742                 if (status & ATH9K_INT_RXEOL) {
743                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
744                         ath9k_hw_set_interrupts(ah, ah->imask);
745                 }
746         }
747
748         if (status & ATH9K_INT_MIB) {
749                 /*
750                  * Disable interrupts until we service the MIB
751                  * interrupt; otherwise it will continue to
752                  * fire.
753                  */
754                 ath9k_hw_disable_interrupts(ah);
755                 /*
756                  * Let the hal handle the event. We assume
757                  * it will clear whatever condition caused
758                  * the interrupt.
759                  */
760                 spin_lock(&common->cc_lock);
761                 ath9k_hw_proc_mib_event(ah);
762                 spin_unlock(&common->cc_lock);
763                 ath9k_hw_enable_interrupts(ah);
764         }
765
766         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
767                 if (status & ATH9K_INT_TIM_TIMER) {
768                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
769                                 goto chip_reset;
770                         /* Clear RxAbort bit so that we can
771                          * receive frames */
772                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
773                         ath9k_hw_setrxabort(sc->sc_ah, 0);
774                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
775                 }
776
777 chip_reset:
778
779         ath_debug_stat_interrupt(sc, status);
780
781         if (sched) {
782                 /* turn off every interrupt */
783                 ath9k_hw_disable_interrupts(ah);
784                 tasklet_schedule(&sc->intr_tq);
785         }
786
787         return IRQ_HANDLED;
788
789 #undef SCHED_INTR
790 }
791
792 static u32 ath_get_extchanmode(struct ath_softc *sc,
793                                struct ieee80211_channel *chan,
794                                enum nl80211_channel_type channel_type)
795 {
796         u32 chanmode = 0;
797
798         switch (chan->band) {
799         case IEEE80211_BAND_2GHZ:
800                 switch(channel_type) {
801                 case NL80211_CHAN_NO_HT:
802                 case NL80211_CHAN_HT20:
803                         chanmode = CHANNEL_G_HT20;
804                         break;
805                 case NL80211_CHAN_HT40PLUS:
806                         chanmode = CHANNEL_G_HT40PLUS;
807                         break;
808                 case NL80211_CHAN_HT40MINUS:
809                         chanmode = CHANNEL_G_HT40MINUS;
810                         break;
811                 }
812                 break;
813         case IEEE80211_BAND_5GHZ:
814                 switch(channel_type) {
815                 case NL80211_CHAN_NO_HT:
816                 case NL80211_CHAN_HT20:
817                         chanmode = CHANNEL_A_HT20;
818                         break;
819                 case NL80211_CHAN_HT40PLUS:
820                         chanmode = CHANNEL_A_HT40PLUS;
821                         break;
822                 case NL80211_CHAN_HT40MINUS:
823                         chanmode = CHANNEL_A_HT40MINUS;
824                         break;
825                 }
826                 break;
827         default:
828                 break;
829         }
830
831         return chanmode;
832 }
833
834 static void ath9k_bss_assoc_info(struct ath_softc *sc,
835                                  struct ieee80211_hw *hw,
836                                  struct ieee80211_vif *vif,
837                                  struct ieee80211_bss_conf *bss_conf)
838 {
839         struct ath_wiphy *aphy = hw->priv;
840         struct ath_hw *ah = sc->sc_ah;
841         struct ath_common *common = ath9k_hw_common(ah);
842
843         if (bss_conf->assoc) {
844                 ath_dbg(common, ATH_DBG_CONFIG,
845                         "Bss Info ASSOC %d, bssid: %pM\n",
846                         bss_conf->aid, common->curbssid);
847
848                 /* New association, store aid */
849                 common->curaid = bss_conf->aid;
850                 ath9k_hw_write_associd(ah);
851
852                 /*
853                  * Request a re-configuration of Beacon related timers
854                  * on the receipt of the first Beacon frame (i.e.,
855                  * after time sync with the AP).
856                  */
857                 sc->ps_flags |= PS_BEACON_SYNC;
858
859                 /* Configure the beacon */
860                 ath_beacon_config(sc, vif);
861
862                 /* Reset rssi stats */
863                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
864                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
865
866                 sc->sc_flags |= SC_OP_ANI_RUN;
867                 ath_start_ani(common);
868         } else {
869                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
870                 common->curaid = 0;
871                 /* Stop ANI */
872                 sc->sc_flags &= ~SC_OP_ANI_RUN;
873                 del_timer_sync(&common->ani.timer);
874         }
875 }
876
877 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
878 {
879         struct ath_hw *ah = sc->sc_ah;
880         struct ath_common *common = ath9k_hw_common(ah);
881         struct ieee80211_channel *channel = hw->conf.channel;
882         int r;
883
884         ath9k_ps_wakeup(sc);
885         spin_lock_bh(&sc->sc_pcu_lock);
886
887         ath9k_hw_configpcipowersave(ah, 0, 0);
888
889         if (!ah->curchan)
890                 ah->curchan = ath_get_curchannel(sc, sc->hw);
891
892         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
893         if (r) {
894                 ath_err(common,
895                         "Unable to reset channel (%u MHz), reset status %d\n",
896                         channel->center_freq, r);
897         }
898
899         ath_update_txpow(sc);
900         if (ath_startrecv(sc) != 0) {
901                 ath_err(common, "Unable to restart recv logic\n");
902                 spin_unlock_bh(&sc->sc_pcu_lock);
903                 return;
904         }
905         if (sc->sc_flags & SC_OP_BEACONS)
906                 ath_beacon_config(sc, NULL);    /* restart beacons */
907
908         /* Re-Enable  interrupts */
909         ath9k_hw_set_interrupts(ah, ah->imask);
910
911         /* Enable LED */
912         ath9k_hw_cfg_output(ah, ah->led_pin,
913                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
914         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
915
916         ieee80211_wake_queues(hw);
917         spin_unlock_bh(&sc->sc_pcu_lock);
918
919         ath9k_ps_restore(sc);
920 }
921
922 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
923 {
924         struct ath_hw *ah = sc->sc_ah;
925         struct ieee80211_channel *channel = hw->conf.channel;
926         int r;
927
928         ath9k_ps_wakeup(sc);
929         spin_lock_bh(&sc->sc_pcu_lock);
930
931         ieee80211_stop_queues(hw);
932
933         /*
934          * Keep the LED on when the radio is disabled
935          * during idle unassociated state.
936          */
937         if (!sc->ps_idle) {
938                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
939                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
940         }
941
942         /* Disable interrupts */
943         ath9k_hw_disable_interrupts(ah);
944
945         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
946
947         ath_stoprecv(sc);               /* turn off frame recv */
948         ath_flushrecv(sc);              /* flush recv queue */
949
950         if (!ah->curchan)
951                 ah->curchan = ath_get_curchannel(sc, hw);
952
953         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
954         if (r) {
955                 ath_err(ath9k_hw_common(sc->sc_ah),
956                         "Unable to reset channel (%u MHz), reset status %d\n",
957                         channel->center_freq, r);
958         }
959
960         ath9k_hw_phy_disable(ah);
961
962         ath9k_hw_configpcipowersave(ah, 1, 1);
963
964         spin_unlock_bh(&sc->sc_pcu_lock);
965         ath9k_ps_restore(sc);
966
967         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
968 }
969
970 int ath_reset(struct ath_softc *sc, bool retry_tx)
971 {
972         struct ath_hw *ah = sc->sc_ah;
973         struct ath_common *common = ath9k_hw_common(ah);
974         struct ieee80211_hw *hw = sc->hw;
975         int r;
976
977         /* Stop ANI */
978         del_timer_sync(&common->ani.timer);
979
980         spin_lock_bh(&sc->sc_pcu_lock);
981
982         ieee80211_stop_queues(hw);
983
984         ath9k_hw_disable_interrupts(ah);
985         ath_drain_all_txq(sc, retry_tx);
986
987         ath_stoprecv(sc);
988         ath_flushrecv(sc);
989
990         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
991         if (r)
992                 ath_err(common,
993                         "Unable to reset hardware; reset status %d\n", r);
994
995         if (ath_startrecv(sc) != 0)
996                 ath_err(common, "Unable to start recv logic\n");
997
998         /*
999          * We may be doing a reset in response to a request
1000          * that changes the channel so update any state that
1001          * might change as a result.
1002          */
1003         ath_update_txpow(sc);
1004
1005         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1006                 ath_beacon_config(sc, NULL);    /* restart beacons */
1007
1008         ath9k_hw_set_interrupts(ah, ah->imask);
1009
1010         if (retry_tx) {
1011                 int i;
1012                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1013                         if (ATH_TXQ_SETUP(sc, i)) {
1014                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1015                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1016                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1017                         }
1018                 }
1019         }
1020
1021         ieee80211_wake_queues(hw);
1022         spin_unlock_bh(&sc->sc_pcu_lock);
1023
1024         /* Start ANI */
1025         ath_start_ani(common);
1026
1027         return r;
1028 }
1029
1030 /* XXX: Remove me once we don't depend on ath9k_channel for all
1031  * this redundant data */
1032 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1033                            struct ath9k_channel *ichan)
1034 {
1035         struct ieee80211_channel *chan = hw->conf.channel;
1036         struct ieee80211_conf *conf = &hw->conf;
1037
1038         ichan->channel = chan->center_freq;
1039         ichan->chan = chan;
1040
1041         if (chan->band == IEEE80211_BAND_2GHZ) {
1042                 ichan->chanmode = CHANNEL_G;
1043                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1044         } else {
1045                 ichan->chanmode = CHANNEL_A;
1046                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1047         }
1048
1049         if (conf_is_ht(conf))
1050                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1051                                             conf->channel_type);
1052 }
1053
1054 /**********************/
1055 /* mac80211 callbacks */
1056 /**********************/
1057
1058 static int ath9k_start(struct ieee80211_hw *hw)
1059 {
1060         struct ath_wiphy *aphy = hw->priv;
1061         struct ath_softc *sc = aphy->sc;
1062         struct ath_hw *ah = sc->sc_ah;
1063         struct ath_common *common = ath9k_hw_common(ah);
1064         struct ieee80211_channel *curchan = hw->conf.channel;
1065         struct ath9k_channel *init_channel;
1066         int r;
1067
1068         ath_dbg(common, ATH_DBG_CONFIG,
1069                 "Starting driver with initial channel: %d MHz\n",
1070                 curchan->center_freq);
1071
1072         mutex_lock(&sc->mutex);
1073
1074         if (ath9k_wiphy_started(sc)) {
1075                 if (sc->chan_idx == curchan->hw_value) {
1076                         /*
1077                          * Already on the operational channel, the new wiphy
1078                          * can be marked active.
1079                          */
1080                         aphy->state = ATH_WIPHY_ACTIVE;
1081                         ieee80211_wake_queues(hw);
1082                 } else {
1083                         /*
1084                          * Another wiphy is on another channel, start the new
1085                          * wiphy in paused state.
1086                          */
1087                         aphy->state = ATH_WIPHY_PAUSED;
1088                         ieee80211_stop_queues(hw);
1089                 }
1090                 mutex_unlock(&sc->mutex);
1091                 return 0;
1092         }
1093         aphy->state = ATH_WIPHY_ACTIVE;
1094
1095         /* setup initial channel */
1096
1097         sc->chan_idx = curchan->hw_value;
1098
1099         init_channel = ath_get_curchannel(sc, hw);
1100
1101         /* Reset SERDES registers */
1102         ath9k_hw_configpcipowersave(ah, 0, 0);
1103
1104         /*
1105          * The basic interface to setting the hardware in a good
1106          * state is ``reset''.  On return the hardware is known to
1107          * be powered up and with interrupts disabled.  This must
1108          * be followed by initialization of the appropriate bits
1109          * and then setup of the interrupt mask.
1110          */
1111         spin_lock_bh(&sc->sc_pcu_lock);
1112         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1113         if (r) {
1114                 ath_err(common,
1115                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1116                         r, curchan->center_freq);
1117                 spin_unlock_bh(&sc->sc_pcu_lock);
1118                 goto mutex_unlock;
1119         }
1120
1121         /*
1122          * This is needed only to setup initial state
1123          * but it's best done after a reset.
1124          */
1125         ath_update_txpow(sc);
1126
1127         /*
1128          * Setup the hardware after reset:
1129          * The receive engine is set going.
1130          * Frame transmit is handled entirely
1131          * in the frame output path; there's nothing to do
1132          * here except setup the interrupt mask.
1133          */
1134         if (ath_startrecv(sc) != 0) {
1135                 ath_err(common, "Unable to start recv logic\n");
1136                 r = -EIO;
1137                 spin_unlock_bh(&sc->sc_pcu_lock);
1138                 goto mutex_unlock;
1139         }
1140         spin_unlock_bh(&sc->sc_pcu_lock);
1141
1142         /* Setup our intr mask. */
1143         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1144                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1145                     ATH9K_INT_GLOBAL;
1146
1147         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1148                 ah->imask |= ATH9K_INT_RXHP |
1149                              ATH9K_INT_RXLP |
1150                              ATH9K_INT_BB_WATCHDOG;
1151         else
1152                 ah->imask |= ATH9K_INT_RX;
1153
1154         ah->imask |= ATH9K_INT_GTT;
1155
1156         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1157                 ah->imask |= ATH9K_INT_CST;
1158
1159         sc->sc_flags &= ~SC_OP_INVALID;
1160         sc->sc_ah->is_monitoring = false;
1161
1162         /* Disable BMISS interrupt when we're not associated */
1163         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1164         ath9k_hw_set_interrupts(ah, ah->imask);
1165
1166         ieee80211_wake_queues(hw);
1167
1168         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1169
1170         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1171             !ah->btcoex_hw.enabled) {
1172                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1173                                            AR_STOMP_LOW_WLAN_WGHT);
1174                 ath9k_hw_btcoex_enable(ah);
1175
1176                 if (common->bus_ops->bt_coex_prep)
1177                         common->bus_ops->bt_coex_prep(common);
1178                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1179                         ath9k_btcoex_timer_resume(sc);
1180         }
1181
1182         pm_qos_update_request(&sc->pm_qos_req, 55);
1183
1184         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1185                 common->bus_ops->extn_synch_en(common);
1186
1187 mutex_unlock:
1188         mutex_unlock(&sc->mutex);
1189
1190         return r;
1191 }
1192
1193 static int ath9k_tx(struct ieee80211_hw *hw,
1194                     struct sk_buff *skb)
1195 {
1196         struct ath_wiphy *aphy = hw->priv;
1197         struct ath_softc *sc = aphy->sc;
1198         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1199         struct ath_tx_control txctl;
1200         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1201
1202         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1203                 ath_dbg(common, ATH_DBG_XMIT,
1204                         "ath9k: %s: TX in unexpected wiphy state %d\n",
1205                         wiphy_name(hw->wiphy), aphy->state);
1206                 goto exit;
1207         }
1208
1209         if (sc->ps_enabled) {
1210                 /*
1211                  * mac80211 does not set PM field for normal data frames, so we
1212                  * need to update that based on the current PS mode.
1213                  */
1214                 if (ieee80211_is_data(hdr->frame_control) &&
1215                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1216                     !ieee80211_has_pm(hdr->frame_control)) {
1217                         ath_dbg(common, ATH_DBG_PS,
1218                                 "Add PM=1 for a TX frame while in PS mode\n");
1219                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1220                 }
1221         }
1222
1223         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1224                 /*
1225                  * We are using PS-Poll and mac80211 can request TX while in
1226                  * power save mode. Need to wake up hardware for the TX to be
1227                  * completed and if needed, also for RX of buffered frames.
1228                  */
1229                 ath9k_ps_wakeup(sc);
1230                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1231                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1232                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1233                         ath_dbg(common, ATH_DBG_PS,
1234                                 "Sending PS-Poll to pick a buffered frame\n");
1235                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1236                 } else {
1237                         ath_dbg(common, ATH_DBG_PS,
1238                                 "Wake up to complete TX\n");
1239                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1240                 }
1241                 /*
1242                  * The actual restore operation will happen only after
1243                  * the sc_flags bit is cleared. We are just dropping
1244                  * the ps_usecount here.
1245                  */
1246                 ath9k_ps_restore(sc);
1247         }
1248
1249         memset(&txctl, 0, sizeof(struct ath_tx_control));
1250         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1251
1252         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1253
1254         if (ath_tx_start(hw, skb, &txctl) != 0) {
1255                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1256                 goto exit;
1257         }
1258
1259         return 0;
1260 exit:
1261         dev_kfree_skb_any(skb);
1262         return 0;
1263 }
1264
1265 static void ath9k_stop(struct ieee80211_hw *hw)
1266 {
1267         struct ath_wiphy *aphy = hw->priv;
1268         struct ath_softc *sc = aphy->sc;
1269         struct ath_hw *ah = sc->sc_ah;
1270         struct ath_common *common = ath9k_hw_common(ah);
1271         int i;
1272
1273         mutex_lock(&sc->mutex);
1274
1275         aphy->state = ATH_WIPHY_INACTIVE;
1276
1277         if (led_blink)
1278                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1279
1280         cancel_delayed_work_sync(&sc->tx_complete_work);
1281         cancel_work_sync(&sc->paprd_work);
1282         cancel_work_sync(&sc->hw_check_work);
1283
1284         for (i = 0; i < sc->num_sec_wiphy; i++) {
1285                 if (sc->sec_wiphy[i])
1286                         break;
1287         }
1288
1289         if (i == sc->num_sec_wiphy) {
1290                 cancel_delayed_work_sync(&sc->wiphy_work);
1291                 cancel_work_sync(&sc->chan_work);
1292         }
1293
1294         if (sc->sc_flags & SC_OP_INVALID) {
1295                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1296                 mutex_unlock(&sc->mutex);
1297                 return;
1298         }
1299
1300         if (ath9k_wiphy_started(sc)) {
1301                 mutex_unlock(&sc->mutex);
1302                 return; /* another wiphy still in use */
1303         }
1304
1305         /* Ensure HW is awake when we try to shut it down. */
1306         ath9k_ps_wakeup(sc);
1307
1308         if (ah->btcoex_hw.enabled) {
1309                 ath9k_hw_btcoex_disable(ah);
1310                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1311                         ath9k_btcoex_timer_pause(sc);
1312         }
1313
1314         spin_lock_bh(&sc->sc_pcu_lock);
1315
1316         /* make sure h/w will not generate any interrupt
1317          * before setting the invalid flag. */
1318         ath9k_hw_disable_interrupts(ah);
1319
1320         if (!(sc->sc_flags & SC_OP_INVALID)) {
1321                 ath_drain_all_txq(sc, false);
1322                 ath_stoprecv(sc);
1323                 ath9k_hw_phy_disable(ah);
1324         } else
1325                 sc->rx.rxlink = NULL;
1326
1327         /* disable HAL and put h/w to sleep */
1328         ath9k_hw_disable(ah);
1329         ath9k_hw_configpcipowersave(ah, 1, 1);
1330
1331         spin_unlock_bh(&sc->sc_pcu_lock);
1332
1333         ath9k_ps_restore(sc);
1334
1335         /* Finally, put the chip in FULL SLEEP mode */
1336         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1337
1338         sc->sc_flags |= SC_OP_INVALID;
1339
1340         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1341
1342         mutex_unlock(&sc->mutex);
1343
1344         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1345 }
1346
1347 static int ath9k_add_interface(struct ieee80211_hw *hw,
1348                                struct ieee80211_vif *vif)
1349 {
1350         struct ath_wiphy *aphy = hw->priv;
1351         struct ath_softc *sc = aphy->sc;
1352         struct ath_hw *ah = sc->sc_ah;
1353         struct ath_common *common = ath9k_hw_common(ah);
1354         struct ath_vif *avp = (void *)vif->drv_priv;
1355         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1356         int ret = 0;
1357
1358         mutex_lock(&sc->mutex);
1359
1360         switch (vif->type) {
1361         case NL80211_IFTYPE_STATION:
1362                 ic_opmode = NL80211_IFTYPE_STATION;
1363                 break;
1364         case NL80211_IFTYPE_WDS:
1365                 ic_opmode = NL80211_IFTYPE_WDS;
1366                 break;
1367         case NL80211_IFTYPE_ADHOC:
1368         case NL80211_IFTYPE_AP:
1369         case NL80211_IFTYPE_MESH_POINT:
1370                 if (sc->nbcnvifs >= ATH_BCBUF) {
1371                         ret = -ENOBUFS;
1372                         goto out;
1373                 }
1374                 ic_opmode = vif->type;
1375                 break;
1376         default:
1377                 ath_err(common, "Interface type %d not yet supported\n",
1378                         vif->type);
1379                 ret = -EOPNOTSUPP;
1380                 goto out;
1381         }
1382
1383         ath_dbg(common, ATH_DBG_CONFIG,
1384                 "Attach a VIF of type: %d\n", ic_opmode);
1385
1386         /* Set the VIF opmode */
1387         avp->av_opmode = ic_opmode;
1388         avp->av_bslot = -1;
1389
1390         sc->nvifs++;
1391
1392         ath9k_set_bssid_mask(hw, vif);
1393
1394         if (sc->nvifs > 1)
1395                 goto out; /* skip global settings for secondary vif */
1396
1397         if (ic_opmode == NL80211_IFTYPE_AP) {
1398                 ath9k_hw_set_tsfadjust(ah, 1);
1399                 sc->sc_flags |= SC_OP_TSF_RESET;
1400         }
1401
1402         /* Set the device opmode */
1403         ah->opmode = ic_opmode;
1404
1405         /*
1406          * Enable MIB interrupts when there are hardware phy counters.
1407          * Note we only do this (at the moment) for station mode.
1408          */
1409         if ((vif->type == NL80211_IFTYPE_STATION) ||
1410             (vif->type == NL80211_IFTYPE_ADHOC) ||
1411             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1412                 if (ah->config.enable_ani)
1413                         ah->imask |= ATH9K_INT_MIB;
1414                 ah->imask |= ATH9K_INT_TSFOOR;
1415         }
1416
1417         ath9k_hw_set_interrupts(ah, ah->imask);
1418
1419         if (vif->type == NL80211_IFTYPE_AP    ||
1420             vif->type == NL80211_IFTYPE_ADHOC) {
1421                 sc->sc_flags |= SC_OP_ANI_RUN;
1422                 ath_start_ani(common);
1423         }
1424
1425 out:
1426         mutex_unlock(&sc->mutex);
1427         return ret;
1428 }
1429
1430 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1431                                    struct ieee80211_vif *vif)
1432 {
1433         struct ath_wiphy *aphy = hw->priv;
1434         struct ath_softc *sc = aphy->sc;
1435         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1436         struct ath_vif *avp = (void *)vif->drv_priv;
1437         bool bs_valid = false;
1438         int i;
1439
1440         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1441
1442         mutex_lock(&sc->mutex);
1443
1444         /* Stop ANI */
1445         sc->sc_flags &= ~SC_OP_ANI_RUN;
1446         del_timer_sync(&common->ani.timer);
1447
1448         /* Reclaim beacon resources */
1449         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1450             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1451             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1452                 ath9k_ps_wakeup(sc);
1453                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1454                 ath9k_ps_restore(sc);
1455         }
1456
1457         ath_beacon_return(sc, avp);
1458         sc->sc_flags &= ~SC_OP_BEACONS;
1459
1460         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1461                 if (sc->beacon.bslot[i] == vif) {
1462                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1463                                "slot\n", __func__);
1464                         sc->beacon.bslot[i] = NULL;
1465                         sc->beacon.bslot_aphy[i] = NULL;
1466                 } else if (sc->beacon.bslot[i])
1467                         bs_valid = true;
1468         }
1469         if (!bs_valid && (sc->sc_ah->imask & ATH9K_INT_SWBA)) {
1470                 /* Disable SWBA interrupt */
1471                 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1472                 ath9k_ps_wakeup(sc);
1473                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1474                 ath9k_ps_restore(sc);
1475         }
1476
1477         sc->nvifs--;
1478
1479         mutex_unlock(&sc->mutex);
1480 }
1481
1482 static void ath9k_enable_ps(struct ath_softc *sc)
1483 {
1484         struct ath_hw *ah = sc->sc_ah;
1485
1486         sc->ps_enabled = true;
1487         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1488                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1489                         ah->imask |= ATH9K_INT_TIM_TIMER;
1490                         ath9k_hw_set_interrupts(ah, ah->imask);
1491                 }
1492                 ath9k_hw_setrxabort(ah, 1);
1493         }
1494 }
1495
1496 static void ath9k_disable_ps(struct ath_softc *sc)
1497 {
1498         struct ath_hw *ah = sc->sc_ah;
1499
1500         sc->ps_enabled = false;
1501         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1502         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1503                 ath9k_hw_setrxabort(ah, 0);
1504                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1505                                   PS_WAIT_FOR_CAB |
1506                                   PS_WAIT_FOR_PSPOLL_DATA |
1507                                   PS_WAIT_FOR_TX_ACK);
1508                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1509                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1510                         ath9k_hw_set_interrupts(ah, ah->imask);
1511                 }
1512         }
1513
1514 }
1515
1516 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1517 {
1518         struct ath_wiphy *aphy = hw->priv;
1519         struct ath_softc *sc = aphy->sc;
1520         struct ath_hw *ah = sc->sc_ah;
1521         struct ath_common *common = ath9k_hw_common(ah);
1522         struct ieee80211_conf *conf = &hw->conf;
1523         bool disable_radio;
1524
1525         mutex_lock(&sc->mutex);
1526
1527         /*
1528          * Leave this as the first check because we need to turn on the
1529          * radio if it was disabled before prior to processing the rest
1530          * of the changes. Likewise we must only disable the radio towards
1531          * the end.
1532          */
1533         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1534                 bool enable_radio;
1535                 bool all_wiphys_idle;
1536                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1537
1538                 spin_lock_bh(&sc->wiphy_lock);
1539                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1540                 ath9k_set_wiphy_idle(aphy, idle);
1541
1542                 enable_radio = (!idle && all_wiphys_idle);
1543
1544                 /*
1545                  * After we unlock here its possible another wiphy
1546                  * can be re-renabled so to account for that we will
1547                  * only disable the radio toward the end of this routine
1548                  * if by then all wiphys are still idle.
1549                  */
1550                 spin_unlock_bh(&sc->wiphy_lock);
1551
1552                 if (enable_radio) {
1553                         sc->ps_idle = false;
1554                         ath_radio_enable(sc, hw);
1555                         ath_dbg(common, ATH_DBG_CONFIG,
1556                                 "not-idle: enabling radio\n");
1557                 }
1558         }
1559
1560         /*
1561          * We just prepare to enable PS. We have to wait until our AP has
1562          * ACK'd our null data frame to disable RX otherwise we'll ignore
1563          * those ACKs and end up retransmitting the same null data frames.
1564          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1565          */
1566         if (changed & IEEE80211_CONF_CHANGE_PS) {
1567                 unsigned long flags;
1568                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1569                 if (conf->flags & IEEE80211_CONF_PS)
1570                         ath9k_enable_ps(sc);
1571                 else
1572                         ath9k_disable_ps(sc);
1573                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1574         }
1575
1576         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1577                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1578                         ath_dbg(common, ATH_DBG_CONFIG,
1579                                 "Monitor mode is enabled\n");
1580                         sc->sc_ah->is_monitoring = true;
1581                 } else {
1582                         ath_dbg(common, ATH_DBG_CONFIG,
1583                                 "Monitor mode is disabled\n");
1584                         sc->sc_ah->is_monitoring = false;
1585                 }
1586         }
1587
1588         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1589                 struct ieee80211_channel *curchan = hw->conf.channel;
1590                 int pos = curchan->hw_value;
1591                 int old_pos = -1;
1592                 unsigned long flags;
1593
1594                 if (ah->curchan)
1595                         old_pos = ah->curchan - &ah->channels[0];
1596
1597                 aphy->chan_idx = pos;
1598                 aphy->chan_is_ht = conf_is_ht(conf);
1599                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1600                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1601                 else
1602                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1603
1604                 if (aphy->state == ATH_WIPHY_SCAN ||
1605                     aphy->state == ATH_WIPHY_ACTIVE)
1606                         ath9k_wiphy_pause_all_forced(sc, aphy);
1607                 else {
1608                         /*
1609                          * Do not change operational channel based on a paused
1610                          * wiphy changes.
1611                          */
1612                         goto skip_chan_change;
1613                 }
1614
1615                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1616                         curchan->center_freq);
1617
1618                 /* XXX: remove me eventualy */
1619                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1620
1621                 ath_update_chainmask(sc, conf_is_ht(conf));
1622
1623                 /* update survey stats for the old channel before switching */
1624                 spin_lock_irqsave(&common->cc_lock, flags);
1625                 ath_update_survey_stats(sc);
1626                 spin_unlock_irqrestore(&common->cc_lock, flags);
1627
1628                 /*
1629                  * If the operating channel changes, change the survey in-use flags
1630                  * along with it.
1631                  * Reset the survey data for the new channel, unless we're switching
1632                  * back to the operating channel from an off-channel operation.
1633                  */
1634                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1635                     sc->cur_survey != &sc->survey[pos]) {
1636
1637                         if (sc->cur_survey)
1638                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1639
1640                         sc->cur_survey = &sc->survey[pos];
1641
1642                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1643                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1644                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1645                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1646                 }
1647
1648                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1649                         ath_err(common, "Unable to set channel\n");
1650                         mutex_unlock(&sc->mutex);
1651                         return -EINVAL;
1652                 }
1653
1654                 /*
1655                  * The most recent snapshot of channel->noisefloor for the old
1656                  * channel is only available after the hardware reset. Copy it to
1657                  * the survey stats now.
1658                  */
1659                 if (old_pos >= 0)
1660                         ath_update_survey_nf(sc, old_pos);
1661         }
1662
1663 skip_chan_change:
1664         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1665                 sc->config.txpowlimit = 2 * conf->power_level;
1666                 ath_update_txpow(sc);
1667         }
1668
1669         spin_lock_bh(&sc->wiphy_lock);
1670         disable_radio = ath9k_all_wiphys_idle(sc);
1671         spin_unlock_bh(&sc->wiphy_lock);
1672
1673         if (disable_radio) {
1674                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1675                 sc->ps_idle = true;
1676                 ath_radio_disable(sc, hw);
1677         }
1678
1679         mutex_unlock(&sc->mutex);
1680
1681         return 0;
1682 }
1683
1684 #define SUPPORTED_FILTERS                       \
1685         (FIF_PROMISC_IN_BSS |                   \
1686         FIF_ALLMULTI |                          \
1687         FIF_CONTROL |                           \
1688         FIF_PSPOLL |                            \
1689         FIF_OTHER_BSS |                         \
1690         FIF_BCN_PRBRESP_PROMISC |               \
1691         FIF_PROBE_REQ |                         \
1692         FIF_FCSFAIL)
1693
1694 /* FIXME: sc->sc_full_reset ? */
1695 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1696                                    unsigned int changed_flags,
1697                                    unsigned int *total_flags,
1698                                    u64 multicast)
1699 {
1700         struct ath_wiphy *aphy = hw->priv;
1701         struct ath_softc *sc = aphy->sc;
1702         u32 rfilt;
1703
1704         changed_flags &= SUPPORTED_FILTERS;
1705         *total_flags &= SUPPORTED_FILTERS;
1706
1707         sc->rx.rxfilter = *total_flags;
1708         ath9k_ps_wakeup(sc);
1709         rfilt = ath_calcrxfilter(sc);
1710         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1711         ath9k_ps_restore(sc);
1712
1713         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1714                 "Set HW RX filter: 0x%x\n", rfilt);
1715 }
1716
1717 static int ath9k_sta_add(struct ieee80211_hw *hw,
1718                          struct ieee80211_vif *vif,
1719                          struct ieee80211_sta *sta)
1720 {
1721         struct ath_wiphy *aphy = hw->priv;
1722         struct ath_softc *sc = aphy->sc;
1723
1724         ath_node_attach(sc, sta);
1725
1726         return 0;
1727 }
1728
1729 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1730                             struct ieee80211_vif *vif,
1731                             struct ieee80211_sta *sta)
1732 {
1733         struct ath_wiphy *aphy = hw->priv;
1734         struct ath_softc *sc = aphy->sc;
1735
1736         ath_node_detach(sc, sta);
1737
1738         return 0;
1739 }
1740
1741 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1742                          const struct ieee80211_tx_queue_params *params)
1743 {
1744         struct ath_wiphy *aphy = hw->priv;
1745         struct ath_softc *sc = aphy->sc;
1746         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1747         struct ath_txq *txq;
1748         struct ath9k_tx_queue_info qi;
1749         int ret = 0;
1750
1751         if (queue >= WME_NUM_AC)
1752                 return 0;
1753
1754         txq = sc->tx.txq_map[queue];
1755
1756         mutex_lock(&sc->mutex);
1757
1758         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1759
1760         qi.tqi_aifs = params->aifs;
1761         qi.tqi_cwmin = params->cw_min;
1762         qi.tqi_cwmax = params->cw_max;
1763         qi.tqi_burstTime = params->txop;
1764
1765         ath_dbg(common, ATH_DBG_CONFIG,
1766                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1767                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1768                 params->cw_max, params->txop);
1769
1770         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1771         if (ret)
1772                 ath_err(common, "TXQ Update failed\n");
1773
1774         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1775                 if (queue == WME_AC_BE && !ret)
1776                         ath_beaconq_config(sc);
1777
1778         mutex_unlock(&sc->mutex);
1779
1780         return ret;
1781 }
1782
1783 static int ath9k_set_key(struct ieee80211_hw *hw,
1784                          enum set_key_cmd cmd,
1785                          struct ieee80211_vif *vif,
1786                          struct ieee80211_sta *sta,
1787                          struct ieee80211_key_conf *key)
1788 {
1789         struct ath_wiphy *aphy = hw->priv;
1790         struct ath_softc *sc = aphy->sc;
1791         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1792         int ret = 0;
1793
1794         if (modparam_nohwcrypt)
1795                 return -ENOSPC;
1796
1797         mutex_lock(&sc->mutex);
1798         ath9k_ps_wakeup(sc);
1799         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1800
1801         switch (cmd) {
1802         case SET_KEY:
1803                 ret = ath_key_config(common, vif, sta, key);
1804                 if (ret >= 0) {
1805                         key->hw_key_idx = ret;
1806                         /* push IV and Michael MIC generation to stack */
1807                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1808                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1809                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1810                         if (sc->sc_ah->sw_mgmt_crypto &&
1811                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1812                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1813                         ret = 0;
1814                 }
1815                 break;
1816         case DISABLE_KEY:
1817                 ath_key_delete(common, key);
1818                 break;
1819         default:
1820                 ret = -EINVAL;
1821         }
1822
1823         ath9k_ps_restore(sc);
1824         mutex_unlock(&sc->mutex);
1825
1826         return ret;
1827 }
1828
1829 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1830                                    struct ieee80211_vif *vif,
1831                                    struct ieee80211_bss_conf *bss_conf,
1832                                    u32 changed)
1833 {
1834         struct ath_wiphy *aphy = hw->priv;
1835         struct ath_softc *sc = aphy->sc;
1836         struct ath_hw *ah = sc->sc_ah;
1837         struct ath_common *common = ath9k_hw_common(ah);
1838         struct ath_vif *avp = (void *)vif->drv_priv;
1839         int slottime;
1840         int error;
1841
1842         mutex_lock(&sc->mutex);
1843
1844         if (changed & BSS_CHANGED_BSSID) {
1845                 /* Set BSSID */
1846                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1847                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1848                 common->curaid = 0;
1849                 ath9k_hw_write_associd(ah);
1850
1851                 /* Set aggregation protection mode parameters */
1852                 sc->config.ath_aggr_prot = 0;
1853
1854                 /* Only legacy IBSS for now */
1855                 if (vif->type == NL80211_IFTYPE_ADHOC)
1856                         ath_update_chainmask(sc, 0);
1857
1858                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1859                         common->curbssid, common->curaid);
1860
1861                 /* need to reconfigure the beacon */
1862                 sc->sc_flags &= ~SC_OP_BEACONS ;
1863         }
1864
1865         /* Enable transmission of beacons (AP, IBSS, MESH) */
1866         if ((changed & BSS_CHANGED_BEACON) ||
1867             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1868                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1869                 error = ath_beacon_alloc(aphy, vif);
1870                 if (!error)
1871                         ath_beacon_config(sc, vif);
1872         }
1873
1874         if (changed & BSS_CHANGED_ERP_SLOT) {
1875                 if (bss_conf->use_short_slot)
1876                         slottime = 9;
1877                 else
1878                         slottime = 20;
1879                 if (vif->type == NL80211_IFTYPE_AP) {
1880                         /*
1881                          * Defer update, so that connected stations can adjust
1882                          * their settings at the same time.
1883                          * See beacon.c for more details
1884                          */
1885                         sc->beacon.slottime = slottime;
1886                         sc->beacon.updateslot = UPDATE;
1887                 } else {
1888                         ah->slottime = slottime;
1889                         ath9k_hw_init_global_settings(ah);
1890                 }
1891         }
1892
1893         /* Disable transmission of beacons */
1894         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1895                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1896
1897         if (changed & BSS_CHANGED_BEACON_INT) {
1898                 sc->beacon_interval = bss_conf->beacon_int;
1899                 /*
1900                  * In case of AP mode, the HW TSF has to be reset
1901                  * when the beacon interval changes.
1902                  */
1903                 if (vif->type == NL80211_IFTYPE_AP) {
1904                         sc->sc_flags |= SC_OP_TSF_RESET;
1905                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1906                         error = ath_beacon_alloc(aphy, vif);
1907                         if (!error)
1908                                 ath_beacon_config(sc, vif);
1909                 } else {
1910                         ath_beacon_config(sc, vif);
1911                 }
1912         }
1913
1914         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1915                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1916                         bss_conf->use_short_preamble);
1917                 if (bss_conf->use_short_preamble)
1918                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1919                 else
1920                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1921         }
1922
1923         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1924                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1925                         bss_conf->use_cts_prot);
1926                 if (bss_conf->use_cts_prot &&
1927                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1928                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1929                 else
1930                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1931         }
1932
1933         if (changed & BSS_CHANGED_ASSOC) {
1934                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1935                         bss_conf->assoc);
1936                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1937         }
1938
1939         mutex_unlock(&sc->mutex);
1940 }
1941
1942 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1943 {
1944         u64 tsf;
1945         struct ath_wiphy *aphy = hw->priv;
1946         struct ath_softc *sc = aphy->sc;
1947
1948         mutex_lock(&sc->mutex);
1949         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1950         mutex_unlock(&sc->mutex);
1951
1952         return tsf;
1953 }
1954
1955 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1956 {
1957         struct ath_wiphy *aphy = hw->priv;
1958         struct ath_softc *sc = aphy->sc;
1959
1960         mutex_lock(&sc->mutex);
1961         ath9k_hw_settsf64(sc->sc_ah, tsf);
1962         mutex_unlock(&sc->mutex);
1963 }
1964
1965 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1966 {
1967         struct ath_wiphy *aphy = hw->priv;
1968         struct ath_softc *sc = aphy->sc;
1969
1970         mutex_lock(&sc->mutex);
1971
1972         ath9k_ps_wakeup(sc);
1973         ath9k_hw_reset_tsf(sc->sc_ah);
1974         ath9k_ps_restore(sc);
1975
1976         mutex_unlock(&sc->mutex);
1977 }
1978
1979 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1980                               struct ieee80211_vif *vif,
1981                               enum ieee80211_ampdu_mlme_action action,
1982                               struct ieee80211_sta *sta,
1983                               u16 tid, u16 *ssn)
1984 {
1985         struct ath_wiphy *aphy = hw->priv;
1986         struct ath_softc *sc = aphy->sc;
1987         int ret = 0;
1988
1989         local_bh_disable();
1990
1991         switch (action) {
1992         case IEEE80211_AMPDU_RX_START:
1993                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1994                         ret = -ENOTSUPP;
1995                 break;
1996         case IEEE80211_AMPDU_RX_STOP:
1997                 break;
1998         case IEEE80211_AMPDU_TX_START:
1999                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2000                         return -EOPNOTSUPP;
2001
2002                 ath9k_ps_wakeup(sc);
2003                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2004                 if (!ret)
2005                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2006                 ath9k_ps_restore(sc);
2007                 break;
2008         case IEEE80211_AMPDU_TX_STOP:
2009                 ath9k_ps_wakeup(sc);
2010                 ath_tx_aggr_stop(sc, sta, tid);
2011                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2012                 ath9k_ps_restore(sc);
2013                 break;
2014         case IEEE80211_AMPDU_TX_OPERATIONAL:
2015                 ath9k_ps_wakeup(sc);
2016                 ath_tx_aggr_resume(sc, sta, tid);
2017                 ath9k_ps_restore(sc);
2018                 break;
2019         default:
2020                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2021         }
2022
2023         local_bh_enable();
2024
2025         return ret;
2026 }
2027
2028 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2029                              struct survey_info *survey)
2030 {
2031         struct ath_wiphy *aphy = hw->priv;
2032         struct ath_softc *sc = aphy->sc;
2033         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2034         struct ieee80211_supported_band *sband;
2035         struct ieee80211_channel *chan;
2036         unsigned long flags;
2037         int pos;
2038
2039         spin_lock_irqsave(&common->cc_lock, flags);
2040         if (idx == 0)
2041                 ath_update_survey_stats(sc);
2042
2043         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2044         if (sband && idx >= sband->n_channels) {
2045                 idx -= sband->n_channels;
2046                 sband = NULL;
2047         }
2048
2049         if (!sband)
2050                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2051
2052         if (!sband || idx >= sband->n_channels) {
2053                 spin_unlock_irqrestore(&common->cc_lock, flags);
2054                 return -ENOENT;
2055         }
2056
2057         chan = &sband->channels[idx];
2058         pos = chan->hw_value;
2059         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2060         survey->channel = chan;
2061         spin_unlock_irqrestore(&common->cc_lock, flags);
2062
2063         return 0;
2064 }
2065
2066 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2067 {
2068         struct ath_wiphy *aphy = hw->priv;
2069         struct ath_softc *sc = aphy->sc;
2070
2071         mutex_lock(&sc->mutex);
2072         if (ath9k_wiphy_scanning(sc)) {
2073                 /*
2074                  * There is a race here in mac80211 but fixing it requires
2075                  * we revisit how we handle the scan complete callback.
2076                  * After mac80211 fixes we will not have configured hardware
2077                  * to the home channel nor would we have configured the RX
2078                  * filter yet.
2079                  */
2080                 mutex_unlock(&sc->mutex);
2081                 return;
2082         }
2083
2084         aphy->state = ATH_WIPHY_SCAN;
2085         ath9k_wiphy_pause_all_forced(sc, aphy);
2086         mutex_unlock(&sc->mutex);
2087 }
2088
2089 /*
2090  * XXX: this requires a revisit after the driver
2091  * scan_complete gets moved to another place/removed in mac80211.
2092  */
2093 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2094 {
2095         struct ath_wiphy *aphy = hw->priv;
2096         struct ath_softc *sc = aphy->sc;
2097
2098         mutex_lock(&sc->mutex);
2099         aphy->state = ATH_WIPHY_ACTIVE;
2100         mutex_unlock(&sc->mutex);
2101 }
2102
2103 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2104 {
2105         struct ath_wiphy *aphy = hw->priv;
2106         struct ath_softc *sc = aphy->sc;
2107         struct ath_hw *ah = sc->sc_ah;
2108
2109         mutex_lock(&sc->mutex);
2110         ah->coverage_class = coverage_class;
2111         ath9k_hw_init_global_settings(ah);
2112         mutex_unlock(&sc->mutex);
2113 }
2114
2115 struct ieee80211_ops ath9k_ops = {
2116         .tx                 = ath9k_tx,
2117         .start              = ath9k_start,
2118         .stop               = ath9k_stop,
2119         .add_interface      = ath9k_add_interface,
2120         .remove_interface   = ath9k_remove_interface,
2121         .config             = ath9k_config,
2122         .configure_filter   = ath9k_configure_filter,
2123         .sta_add            = ath9k_sta_add,
2124         .sta_remove         = ath9k_sta_remove,
2125         .conf_tx            = ath9k_conf_tx,
2126         .bss_info_changed   = ath9k_bss_info_changed,
2127         .set_key            = ath9k_set_key,
2128         .get_tsf            = ath9k_get_tsf,
2129         .set_tsf            = ath9k_set_tsf,
2130         .reset_tsf          = ath9k_reset_tsf,
2131         .ampdu_action       = ath9k_ampdu_action,
2132         .get_survey         = ath9k_get_survey,
2133         .sw_scan_start      = ath9k_sw_scan_start,
2134         .sw_scan_complete   = ath9k_sw_scan_complete,
2135         .rfkill_poll        = ath9k_rfkill_poll_state,
2136         .set_coverage_class = ath9k_set_coverage_class,
2137 };