1 /******************************************************************************
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/types.h>
35 #include <linux/lockdep.h>
36 #include <linux/init.h>
37 #include <linux/pci.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/skbuff.h>
41 #include <net/mac80211.h>
46 _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
48 const int interval = 10; /* microseconds */
52 if ((_il_rd(il, addr) & mask) == (bits & mask))
56 } while (t < timeout);
60 EXPORT_SYMBOL(_il_poll_bit);
63 il_set_bit(struct il_priv *p, u32 r, u32 m)
65 unsigned long reg_flags;
67 spin_lock_irqsave(&p->reg_lock, reg_flags);
69 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
71 EXPORT_SYMBOL(il_set_bit);
74 il_clear_bit(struct il_priv *p, u32 r, u32 m)
76 unsigned long reg_flags;
78 spin_lock_irqsave(&p->reg_lock, reg_flags);
79 _il_clear_bit(p, r, m);
80 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
82 EXPORT_SYMBOL(il_clear_bit);
85 _il_grab_nic_access(struct il_priv *il)
90 /* this bit wakes up the NIC */
91 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
94 * These bits say the device is running, and should keep running for
95 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
96 * but they do not indicate that embedded SRAM is restored yet;
97 * 3945 and 4965 have volatile SRAM, and must save/restore contents
98 * to/from host DRAM when sleeping/waking for power-saving.
99 * Each direction takes approximately 1/4 millisecond; with this
100 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
101 * series of register accesses are expected (e.g. reading Event Log),
102 * to keep device from sleeping.
104 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
105 * SRAM is okay/restored. We don't check that here because this call
106 * is just for hardware register access; but GP1 MAC_SLEEP check is a
107 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
111 _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
112 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
113 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
114 if (unlikely(ret < 0)) {
115 val = _il_rd(il, CSR_GP_CNTRL);
116 WARN_ONCE(1, "Timeout waiting for ucode processor access "
117 "(CSR_GP_CNTRL 0x%08x)\n", val);
118 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
124 EXPORT_SYMBOL_GPL(_il_grab_nic_access);
127 il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
129 const int interval = 10; /* microseconds */
133 if ((il_rd(il, addr) & mask) == mask)
137 } while (t < timeout);
141 EXPORT_SYMBOL(il_poll_bit);
144 il_rd_prph(struct il_priv *il, u32 reg)
146 unsigned long reg_flags;
149 spin_lock_irqsave(&il->reg_lock, reg_flags);
150 _il_grab_nic_access(il);
151 val = _il_rd_prph(il, reg);
152 _il_release_nic_access(il);
153 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
156 EXPORT_SYMBOL(il_rd_prph);
159 il_wr_prph(struct il_priv *il, u32 addr, u32 val)
161 unsigned long reg_flags;
163 spin_lock_irqsave(&il->reg_lock, reg_flags);
164 if (likely(_il_grab_nic_access(il))) {
165 _il_wr_prph(il, addr, val);
166 _il_release_nic_access(il);
168 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
170 EXPORT_SYMBOL(il_wr_prph);
173 il_read_targ_mem(struct il_priv *il, u32 addr)
175 unsigned long reg_flags;
178 spin_lock_irqsave(&il->reg_lock, reg_flags);
179 _il_grab_nic_access(il);
181 _il_wr(il, HBUS_TARG_MEM_RADDR, addr);
182 value = _il_rd(il, HBUS_TARG_MEM_RDAT);
184 _il_release_nic_access(il);
185 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
188 EXPORT_SYMBOL(il_read_targ_mem);
191 il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
193 unsigned long reg_flags;
195 spin_lock_irqsave(&il->reg_lock, reg_flags);
196 if (likely(_il_grab_nic_access(il))) {
197 _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
198 _il_wr(il, HBUS_TARG_MEM_WDAT, val);
199 _il_release_nic_access(il);
201 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
203 EXPORT_SYMBOL(il_write_targ_mem);
206 il_get_cmd_string(u8 cmd)
212 IL_CMD(C_RXON_ASSOC);
214 IL_CMD(C_RXON_TIMING);
220 IL_CMD(C_RATE_SCALE);
222 IL_CMD(C_TX_LINK_QUALITY_CMD);
223 IL_CMD(C_CHANNEL_SWITCH);
224 IL_CMD(N_CHANNEL_SWITCH);
225 IL_CMD(C_SPECTRUM_MEASUREMENT);
226 IL_CMD(N_SPECTRUM_MEASUREMENT);
229 IL_CMD(N_PM_DEBUG_STATS);
231 IL_CMD(C_SCAN_ABORT);
232 IL_CMD(N_SCAN_START);
233 IL_CMD(N_SCAN_RESULTS);
234 IL_CMD(N_SCAN_COMPLETE);
237 IL_CMD(C_TX_PWR_TBL);
241 IL_CMD(N_CARD_STATE);
242 IL_CMD(N_MISSED_BEACONS);
243 IL_CMD(C_CT_KILL_CONFIG);
244 IL_CMD(C_SENSITIVITY);
245 IL_CMD(C_PHY_CALIBRATION);
249 IL_CMD(N_COMPRESSED_BA);
255 EXPORT_SYMBOL(il_get_cmd_string);
257 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
260 il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd,
261 struct il_rx_pkt *pkt)
263 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
264 IL_ERR("Bad return from %s (0x%08X)\n",
265 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
268 #ifdef CONFIG_IWLEGACY_DEBUG
269 switch (cmd->hdr.cmd) {
270 case C_TX_LINK_QUALITY_CMD:
272 D_HC_DUMP("back from %s (0x%08X)\n",
273 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
276 D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd),
283 il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
287 BUG_ON(!(cmd->flags & CMD_ASYNC));
289 /* An asynchronous command can not expect an SKB to be set. */
290 BUG_ON(cmd->flags & CMD_WANT_SKB);
292 /* Assign a generic callback if one is not provided */
294 cmd->callback = il_generic_cmd_callback;
296 if (test_bit(S_EXIT_PENDING, &il->status))
299 ret = il_enqueue_hcmd(il, cmd);
301 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
302 il_get_cmd_string(cmd->id), ret);
309 il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
314 lockdep_assert_held(&il->mutex);
316 BUG_ON(cmd->flags & CMD_ASYNC);
318 /* A synchronous command can not have a callback set. */
319 BUG_ON(cmd->callback);
321 D_INFO("Attempting to send sync command %s\n",
322 il_get_cmd_string(cmd->id));
324 set_bit(S_HCMD_ACTIVE, &il->status);
325 D_INFO("Setting HCMD_ACTIVE for command %s\n",
326 il_get_cmd_string(cmd->id));
328 cmd_idx = il_enqueue_hcmd(il, cmd);
331 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
332 il_get_cmd_string(cmd->id), ret);
336 ret = wait_event_timeout(il->wait_command_queue,
337 !test_bit(S_HCMD_ACTIVE, &il->status),
338 HOST_COMPLETE_TIMEOUT);
340 if (test_bit(S_HCMD_ACTIVE, &il->status)) {
341 IL_ERR("Error sending %s: time out after %dms.\n",
342 il_get_cmd_string(cmd->id),
343 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
345 clear_bit(S_HCMD_ACTIVE, &il->status);
346 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
347 il_get_cmd_string(cmd->id));
353 if (test_bit(S_RFKILL, &il->status)) {
354 IL_ERR("Command %s aborted: RF KILL Switch\n",
355 il_get_cmd_string(cmd->id));
359 if (test_bit(S_FW_ERROR, &il->status)) {
360 IL_ERR("Command %s failed: FW Error\n",
361 il_get_cmd_string(cmd->id));
365 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
366 IL_ERR("Error: Response NULL in '%s'\n",
367 il_get_cmd_string(cmd->id));
376 if (cmd->flags & CMD_WANT_SKB) {
378 * Cancel the CMD_WANT_SKB flag for the cmd in the
379 * TX cmd queue. Otherwise in case the cmd comes
380 * in later, it will possibly set an invalid
381 * address (cmd->meta.source).
383 il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB;
386 if (cmd->reply_page) {
387 il_free_pages(il, cmd->reply_page);
393 EXPORT_SYMBOL(il_send_cmd_sync);
396 il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
398 if (cmd->flags & CMD_ASYNC)
399 return il_send_cmd_async(il, cmd);
401 return il_send_cmd_sync(il, cmd);
403 EXPORT_SYMBOL(il_send_cmd);
406 il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
408 struct il_host_cmd cmd = {
414 return il_send_cmd_sync(il, &cmd);
416 EXPORT_SYMBOL(il_send_cmd_pdu);
419 il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
420 void (*callback) (struct il_priv *il,
421 struct il_device_cmd *cmd,
422 struct il_rx_pkt *pkt))
424 struct il_host_cmd cmd = {
430 cmd.flags |= CMD_ASYNC;
431 cmd.callback = callback;
433 return il_send_cmd_async(il, &cmd);
435 EXPORT_SYMBOL(il_send_cmd_pdu_async);
437 /* default: IL_LED_BLINK(0) using blinking idx table */
439 module_param(led_mode, int, S_IRUGO);
440 MODULE_PARM_DESC(led_mode,
441 "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking");
443 /* Throughput OFF time(ms) ON time (ms)
456 static const struct ieee80211_tpt_blink il_blink[] = {
457 {.throughput = 0, .blink_time = 334},
458 {.throughput = 1 * 1024 - 1, .blink_time = 260},
459 {.throughput = 5 * 1024 - 1, .blink_time = 220},
460 {.throughput = 10 * 1024 - 1, .blink_time = 190},
461 {.throughput = 20 * 1024 - 1, .blink_time = 170},
462 {.throughput = 50 * 1024 - 1, .blink_time = 150},
463 {.throughput = 70 * 1024 - 1, .blink_time = 130},
464 {.throughput = 100 * 1024 - 1, .blink_time = 110},
465 {.throughput = 200 * 1024 - 1, .blink_time = 80},
466 {.throughput = 300 * 1024 - 1, .blink_time = 50},
470 * Adjust led blink rate to compensate on a MAC Clock difference on every HW
471 * Led blink rate analysis showed an average deviation of 0% on 3945,
473 * Need to compensate on the led on/off time per HW according to the deviation
474 * to achieve the desired led frequency
475 * The calculation is: (100-averageDeviation)/100 * blinkTime
476 * For code efficiency the calculation will be:
477 * compensation = (100 - averageDeviation) * 64 / 100
478 * NewBlinkTime = (compensation * BlinkTime) / 64
481 il_blink_compensation(struct il_priv *il, u8 time, u16 compensation)
484 IL_ERR("undefined blink compensation: "
485 "use pre-defined blinking time\n");
489 return (u8) ((time * compensation) >> 6);
492 /* Set led pattern command */
494 il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off)
496 struct il_led_cmd led_cmd = {
498 .interval = IL_DEF_LED_INTRVL
502 if (!test_bit(S_READY, &il->status))
505 if (il->blink_on == on && il->blink_off == off)
509 /* led is SOLID_ON */
513 D_LED("Led blink time compensation=%u\n",
514 il->cfg->led_compensation);
516 il_blink_compensation(il, on,
517 il->cfg->led_compensation);
519 il_blink_compensation(il, off,
520 il->cfg->led_compensation);
522 ret = il->ops->send_led_cmd(il, &led_cmd);
531 il_led_brightness_set(struct led_classdev *led_cdev,
532 enum led_brightness brightness)
534 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
535 unsigned long on = 0;
540 il_led_cmd(il, on, 0);
544 il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
545 unsigned long *delay_off)
547 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
549 return il_led_cmd(il, *delay_on, *delay_off);
553 il_leds_init(struct il_priv *il)
558 if (mode == IL_LED_DEFAULT)
559 mode = il->cfg->led_mode;
562 kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy));
563 il->led.brightness_set = il_led_brightness_set;
564 il->led.blink_set = il_led_blink_set;
565 il->led.max_brightness = 1;
572 il->led.default_trigger =
573 ieee80211_create_tpt_led_trigger(il->hw,
574 IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
576 ARRAY_SIZE(il_blink));
578 case IL_LED_RF_STATE:
579 il->led.default_trigger = ieee80211_get_radio_led_name(il->hw);
583 ret = led_classdev_register(&il->pci_dev->dev, &il->led);
589 il->led_registered = true;
591 EXPORT_SYMBOL(il_leds_init);
594 il_leds_exit(struct il_priv *il)
596 if (!il->led_registered)
599 led_classdev_unregister(&il->led);
602 EXPORT_SYMBOL(il_leds_exit);
604 /************************** EEPROM BANDS ****************************
606 * The il_eeprom_band definitions below provide the mapping from the
607 * EEPROM contents to the specific channel number supported for each
610 * For example, il_priv->eeprom.band_3_channels[4] from the band_3
611 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
612 * The specific geography and calibration information for that channel
613 * is contained in the eeprom map itself.
615 * During init, we copy the eeprom information and channel map
616 * information into il->channel_info_24/52 and il->channel_map_24/52
618 * channel_map_24/52 provides the idx in the channel_info array for a
619 * given channel. We have to have two separate maps as there is channel
620 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
623 * A value of 0xff stored in the channel_map indicates that the channel
624 * is not supported by the hardware at all.
626 * A value of 0xfe in the channel_map indicates that the channel is not
627 * valid for Tx with the current hardware. This means that
628 * while the system can tune and receive on a given channel, it may not
629 * be able to associate or transmit any frames on that
630 * channel. There is no corresponding channel information for that
633 *********************************************************************/
636 const u8 il_eeprom_band_1[14] = {
637 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
641 static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
642 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
645 static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
646 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
649 static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
650 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
653 static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
654 145, 149, 153, 157, 161, 165
657 static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
661 static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
662 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
665 /******************************************************************************
667 * EEPROM related functions
669 ******************************************************************************/
672 il_eeprom_verify_signature(struct il_priv *il)
674 u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
677 D_EEPROM("EEPROM signature=0x%08x\n", gp);
679 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
680 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
683 IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp);
691 il_eeprom_query_addr(const struct il_priv *il, size_t offset)
693 BUG_ON(offset >= il->cfg->eeprom_size);
694 return &il->eeprom[offset];
696 EXPORT_SYMBOL(il_eeprom_query_addr);
699 il_eeprom_query16(const struct il_priv *il, size_t offset)
703 return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8);
705 EXPORT_SYMBOL(il_eeprom_query16);
708 * il_eeprom_init - read EEPROM contents
710 * Load the EEPROM contents from adapter into il->eeprom
712 * NOTE: This routine uses the non-debug IO access functions.
715 il_eeprom_init(struct il_priv *il)
718 u32 gp = _il_rd(il, CSR_EEPROM_GP);
723 /* allocate eeprom */
724 sz = il->cfg->eeprom_size;
725 D_EEPROM("NVM size = %d\n", sz);
726 il->eeprom = kzalloc(sz, GFP_KERNEL);
731 e = (__le16 *) il->eeprom;
733 il->ops->apm_init(il);
735 ret = il_eeprom_verify_signature(il);
737 IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
742 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
743 ret = il->ops->eeprom_acquire_semaphore(il);
745 IL_ERR("Failed to acquire EEPROM semaphore.\n");
750 /* eeprom is an array of 16bit values */
751 for (addr = 0; addr < sz; addr += sizeof(u16)) {
754 _il_wr(il, CSR_EEPROM_REG,
755 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
758 _il_poll_bit(il, CSR_EEPROM_REG,
759 CSR_EEPROM_REG_READ_VALID_MSK,
760 CSR_EEPROM_REG_READ_VALID_MSK,
761 IL_EEPROM_ACCESS_TIMEOUT);
763 IL_ERR("Time out reading EEPROM[%d]\n", addr);
766 r = _il_rd(il, CSR_EEPROM_REG);
767 e[addr / 2] = cpu_to_le16(r >> 16);
770 D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM",
771 il_eeprom_query16(il, EEPROM_VERSION));
775 il->ops->eeprom_release_semaphore(il);
780 /* Reset chip to save power until we load uCode during "up". */
785 EXPORT_SYMBOL(il_eeprom_init);
788 il_eeprom_free(struct il_priv *il)
793 EXPORT_SYMBOL(il_eeprom_free);
796 il_init_band_reference(const struct il_priv *il, int eep_band,
797 int *eeprom_ch_count,
798 const struct il_eeprom_channel **eeprom_ch_info,
799 const u8 **eeprom_ch_idx)
801 u32 offset = il->cfg->regulatory_bands[eep_band - 1];
804 case 1: /* 2.4GHz band */
805 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
807 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
809 *eeprom_ch_idx = il_eeprom_band_1;
811 case 2: /* 4.9GHz band */
812 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
814 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
816 *eeprom_ch_idx = il_eeprom_band_2;
818 case 3: /* 5.2GHz band */
819 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
821 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
823 *eeprom_ch_idx = il_eeprom_band_3;
825 case 4: /* 5.5GHz band */
826 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
828 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
830 *eeprom_ch_idx = il_eeprom_band_4;
832 case 5: /* 5.7GHz band */
833 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
835 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
837 *eeprom_ch_idx = il_eeprom_band_5;
839 case 6: /* 2.4GHz ht40 channels */
840 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
842 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
844 *eeprom_ch_idx = il_eeprom_band_6;
846 case 7: /* 5 GHz ht40 channels */
847 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
849 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
851 *eeprom_ch_idx = il_eeprom_band_7;
858 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
861 * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
863 * Does not set up a command, or touch hardware.
866 il_mod_ht40_chan_info(struct il_priv *il, enum ieee80211_band band, u16 channel,
867 const struct il_eeprom_channel *eeprom_ch,
868 u8 clear_ht40_extension_channel)
870 struct il_channel_info *ch_info;
873 (struct il_channel_info *)il_get_channel_info(il, band, channel);
875 if (!il_is_channel_valid(ch_info))
878 D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
879 " Ad-Hoc %ssupported\n", ch_info->channel,
880 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
881 CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE),
882 CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE),
883 CHECK_AND_PRINT(DFS), eeprom_ch->flags,
884 eeprom_ch->max_power_avg,
885 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
886 !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not ");
888 ch_info->ht40_eeprom = *eeprom_ch;
889 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
890 ch_info->ht40_flags = eeprom_ch->flags;
891 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
892 ch_info->ht40_extension_channel &=
893 ~clear_ht40_extension_channel;
898 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
902 * il_init_channel_map - Set up driver's info for all possible channels
905 il_init_channel_map(struct il_priv *il)
907 int eeprom_ch_count = 0;
908 const u8 *eeprom_ch_idx = NULL;
909 const struct il_eeprom_channel *eeprom_ch_info = NULL;
911 struct il_channel_info *ch_info;
913 if (il->channel_count) {
914 D_EEPROM("Channel map already initialized.\n");
918 D_EEPROM("Initializing regulatory info from EEPROM\n");
921 ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) +
922 ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) +
923 ARRAY_SIZE(il_eeprom_band_5);
925 D_EEPROM("Parsing data for %d channels.\n", il->channel_count);
928 kzalloc(sizeof(struct il_channel_info) * il->channel_count,
930 if (!il->channel_info) {
931 IL_ERR("Could not allocate channel_info\n");
932 il->channel_count = 0;
936 ch_info = il->channel_info;
938 /* Loop through the 5 EEPROM bands adding them in order to the
939 * channel map we maintain (that contains additional information than
940 * what just in the EEPROM) */
941 for (band = 1; band <= 5; band++) {
943 il_init_band_reference(il, band, &eeprom_ch_count,
944 &eeprom_ch_info, &eeprom_ch_idx);
946 /* Loop through each band adding each of the channels */
947 for (ch = 0; ch < eeprom_ch_count; ch++) {
948 ch_info->channel = eeprom_ch_idx[ch];
951 1) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
953 /* permanently store EEPROM's channel regulatory flags
954 * and max power in channel info database. */
955 ch_info->eeprom = eeprom_ch_info[ch];
957 /* Copy the run-time flags so they are there even on
958 * invalid channels */
959 ch_info->flags = eeprom_ch_info[ch].flags;
960 /* First write that ht40 is not enabled, and then enable
962 ch_info->ht40_extension_channel =
963 IEEE80211_CHAN_NO_HT40;
965 if (!(il_is_channel_valid(ch_info))) {
966 D_EEPROM("Ch. %d Flags %x [%sGHz] - "
967 "No traffic\n", ch_info->channel,
969 il_is_channel_a_band(ch_info) ? "5.2" :
975 /* Initialize regulatory-based run-time data */
976 ch_info->max_power_avg = ch_info->curr_txpow =
977 eeprom_ch_info[ch].max_power_avg;
978 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
979 ch_info->min_power = 0;
981 D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):"
982 " Ad-Hoc %ssupported\n", ch_info->channel,
983 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
984 CHECK_AND_PRINT_I(VALID),
985 CHECK_AND_PRINT_I(IBSS),
986 CHECK_AND_PRINT_I(ACTIVE),
987 CHECK_AND_PRINT_I(RADAR),
988 CHECK_AND_PRINT_I(WIDE),
989 CHECK_AND_PRINT_I(DFS),
990 eeprom_ch_info[ch].flags,
991 eeprom_ch_info[ch].max_power_avg,
992 ((eeprom_ch_info[ch].
993 flags & EEPROM_CHANNEL_IBSS) &&
994 !(eeprom_ch_info[ch].
995 flags & EEPROM_CHANNEL_RADAR)) ? "" :
1002 /* Check if we do have HT40 channels */
1003 if (il->cfg->regulatory_bands[5] == EEPROM_REGULATORY_BAND_NO_HT40 &&
1004 il->cfg->regulatory_bands[6] == EEPROM_REGULATORY_BAND_NO_HT40)
1007 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1008 for (band = 6; band <= 7; band++) {
1009 enum ieee80211_band ieeeband;
1011 il_init_band_reference(il, band, &eeprom_ch_count,
1012 &eeprom_ch_info, &eeprom_ch_idx);
1014 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1016 (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1018 /* Loop through each band adding each of the channels */
1019 for (ch = 0; ch < eeprom_ch_count; ch++) {
1020 /* Set up driver's info for lower half */
1021 il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch],
1022 &eeprom_ch_info[ch],
1023 IEEE80211_CHAN_NO_HT40PLUS);
1025 /* Set up driver's info for upper half */
1026 il_mod_ht40_chan_info(il, ieeeband,
1027 eeprom_ch_idx[ch] + 4,
1028 &eeprom_ch_info[ch],
1029 IEEE80211_CHAN_NO_HT40MINUS);
1035 EXPORT_SYMBOL(il_init_channel_map);
1038 * il_free_channel_map - undo allocations in il_init_channel_map
1041 il_free_channel_map(struct il_priv *il)
1043 kfree(il->channel_info);
1044 il->channel_count = 0;
1046 EXPORT_SYMBOL(il_free_channel_map);
1049 * il_get_channel_info - Find driver's ilate channel info
1051 * Based on band and channel number.
1053 const struct il_channel_info *
1054 il_get_channel_info(const struct il_priv *il, enum ieee80211_band band,
1060 case IEEE80211_BAND_5GHZ:
1061 for (i = 14; i < il->channel_count; i++) {
1062 if (il->channel_info[i].channel == channel)
1063 return &il->channel_info[i];
1066 case IEEE80211_BAND_2GHZ:
1067 if (channel >= 1 && channel <= 14)
1068 return &il->channel_info[channel - 1];
1076 EXPORT_SYMBOL(il_get_channel_info);
1079 * Setting power level allows the card to go to sleep when not busy.
1081 * We calculate a sleep command based on the required latency, which
1082 * we get from mac80211. In order to handle thermal throttling, we can
1083 * also use pre-defined power levels.
1087 * This defines the old power levels. They are still used by default
1088 * (level 1) and for thermal throttle (levels 3 through 5)
1091 struct il_power_vec_entry {
1092 struct il_powertable_cmd cmd;
1093 u8 no_dtim; /* number of skip dtim */
1097 il_power_sleep_cam_cmd(struct il_priv *il, struct il_powertable_cmd *cmd)
1099 memset(cmd, 0, sizeof(*cmd));
1101 if (il->power_data.pci_pm)
1102 cmd->flags |= IL_POWER_PCI_PM_MSK;
1104 D_POWER("Sleep command for CAM\n");
1108 il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
1110 D_POWER("Sending power/sleep command\n");
1111 D_POWER("Flags value = 0x%08X\n", cmd->flags);
1112 D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1113 D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1114 D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1115 le32_to_cpu(cmd->sleep_interval[0]),
1116 le32_to_cpu(cmd->sleep_interval[1]),
1117 le32_to_cpu(cmd->sleep_interval[2]),
1118 le32_to_cpu(cmd->sleep_interval[3]),
1119 le32_to_cpu(cmd->sleep_interval[4]));
1121 return il_send_cmd_pdu(il, C_POWER_TBL,
1122 sizeof(struct il_powertable_cmd), cmd);
1126 il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force)
1131 lockdep_assert_held(&il->mutex);
1133 /* Don't update the RX chain when chain noise calibration is running */
1134 update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
1135 il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
1137 if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
1140 if (!il_is_ready_rf(il))
1143 /* scan complete use sleep_power_next, need to be updated */
1144 memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
1145 if (test_bit(S_SCANNING, &il->status) && !force) {
1146 D_INFO("Defer power set mode while scanning\n");
1150 if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
1151 set_bit(S_POWER_PMI, &il->status);
1153 ret = il_set_power(il, cmd);
1155 if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
1156 clear_bit(S_POWER_PMI, &il->status);
1158 if (il->ops->update_chain_flags && update_chains)
1159 il->ops->update_chain_flags(il);
1160 else if (il->ops->update_chain_flags)
1161 D_POWER("Cannot update the power, chain noise "
1162 "calibration running: %d\n",
1163 il->chain_noise_data.state);
1165 memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
1167 IL_ERR("set power fail, ret = %d", ret);
1173 il_power_update_mode(struct il_priv *il, bool force)
1175 struct il_powertable_cmd cmd;
1177 il_power_sleep_cam_cmd(il, &cmd);
1178 return il_power_set_mode(il, &cmd, force);
1180 EXPORT_SYMBOL(il_power_update_mode);
1182 /* initialize to default */
1184 il_power_initialize(struct il_priv *il)
1188 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
1189 il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
1191 il->power_data.debug_sleep_level_override = -1;
1193 memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd));
1195 EXPORT_SYMBOL(il_power_initialize);
1197 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
1198 * sending probe req. This should be set long enough to hear probe responses
1199 * from more than one AP. */
1200 #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
1201 #define IL_ACTIVE_DWELL_TIME_52 (20)
1203 #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
1204 #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
1206 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
1207 * Must be set longer than active dwell time.
1208 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
1209 #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
1210 #define IL_PASSIVE_DWELL_TIME_52 (10)
1211 #define IL_PASSIVE_DWELL_BASE (100)
1212 #define IL_CHANNEL_TUNE_TIME 5
1215 il_send_scan_abort(struct il_priv *il)
1218 struct il_rx_pkt *pkt;
1219 struct il_host_cmd cmd = {
1221 .flags = CMD_WANT_SKB,
1224 /* Exit instantly with error when device is not ready
1225 * to receive scan abort command or it does not perform
1226 * hardware scan currently */
1227 if (!test_bit(S_READY, &il->status) ||
1228 !test_bit(S_GEO_CONFIGURED, &il->status) ||
1229 !test_bit(S_SCAN_HW, &il->status) ||
1230 test_bit(S_FW_ERROR, &il->status) ||
1231 test_bit(S_EXIT_PENDING, &il->status))
1234 ret = il_send_cmd_sync(il, &cmd);
1238 pkt = (struct il_rx_pkt *)cmd.reply_page;
1239 if (pkt->u.status != CAN_ABORT_STATUS) {
1240 /* The scan abort will return 1 for success or
1241 * 2 for "failure". A failure condition can be
1242 * due to simply not being in an active scan which
1243 * can occur if we send the scan abort before we
1244 * the microcode has notified us that a scan is
1246 D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
1250 il_free_pages(il, cmd.reply_page);
1255 il_complete_scan(struct il_priv *il, bool aborted)
1257 /* check if scan was requested from mac80211 */
1258 if (il->scan_request) {
1259 D_SCAN("Complete scan in mac80211\n");
1260 ieee80211_scan_completed(il->hw, aborted);
1263 il->scan_vif = NULL;
1264 il->scan_request = NULL;
1268 il_force_scan_end(struct il_priv *il)
1270 lockdep_assert_held(&il->mutex);
1272 if (!test_bit(S_SCANNING, &il->status)) {
1273 D_SCAN("Forcing scan end while not scanning\n");
1277 D_SCAN("Forcing scan end\n");
1278 clear_bit(S_SCANNING, &il->status);
1279 clear_bit(S_SCAN_HW, &il->status);
1280 clear_bit(S_SCAN_ABORTING, &il->status);
1281 il_complete_scan(il, true);
1285 il_do_scan_abort(struct il_priv *il)
1289 lockdep_assert_held(&il->mutex);
1291 if (!test_bit(S_SCANNING, &il->status)) {
1292 D_SCAN("Not performing scan to abort\n");
1296 if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
1297 D_SCAN("Scan abort in progress\n");
1301 ret = il_send_scan_abort(il);
1303 D_SCAN("Send scan abort failed %d\n", ret);
1304 il_force_scan_end(il);
1306 D_SCAN("Successfully send scan abort\n");
1310 * il_scan_cancel - Cancel any currently executing HW scan
1313 il_scan_cancel(struct il_priv *il)
1315 D_SCAN("Queuing abort scan\n");
1316 queue_work(il->workqueue, &il->abort_scan);
1319 EXPORT_SYMBOL(il_scan_cancel);
1322 * il_scan_cancel_timeout - Cancel any currently executing HW scan
1323 * @ms: amount of time to wait (in milliseconds) for scan to abort
1327 il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
1329 unsigned long timeout = jiffies + msecs_to_jiffies(ms);
1331 lockdep_assert_held(&il->mutex);
1333 D_SCAN("Scan cancel timeout\n");
1335 il_do_scan_abort(il);
1337 while (time_before_eq(jiffies, timeout)) {
1338 if (!test_bit(S_SCAN_HW, &il->status))
1343 return test_bit(S_SCAN_HW, &il->status);
1345 EXPORT_SYMBOL(il_scan_cancel_timeout);
1347 /* Service response to C_SCAN (0x80) */
1349 il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb)
1351 #ifdef CONFIG_IWLEGACY_DEBUG
1352 struct il_rx_pkt *pkt = rxb_addr(rxb);
1353 struct il_scanreq_notification *notif =
1354 (struct il_scanreq_notification *)pkt->u.raw;
1356 D_SCAN("Scan request status = 0x%x\n", notif->status);
1360 /* Service N_SCAN_START (0x82) */
1362 il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb)
1364 struct il_rx_pkt *pkt = rxb_addr(rxb);
1365 struct il_scanstart_notification *notif =
1366 (struct il_scanstart_notification *)pkt->u.raw;
1367 il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
1368 D_SCAN("Scan start: " "%d [802.11%s] "
1369 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel,
1370 notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high),
1371 le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer);
1374 /* Service N_SCAN_RESULTS (0x83) */
1376 il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb)
1378 #ifdef CONFIG_IWLEGACY_DEBUG
1379 struct il_rx_pkt *pkt = rxb_addr(rxb);
1380 struct il_scanresults_notification *notif =
1381 (struct il_scanresults_notification *)pkt->u.raw;
1383 D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d "
1384 "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a",
1385 le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low),
1386 le32_to_cpu(notif->stats[0]),
1387 le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
1391 /* Service N_SCAN_COMPLETE (0x84) */
1393 il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb)
1396 #ifdef CONFIG_IWLEGACY_DEBUG
1397 struct il_rx_pkt *pkt = rxb_addr(rxb);
1398 struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
1401 D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
1402 scan_notif->scanned_channels, scan_notif->tsf_low,
1403 scan_notif->tsf_high, scan_notif->status);
1405 /* The HW is no longer scanning */
1406 clear_bit(S_SCAN_HW, &il->status);
1408 D_SCAN("Scan on %sGHz took %dms\n",
1409 (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
1410 jiffies_to_msecs(jiffies - il->scan_start));
1412 queue_work(il->workqueue, &il->scan_completed);
1416 il_setup_rx_scan_handlers(struct il_priv *il)
1419 il->handlers[C_SCAN] = il_hdl_scan;
1420 il->handlers[N_SCAN_START] = il_hdl_scan_start;
1421 il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results;
1422 il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete;
1424 EXPORT_SYMBOL(il_setup_rx_scan_handlers);
1427 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
1430 if (band == IEEE80211_BAND_5GHZ)
1431 return IL_ACTIVE_DWELL_TIME_52 +
1432 IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
1434 return IL_ACTIVE_DWELL_TIME_24 +
1435 IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
1437 EXPORT_SYMBOL(il_get_active_dwell_time);
1440 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
1441 struct ieee80211_vif *vif)
1447 IEEE80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE +
1448 IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE +
1449 IL_PASSIVE_DWELL_TIME_52;
1451 if (il_is_any_associated(il)) {
1453 * If we're associated, we clamp the maximum passive
1454 * dwell time to be 98% of the smallest beacon interval
1455 * (minus 2 * channel tune time)
1457 value = il->vif ? il->vif->bss_conf.beacon_int : 0;
1458 if (value > IL_PASSIVE_DWELL_BASE || !value)
1459 value = IL_PASSIVE_DWELL_BASE;
1460 value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
1461 passive = min(value, passive);
1466 EXPORT_SYMBOL(il_get_passive_dwell_time);
1469 il_init_scan_params(struct il_priv *il)
1471 u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
1472 if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
1473 il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
1474 if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
1475 il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
1477 EXPORT_SYMBOL(il_init_scan_params);
1480 il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif)
1484 lockdep_assert_held(&il->mutex);
1486 cancel_delayed_work(&il->scan_check);
1488 if (!il_is_ready_rf(il)) {
1489 IL_WARN("Request scan called when driver not ready.\n");
1493 if (test_bit(S_SCAN_HW, &il->status)) {
1494 D_SCAN("Multiple concurrent scan requests in parallel.\n");
1498 if (test_bit(S_SCAN_ABORTING, &il->status)) {
1499 D_SCAN("Scan request while abort pending.\n");
1503 D_SCAN("Starting scan...\n");
1505 set_bit(S_SCANNING, &il->status);
1506 il->scan_start = jiffies;
1508 ret = il->ops->request_scan(il, vif);
1510 clear_bit(S_SCANNING, &il->status);
1514 queue_delayed_work(il->workqueue, &il->scan_check,
1515 IL_SCAN_CHECK_WATCHDOG);
1521 il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1522 struct cfg80211_scan_request *req)
1524 struct il_priv *il = hw->priv;
1527 if (req->n_channels == 0) {
1528 IL_ERR("Can not scan on no channels.\n");
1532 mutex_lock(&il->mutex);
1533 D_MAC80211("enter\n");
1535 if (test_bit(S_SCANNING, &il->status)) {
1536 D_SCAN("Scan already in progress.\n");
1541 /* mac80211 will only ask for one band at a time */
1542 il->scan_request = req;
1544 il->scan_band = req->channels[0]->band;
1546 ret = il_scan_initiate(il, vif);
1549 D_MAC80211("leave ret %d\n", ret);
1550 mutex_unlock(&il->mutex);
1554 EXPORT_SYMBOL(il_mac_hw_scan);
1557 il_bg_scan_check(struct work_struct *data)
1559 struct il_priv *il =
1560 container_of(data, struct il_priv, scan_check.work);
1562 D_SCAN("Scan check work\n");
1564 /* Since we are here firmware does not finish scan and
1565 * most likely is in bad shape, so we don't bother to
1566 * send abort command, just force scan complete to mac80211 */
1567 mutex_lock(&il->mutex);
1568 il_force_scan_end(il);
1569 mutex_unlock(&il->mutex);
1573 * il_fill_probe_req - fill in all required fields and IE for probe request
1577 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1578 const u8 *ta, const u8 *ies, int ie_len, int left)
1583 /* Make sure there is enough space for the probe request,
1584 * two mandatory IEs and the data */
1589 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1590 eth_broadcast_addr(frame->da);
1591 memcpy(frame->sa, ta, ETH_ALEN);
1592 eth_broadcast_addr(frame->bssid);
1593 frame->seq_ctrl = 0;
1598 pos = &frame->u.probe_req.variable[0];
1600 /* fill in our indirect SSID IE */
1604 *pos++ = WLAN_EID_SSID;
1609 if (WARN_ON(left < ie_len))
1612 if (ies && ie_len) {
1613 memcpy(pos, ies, ie_len);
1619 EXPORT_SYMBOL(il_fill_probe_req);
1622 il_bg_abort_scan(struct work_struct *work)
1624 struct il_priv *il = container_of(work, struct il_priv, abort_scan);
1626 D_SCAN("Abort scan work\n");
1628 /* We keep scan_check work queued in case when firmware will not
1629 * report back scan completed notification */
1630 mutex_lock(&il->mutex);
1631 il_scan_cancel_timeout(il, 200);
1632 mutex_unlock(&il->mutex);
1636 il_bg_scan_completed(struct work_struct *work)
1638 struct il_priv *il = container_of(work, struct il_priv, scan_completed);
1641 D_SCAN("Completed scan.\n");
1643 cancel_delayed_work(&il->scan_check);
1645 mutex_lock(&il->mutex);
1647 aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
1649 D_SCAN("Aborted scan completed.\n");
1651 if (!test_and_clear_bit(S_SCANNING, &il->status)) {
1652 D_SCAN("Scan already completed.\n");
1656 il_complete_scan(il, aborted);
1659 /* Can we still talk to firmware ? */
1660 if (!il_is_ready_rf(il))
1664 * We do not commit power settings while scan is pending,
1665 * do it now if the settings changed.
1667 il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
1668 il_set_tx_power(il, il->tx_power_next, false);
1670 il->ops->post_scan(il);
1673 mutex_unlock(&il->mutex);
1677 il_setup_scan_deferred_work(struct il_priv *il)
1679 INIT_WORK(&il->scan_completed, il_bg_scan_completed);
1680 INIT_WORK(&il->abort_scan, il_bg_abort_scan);
1681 INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
1683 EXPORT_SYMBOL(il_setup_scan_deferred_work);
1686 il_cancel_scan_deferred_work(struct il_priv *il)
1688 cancel_work_sync(&il->abort_scan);
1689 cancel_work_sync(&il->scan_completed);
1691 if (cancel_delayed_work_sync(&il->scan_check)) {
1692 mutex_lock(&il->mutex);
1693 il_force_scan_end(il);
1694 mutex_unlock(&il->mutex);
1697 EXPORT_SYMBOL(il_cancel_scan_deferred_work);
1699 /* il->sta_lock must be held */
1701 il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
1704 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
1705 IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n",
1706 sta_id, il->stations[sta_id].sta.sta.addr);
1708 if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
1709 D_ASSOC("STA id %u addr %pM already present"
1710 " in uCode (according to driver)\n", sta_id,
1711 il->stations[sta_id].sta.sta.addr);
1713 il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
1714 D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id,
1715 il->stations[sta_id].sta.sta.addr);
1720 il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta,
1721 struct il_rx_pkt *pkt, bool sync)
1723 u8 sta_id = addsta->sta.sta_id;
1724 unsigned long flags;
1727 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1728 IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags);
1732 D_INFO("Processing response for adding station %u\n", sta_id);
1734 spin_lock_irqsave(&il->sta_lock, flags);
1736 switch (pkt->u.add_sta.status) {
1737 case ADD_STA_SUCCESS_MSK:
1738 D_INFO("C_ADD_STA PASSED\n");
1739 il_sta_ucode_activate(il, sta_id);
1742 case ADD_STA_NO_ROOM_IN_TBL:
1743 IL_ERR("Adding station %d failed, no room in table.\n", sta_id);
1745 case ADD_STA_NO_BLOCK_ACK_RESOURCE:
1746 IL_ERR("Adding station %d failed, no block ack resource.\n",
1749 case ADD_STA_MODIFY_NON_EXIST_STA:
1750 IL_ERR("Attempting to modify non-existing station %d\n",
1754 D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status);
1758 D_INFO("%s station id %u addr %pM\n",
1759 il->stations[sta_id].sta.mode ==
1760 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id,
1761 il->stations[sta_id].sta.sta.addr);
1764 * XXX: The MAC address in the command buffer is often changed from
1765 * the original sent to the device. That is, the MAC address
1766 * written to the command buffer often is not the same MAC address
1767 * read from the command buffer when the command returns. This
1768 * issue has not yet been resolved and this debugging is left to
1769 * observe the problem.
1771 D_INFO("%s station according to cmd buffer %pM\n",
1772 il->stations[sta_id].sta.mode ==
1773 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr);
1774 spin_unlock_irqrestore(&il->sta_lock, flags);
1780 il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd,
1781 struct il_rx_pkt *pkt)
1783 struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload;
1785 il_process_add_sta_resp(il, addsta, pkt, false);
1790 il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags)
1792 struct il_rx_pkt *pkt = NULL;
1794 u8 data[sizeof(*sta)];
1795 struct il_host_cmd cmd = {
1800 u8 sta_id __maybe_unused = sta->sta.sta_id;
1802 D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr,
1803 flags & CMD_ASYNC ? "a" : "");
1805 if (flags & CMD_ASYNC)
1806 cmd.callback = il_add_sta_callback;
1808 cmd.flags |= CMD_WANT_SKB;
1812 cmd.len = il->ops->build_addsta_hcmd(sta, data);
1813 ret = il_send_cmd(il, &cmd);
1815 if (ret || (flags & CMD_ASYNC))
1819 pkt = (struct il_rx_pkt *)cmd.reply_page;
1820 ret = il_process_add_sta_resp(il, sta, pkt, true);
1822 il_free_pages(il, cmd.reply_page);
1826 EXPORT_SYMBOL(il_send_add_sta);
1829 il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta)
1831 struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
1835 if (!sta || !sta_ht_inf->ht_supported)
1838 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
1839 D_ASSOC("spatial multiplexing power save mode: %s\n",
1840 (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ? "static" :
1841 (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ? "dynamic" :
1844 sta_flags = il->stations[idx].sta.station_flags;
1846 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
1848 switch (mimo_ps_mode) {
1849 case WLAN_HT_CAP_SM_PS_STATIC:
1850 sta_flags |= STA_FLG_MIMO_DIS_MSK;
1852 case WLAN_HT_CAP_SM_PS_DYNAMIC:
1853 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
1855 case WLAN_HT_CAP_SM_PS_DISABLED:
1858 IL_WARN("Invalid MIMO PS mode %d\n", mimo_ps_mode);
1863 cpu_to_le32((u32) sta_ht_inf->
1864 ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
1867 cpu_to_le32((u32) sta_ht_inf->
1868 ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
1870 if (il_is_ht40_tx_allowed(il, &sta->ht_cap))
1871 sta_flags |= STA_FLG_HT40_EN_MSK;
1873 sta_flags &= ~STA_FLG_HT40_EN_MSK;
1875 il->stations[idx].sta.station_flags = sta_flags;
1881 * il_prep_station - Prepare station information for addition
1883 * should be called with sta_lock held
1886 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
1887 struct ieee80211_sta *sta)
1889 struct il_station_entry *station;
1891 u8 sta_id = IL_INVALID_STATION;
1896 else if (is_broadcast_ether_addr(addr))
1897 sta_id = il->hw_params.bcast_id;
1899 for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
1900 if (ether_addr_equal(il->stations[i].sta.sta.addr,
1906 if (!il->stations[i].used &&
1907 sta_id == IL_INVALID_STATION)
1912 * These two conditions have the same outcome, but keep them
1915 if (unlikely(sta_id == IL_INVALID_STATION))
1919 * uCode is not able to deal with multiple requests to add a
1920 * station. Keep track if one is in progress so that we do not send
1923 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1924 D_INFO("STA %d already in process of being added.\n", sta_id);
1928 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1929 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
1930 ether_addr_equal(il->stations[sta_id].sta.sta.addr, addr)) {
1931 D_ASSOC("STA %d (%pM) already added, not adding again.\n",
1936 station = &il->stations[sta_id];
1937 station->used = IL_STA_DRIVER_ACTIVE;
1938 D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr);
1941 /* Set up the C_ADD_STA command to send to device */
1942 memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
1943 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
1944 station->sta.mode = 0;
1945 station->sta.sta.sta_id = sta_id;
1946 station->sta.station_flags = 0;
1949 * OK to call unconditionally, since local stations (IBSS BSSID
1950 * STA and broadcast STA) pass in a NULL sta, and mac80211
1951 * doesn't allow HT IBSS.
1953 il_set_ht_add_station(il, sta_id, sta);
1956 rate = (il->band == IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP;
1957 /* Turn on both antennas for the station... */
1958 station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
1963 EXPORT_SYMBOL_GPL(il_prep_station);
1965 #define STA_WAIT_TIMEOUT (HZ/2)
1968 * il_add_station_common -
1971 il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
1972 struct ieee80211_sta *sta, u8 *sta_id_r)
1974 unsigned long flags_spin;
1977 struct il_addsta_cmd sta_cmd;
1980 spin_lock_irqsave(&il->sta_lock, flags_spin);
1981 sta_id = il_prep_station(il, addr, is_ap, sta);
1982 if (sta_id == IL_INVALID_STATION) {
1983 IL_ERR("Unable to prepare station %pM for addition\n", addr);
1984 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1989 * uCode is not able to deal with multiple requests to add a
1990 * station. Keep track if one is in progress so that we do not send
1993 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1994 D_INFO("STA %d already in process of being added.\n", sta_id);
1995 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1999 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
2000 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2001 D_ASSOC("STA %d (%pM) already added, not adding again.\n",
2003 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2007 il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
2008 memcpy(&sta_cmd, &il->stations[sta_id].sta,
2009 sizeof(struct il_addsta_cmd));
2010 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2012 /* Add station to device's station table */
2013 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2015 spin_lock_irqsave(&il->sta_lock, flags_spin);
2016 IL_ERR("Adding station %pM failed.\n",
2017 il->stations[sta_id].sta.sta.addr);
2018 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2019 il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2020 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2025 EXPORT_SYMBOL(il_add_station_common);
2028 * il_sta_ucode_deactivate - deactivate ucode status for a station
2030 * il->sta_lock must be held
2033 il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
2035 /* Ucode must be active and driver must be non active */
2036 if ((il->stations[sta_id].
2037 used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
2038 IL_STA_UCODE_ACTIVE)
2039 IL_ERR("removed non active STA %u\n", sta_id);
2041 il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
2043 memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
2044 D_ASSOC("Removed STA %u\n", sta_id);
2048 il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id,
2051 struct il_rx_pkt *pkt;
2054 unsigned long flags_spin;
2055 struct il_rem_sta_cmd rm_sta_cmd;
2057 struct il_host_cmd cmd = {
2059 .len = sizeof(struct il_rem_sta_cmd),
2061 .data = &rm_sta_cmd,
2064 memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
2065 rm_sta_cmd.num_sta = 1;
2066 memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
2068 cmd.flags |= CMD_WANT_SKB;
2070 ret = il_send_cmd(il, &cmd);
2075 pkt = (struct il_rx_pkt *)cmd.reply_page;
2076 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
2077 IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags);
2082 switch (pkt->u.rem_sta.status) {
2083 case REM_STA_SUCCESS_MSK:
2085 spin_lock_irqsave(&il->sta_lock, flags_spin);
2086 il_sta_ucode_deactivate(il, sta_id);
2087 spin_unlock_irqrestore(&il->sta_lock,
2090 D_ASSOC("C_REM_STA PASSED\n");
2094 IL_ERR("C_REM_STA failed\n");
2098 il_free_pages(il, cmd.reply_page);
2104 * il_remove_station - Remove driver's knowledge of station.
2107 il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr)
2109 unsigned long flags;
2111 if (!il_is_ready(il)) {
2112 D_INFO("Unable to remove station %pM, device not ready.\n",
2115 * It is typical for stations to be removed when we are
2116 * going down. Return success since device will be down
2122 D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr);
2124 if (WARN_ON(sta_id == IL_INVALID_STATION))
2127 spin_lock_irqsave(&il->sta_lock, flags);
2129 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2130 D_INFO("Removing %pM but non DRIVER active\n", addr);
2134 if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2135 D_INFO("Removing %pM but non UCODE active\n", addr);
2139 if (il->stations[sta_id].used & IL_STA_LOCAL) {
2140 kfree(il->stations[sta_id].lq);
2141 il->stations[sta_id].lq = NULL;
2144 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2148 BUG_ON(il->num_stations < 0);
2150 spin_unlock_irqrestore(&il->sta_lock, flags);
2152 return il_send_remove_station(il, addr, sta_id, false);
2154 spin_unlock_irqrestore(&il->sta_lock, flags);
2157 EXPORT_SYMBOL_GPL(il_remove_station);
2160 * il_clear_ucode_stations - clear ucode station table bits
2162 * This function clears all the bits in the driver indicating
2163 * which stations are active in the ucode. Call when something
2164 * other than explicit station management would cause this in
2165 * the ucode, e.g. unassociated RXON.
2168 il_clear_ucode_stations(struct il_priv *il)
2171 unsigned long flags_spin;
2172 bool cleared = false;
2174 D_INFO("Clearing ucode stations in driver\n");
2176 spin_lock_irqsave(&il->sta_lock, flags_spin);
2177 for (i = 0; i < il->hw_params.max_stations; i++) {
2178 if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
2179 D_INFO("Clearing ucode active for station %d\n", i);
2180 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2184 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2187 D_INFO("No active stations found to be cleared\n");
2189 EXPORT_SYMBOL(il_clear_ucode_stations);
2192 * il_restore_stations() - Restore driver known stations to device
2194 * All stations considered active by driver, but not present in ucode, is
2200 il_restore_stations(struct il_priv *il)
2202 struct il_addsta_cmd sta_cmd;
2203 struct il_link_quality_cmd lq;
2204 unsigned long flags_spin;
2210 if (!il_is_ready(il)) {
2211 D_INFO("Not ready yet, not restoring any stations.\n");
2215 D_ASSOC("Restoring all known stations ... start.\n");
2216 spin_lock_irqsave(&il->sta_lock, flags_spin);
2217 for (i = 0; i < il->hw_params.max_stations; i++) {
2218 if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
2219 !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
2220 D_ASSOC("Restoring sta %pM\n",
2221 il->stations[i].sta.sta.addr);
2222 il->stations[i].sta.mode = 0;
2223 il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
2228 for (i = 0; i < il->hw_params.max_stations; i++) {
2229 if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
2230 memcpy(&sta_cmd, &il->stations[i].sta,
2231 sizeof(struct il_addsta_cmd));
2233 if (il->stations[i].lq) {
2234 memcpy(&lq, il->stations[i].lq,
2235 sizeof(struct il_link_quality_cmd));
2238 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2239 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2241 spin_lock_irqsave(&il->sta_lock, flags_spin);
2242 IL_ERR("Adding station %pM failed.\n",
2243 il->stations[i].sta.sta.addr);
2244 il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE;
2245 il->stations[i].used &=
2246 ~IL_STA_UCODE_INPROGRESS;
2247 spin_unlock_irqrestore(&il->sta_lock,
2251 * Rate scaling has already been initialized, send
2252 * current LQ command
2255 il_send_lq_cmd(il, &lq, CMD_SYNC, true);
2256 spin_lock_irqsave(&il->sta_lock, flags_spin);
2257 il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
2261 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2263 D_INFO("Restoring all known stations"
2264 " .... no stations to be restored.\n");
2266 D_INFO("Restoring all known stations" " .... complete.\n");
2268 EXPORT_SYMBOL(il_restore_stations);
2271 il_get_free_ucode_key_idx(struct il_priv *il)
2275 for (i = 0; i < il->sta_key_max_num; i++)
2276 if (!test_and_set_bit(i, &il->ucode_key_table))
2279 return WEP_INVALID_OFFSET;
2281 EXPORT_SYMBOL(il_get_free_ucode_key_idx);
2284 il_dealloc_bcast_stations(struct il_priv *il)
2286 unsigned long flags;
2289 spin_lock_irqsave(&il->sta_lock, flags);
2290 for (i = 0; i < il->hw_params.max_stations; i++) {
2291 if (!(il->stations[i].used & IL_STA_BCAST))
2294 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2296 BUG_ON(il->num_stations < 0);
2297 kfree(il->stations[i].lq);
2298 il->stations[i].lq = NULL;
2300 spin_unlock_irqrestore(&il->sta_lock, flags);
2302 EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
2304 #ifdef CONFIG_IWLEGACY_DEBUG
2306 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2309 D_RATE("lq station id 0x%x\n", lq->sta_id);
2310 D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk,
2311 lq->general_params.dual_stream_ant_msk);
2313 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
2314 D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags);
2318 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2324 * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
2326 * It sometimes happens when a HT rate has been in use and we
2327 * loose connectivity with AP then mac80211 will first tell us that the
2328 * current channel is not HT anymore before removing the station. In such a
2329 * scenario the RXON flags will be updated to indicate we are not
2330 * communicating HT anymore, but the LQ command may still contain HT rates.
2331 * Test for this to prevent driver from sending LQ command between the time
2332 * RXON flags are updated and when LQ command is updated.
2335 il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq)
2342 D_INFO("Channel %u is not an HT channel\n", il->active.channel);
2343 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
2344 if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) {
2345 D_INFO("idx %d of LQ expects HT channel\n", i);
2353 * il_send_lq_cmd() - Send link quality command
2354 * @init: This command is sent as part of station initialization right
2355 * after station has been added.
2357 * The link quality command is sent as the last step of station creation.
2358 * This is the special case in which init is set and we call a callback in
2359 * this case to clear the state indicating that station creation is in
2363 il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
2364 u8 flags, bool init)
2367 unsigned long flags_spin;
2369 struct il_host_cmd cmd = {
2370 .id = C_TX_LINK_QUALITY_CMD,
2371 .len = sizeof(struct il_link_quality_cmd),
2376 if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
2379 spin_lock_irqsave(&il->sta_lock, flags_spin);
2380 if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2381 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2384 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2386 il_dump_lq_cmd(il, lq);
2387 BUG_ON(init && (cmd.flags & CMD_ASYNC));
2389 if (il_is_lq_table_valid(il, lq))
2390 ret = il_send_cmd(il, &cmd);
2394 if (cmd.flags & CMD_ASYNC)
2398 D_INFO("init LQ command complete,"
2399 " clearing sta addition status for sta %d\n",
2401 spin_lock_irqsave(&il->sta_lock, flags_spin);
2402 il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2403 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2407 EXPORT_SYMBOL(il_send_lq_cmd);
2410 il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2411 struct ieee80211_sta *sta)
2413 struct il_priv *il = hw->priv;
2414 struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
2417 mutex_lock(&il->mutex);
2418 D_MAC80211("enter station %pM\n", sta->addr);
2420 ret = il_remove_station(il, sta_common->sta_id, sta->addr);
2422 IL_ERR("Error removing station %pM\n", sta->addr);
2424 D_MAC80211("leave ret %d\n", ret);
2425 mutex_unlock(&il->mutex);
2429 EXPORT_SYMBOL(il_mac_sta_remove);
2431 /************************** RX-FUNCTIONS ****************************/
2433 * Rx theory of operation
2435 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
2436 * each of which point to Receive Buffers to be filled by the NIC. These get
2437 * used not only for Rx frames, but for any command response or notification
2438 * from the NIC. The driver and NIC manage the Rx buffers by means
2439 * of idxes into the circular buffer.
2442 * The host/firmware share two idx registers for managing the Rx buffers.
2444 * The READ idx maps to the first position that the firmware may be writing
2445 * to -- the driver can read up to (but not including) this position and get
2447 * The READ idx is managed by the firmware once the card is enabled.
2449 * The WRITE idx maps to the last position the driver has read from -- the
2450 * position preceding WRITE is the last slot the firmware can place a packet.
2452 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
2455 * During initialization, the host sets up the READ queue position to the first
2456 * IDX position, and WRITE to the last (READ - 1 wrapped)
2458 * When the firmware places a packet in a buffer, it will advance the READ idx
2459 * and fire the RX interrupt. The driver can then query the READ idx and
2460 * process as many packets as possible, moving the WRITE idx forward as it
2461 * resets the Rx queue buffers with new memory.
2463 * The management in the driver is as follows:
2464 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
2465 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
2466 * to replenish the iwl->rxq->rx_free.
2467 * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
2468 * iwl->rxq is replenished and the READ IDX is updated (updating the
2469 * 'processed' and 'read' driver idxes as well)
2470 * + A received packet is processed and handed to the kernel network stack,
2471 * detached from the iwl->rxq. The driver 'processed' idx is updated.
2472 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
2473 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
2474 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
2475 * were enough free buffers and RX_STALLED is set it is cleared.
2480 * il_rx_queue_alloc() Allocates rx_free
2481 * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
2482 * il_rx_queue_restock
2483 * il_rx_queue_restock() Moves available buffers from rx_free into Rx
2484 * queue, updates firmware pointers, and updates
2485 * the WRITE idx. If insufficient rx_free buffers
2486 * are available, schedules il_rx_replenish
2488 * -- enable interrupts --
2489 * ISR - il_rx() Detach il_rx_bufs from pool up to the
2490 * READ IDX, detaching the SKB from the pool.
2491 * Moves the packet buffer from queue to rx_used.
2492 * Calls il_rx_queue_restock to refill any empty
2499 * il_rx_queue_space - Return number of free slots available in queue.
2502 il_rx_queue_space(const struct il_rx_queue *q)
2504 int s = q->read - q->write;
2507 /* keep some buffer to not confuse full and empty queue */
2513 EXPORT_SYMBOL(il_rx_queue_space);
2516 * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
2519 il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q)
2521 unsigned long flags;
2522 u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
2525 spin_lock_irqsave(&q->lock, flags);
2527 if (q->need_update == 0)
2530 /* If power-saving is in use, make sure device is awake */
2531 if (test_bit(S_POWER_PMI, &il->status)) {
2532 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2534 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2535 D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n",
2537 il_set_bit(il, CSR_GP_CNTRL,
2538 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2542 q->write_actual = (q->write & ~0x7);
2543 il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2545 /* Else device is assumed to be awake */
2547 /* Device expects a multiple of 8 */
2548 q->write_actual = (q->write & ~0x7);
2549 il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2555 spin_unlock_irqrestore(&q->lock, flags);
2557 EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
2560 il_rx_queue_alloc(struct il_priv *il)
2562 struct il_rx_queue *rxq = &il->rxq;
2563 struct device *dev = &il->pci_dev->dev;
2566 spin_lock_init(&rxq->lock);
2567 INIT_LIST_HEAD(&rxq->rx_free);
2568 INIT_LIST_HEAD(&rxq->rx_used);
2570 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
2572 dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
2578 dma_alloc_coherent(dev, sizeof(struct il_rb_status),
2579 &rxq->rb_stts_dma, GFP_KERNEL);
2583 /* Fill the rx_used queue with _all_ of the Rx buffers */
2584 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
2585 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
2587 /* Set us so that we have processed and used all buffers, but have
2588 * not restocked the Rx queue with fresh buffers */
2589 rxq->read = rxq->write = 0;
2590 rxq->write_actual = 0;
2591 rxq->free_count = 0;
2592 rxq->need_update = 0;
2596 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
2601 EXPORT_SYMBOL(il_rx_queue_alloc);
2604 il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb)
2606 struct il_rx_pkt *pkt = rxb_addr(rxb);
2607 struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
2609 if (!report->state) {
2610 D_11H("Spectrum Measure Notification: Start\n");
2614 memcpy(&il->measure_report, report, sizeof(*report));
2615 il->measurement_status |= MEASUREMENT_READY;
2617 EXPORT_SYMBOL(il_hdl_spectrum_measurement);
2620 * returns non-zero if packet should be dropped
2623 il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
2624 u32 decrypt_res, struct ieee80211_rx_status *stats)
2626 u16 fc = le16_to_cpu(hdr->frame_control);
2629 * All contexts have the same setting here due to it being
2630 * a module parameter, so OK to check any context.
2632 if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2635 if (!(fc & IEEE80211_FCTL_PROTECTED))
2638 D_RX("decrypt_res:0x%x\n", decrypt_res);
2639 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2640 case RX_RES_STATUS_SEC_TYPE_TKIP:
2641 /* The uCode has got a bad phase 1 Key, pushes the packet.
2642 * Decryption will be done in SW. */
2643 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2644 RX_RES_STATUS_BAD_KEY_TTAK)
2647 case RX_RES_STATUS_SEC_TYPE_WEP:
2648 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2649 RX_RES_STATUS_BAD_ICV_MIC) {
2650 /* bad ICV, the packet is destroyed since the
2651 * decryption is inplace, drop it */
2652 D_RX("Packet destroyed\n");
2655 case RX_RES_STATUS_SEC_TYPE_CCMP:
2656 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2657 RX_RES_STATUS_DECRYPT_OK) {
2658 D_RX("hw decrypt successfully!!!\n");
2659 stats->flag |= RX_FLAG_DECRYPTED;
2668 EXPORT_SYMBOL(il_set_decrypted_flag);
2671 * il_txq_update_write_ptr - Send new write idx to hardware
2674 il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
2677 int txq_id = txq->q.id;
2679 if (txq->need_update == 0)
2682 /* if we're trying to save power */
2683 if (test_bit(S_POWER_PMI, &il->status)) {
2684 /* wake up nic if it's powered down ...
2685 * uCode will wake up, and interrupt us again, so next
2686 * time we'll skip this part. */
2687 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2689 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2690 D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n",
2692 il_set_bit(il, CSR_GP_CNTRL,
2693 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2697 il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2700 * else not in power-save mode,
2701 * uCode will never sleep when we're
2702 * trying to tx (during RFKILL, we're not trying to tx).
2705 _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2706 txq->need_update = 0;
2708 EXPORT_SYMBOL(il_txq_update_write_ptr);
2711 * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
2714 il_tx_queue_unmap(struct il_priv *il, int txq_id)
2716 struct il_tx_queue *txq = &il->txq[txq_id];
2717 struct il_queue *q = &txq->q;
2722 while (q->write_ptr != q->read_ptr) {
2723 il->ops->txq_free_tfd(il, txq);
2724 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2727 EXPORT_SYMBOL(il_tx_queue_unmap);
2730 * il_tx_queue_free - Deallocate DMA queue.
2731 * @txq: Transmit queue to deallocate.
2733 * Empty queue by removing and destroying all BD's.
2735 * 0-fill, but do not free "txq" descriptor structure.
2738 il_tx_queue_free(struct il_priv *il, int txq_id)
2740 struct il_tx_queue *txq = &il->txq[txq_id];
2741 struct device *dev = &il->pci_dev->dev;
2744 il_tx_queue_unmap(il, txq_id);
2746 /* De-alloc array of command/tx buffers */
2747 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
2750 /* De-alloc circular buffer of TFDs */
2752 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2753 txq->tfds, txq->q.dma_addr);
2755 /* De-alloc array of per-TFD driver data */
2759 /* deallocate arrays */
2765 /* 0-fill queue descriptor structure */
2766 memset(txq, 0, sizeof(*txq));
2768 EXPORT_SYMBOL(il_tx_queue_free);
2771 * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
2774 il_cmd_queue_unmap(struct il_priv *il)
2776 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2777 struct il_queue *q = &txq->q;
2783 while (q->read_ptr != q->write_ptr) {
2784 i = il_get_cmd_idx(q, q->read_ptr, 0);
2786 if (txq->meta[i].flags & CMD_MAPPED) {
2787 pci_unmap_single(il->pci_dev,
2788 dma_unmap_addr(&txq->meta[i], mapping),
2789 dma_unmap_len(&txq->meta[i], len),
2790 PCI_DMA_BIDIRECTIONAL);
2791 txq->meta[i].flags = 0;
2794 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2798 if (txq->meta[i].flags & CMD_MAPPED) {
2799 pci_unmap_single(il->pci_dev,
2800 dma_unmap_addr(&txq->meta[i], mapping),
2801 dma_unmap_len(&txq->meta[i], len),
2802 PCI_DMA_BIDIRECTIONAL);
2803 txq->meta[i].flags = 0;
2806 EXPORT_SYMBOL(il_cmd_queue_unmap);
2809 * il_cmd_queue_free - Deallocate DMA queue.
2810 * @txq: Transmit queue to deallocate.
2812 * Empty queue by removing and destroying all BD's.
2814 * 0-fill, but do not free "txq" descriptor structure.
2817 il_cmd_queue_free(struct il_priv *il)
2819 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2820 struct device *dev = &il->pci_dev->dev;
2823 il_cmd_queue_unmap(il);
2825 /* De-alloc array of command/tx buffers */
2826 for (i = 0; i <= TFD_CMD_SLOTS; i++)
2829 /* De-alloc circular buffer of TFDs */
2831 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2832 txq->tfds, txq->q.dma_addr);
2834 /* deallocate arrays */
2840 /* 0-fill queue descriptor structure */
2841 memset(txq, 0, sizeof(*txq));
2843 EXPORT_SYMBOL(il_cmd_queue_free);
2845 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
2848 * Theory of operation
2850 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
2851 * of buffer descriptors, each of which points to one or more data buffers for
2852 * the device to read from or fill. Driver and device exchange status of each
2853 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
2854 * entries in each circular buffer, to protect against confusing empty and full
2857 * The device reads or writes the data in the queues via the device's several
2858 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
2860 * For Tx queue, there are low mark and high mark limits. If, after queuing
2861 * the packet for Tx, free space become < low mark, Tx queue stopped. When
2862 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
2865 * See more detailed info in 4965.h.
2866 ***************************************************/
2869 il_queue_space(const struct il_queue *q)
2871 int s = q->read_ptr - q->write_ptr;
2873 if (q->read_ptr > q->write_ptr)
2878 /* keep some reserve to not confuse empty and full situations */
2884 EXPORT_SYMBOL(il_queue_space);
2888 * il_queue_init - Initialize queue's high/low-water and read/write idxes
2891 il_queue_init(struct il_priv *il, struct il_queue *q, int slots, u32 id)
2894 * TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
2895 * il_queue_inc_wrap and il_queue_dec_wrap are broken.
2897 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
2898 /* FIXME: remove q->n_bd */
2899 q->n_bd = TFD_QUEUE_SIZE_MAX;
2904 /* slots_must be power-of-two size, otherwise
2905 * il_get_cmd_idx is broken. */
2906 BUG_ON(!is_power_of_2(slots));
2908 q->low_mark = q->n_win / 4;
2909 if (q->low_mark < 4)
2912 q->high_mark = q->n_win / 8;
2913 if (q->high_mark < 2)
2916 q->write_ptr = q->read_ptr = 0;
2922 * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
2925 il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id)
2927 struct device *dev = &il->pci_dev->dev;
2928 size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
2930 /* Driver ilate data, only for Tx (not command) queues,
2931 * not shared with device. */
2932 if (id != il->cmd_queue) {
2933 txq->skbs = kcalloc(TFD_QUEUE_SIZE_MAX, sizeof(struct skb *),
2936 IL_ERR("Fail to alloc skbs\n");
2942 /* Circular buffer of transmit frame descriptors (TFDs),
2943 * shared with device */
2945 dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL);
2947 IL_ERR("Fail to alloc TFDs\n");
2962 * il_tx_queue_init - Allocate and initialize one tx/cmd queue
2965 il_tx_queue_init(struct il_priv *il, u32 txq_id)
2968 int slots, actual_slots;
2969 struct il_tx_queue *txq = &il->txq[txq_id];
2972 * Alloc buffer array for commands (Tx or other types of commands).
2973 * For the command queue (#4/#9), allocate command space + one big
2974 * command for scan, since scan command is very huge; the system will
2975 * not have two scans at the same time, so only one is needed.
2976 * For normal Tx queues (all other queues), no super-size command
2979 if (txq_id == il->cmd_queue) {
2980 slots = TFD_CMD_SLOTS;
2981 actual_slots = slots + 1;
2983 slots = TFD_TX_CMD_SLOTS;
2984 actual_slots = slots;
2988 kzalloc(sizeof(struct il_cmd_meta) * actual_slots, GFP_KERNEL);
2990 kzalloc(sizeof(struct il_device_cmd *) * actual_slots, GFP_KERNEL);
2992 if (!txq->meta || !txq->cmd)
2993 goto out_free_arrays;
2995 len = sizeof(struct il_device_cmd);
2996 for (i = 0; i < actual_slots; i++) {
2997 /* only happens for cmd queue */
2999 len = IL_MAX_CMD_SIZE;
3001 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
3006 /* Alloc driver data array and TFD circular buffer */
3007 ret = il_tx_queue_alloc(il, txq, txq_id);
3011 txq->need_update = 0;
3014 * For the default queues 0-3, set up the swq_id
3015 * already -- all others need to get one later
3016 * (if they need one at all).
3019 il_set_swq_id(txq, txq_id, txq_id);
3021 /* Initialize queue's high/low-water marks, and head/tail idxes */
3022 il_queue_init(il, &txq->q, slots, txq_id);
3024 /* Tell device where to find queue */
3025 il->ops->txq_init(il, txq);
3029 for (i = 0; i < actual_slots; i++)
3037 EXPORT_SYMBOL(il_tx_queue_init);
3040 il_tx_queue_reset(struct il_priv *il, u32 txq_id)
3042 int slots, actual_slots;
3043 struct il_tx_queue *txq = &il->txq[txq_id];
3045 if (txq_id == il->cmd_queue) {
3046 slots = TFD_CMD_SLOTS;
3047 actual_slots = TFD_CMD_SLOTS + 1;
3049 slots = TFD_TX_CMD_SLOTS;
3050 actual_slots = TFD_TX_CMD_SLOTS;
3053 memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
3054 txq->need_update = 0;
3056 /* Initialize queue's high/low-water marks, and head/tail idxes */
3057 il_queue_init(il, &txq->q, slots, txq_id);
3059 /* Tell device where to find queue */
3060 il->ops->txq_init(il, txq);
3062 EXPORT_SYMBOL(il_tx_queue_reset);
3064 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
3067 * il_enqueue_hcmd - enqueue a uCode command
3068 * @il: device ilate data point
3069 * @cmd: a point to the ucode command structure
3071 * The function returns < 0 values to indicate the operation is
3072 * failed. On success, it turns the idx (> 0) of command in the
3076 il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
3078 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3079 struct il_queue *q = &txq->q;
3080 struct il_device_cmd *out_cmd;
3081 struct il_cmd_meta *out_meta;
3082 dma_addr_t phys_addr;
3083 unsigned long flags;
3088 cmd->len = il->ops->get_hcmd_size(cmd->id, cmd->len);
3089 fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr));
3091 /* If any of the command structures end up being larger than
3092 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
3093 * we will need to increase the size of the TFD entries
3094 * Also, check to see if command buffer should not exceed the size
3095 * of device_cmd and max_cmd_size. */
3096 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
3097 !(cmd->flags & CMD_SIZE_HUGE));
3098 BUG_ON(fix_size > IL_MAX_CMD_SIZE);
3100 if (il_is_rfkill(il) || il_is_ctkill(il)) {
3101 IL_WARN("Not sending command - %s KILL\n",
3102 il_is_rfkill(il) ? "RF" : "CT");
3106 spin_lock_irqsave(&il->hcmd_lock, flags);
3108 if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
3109 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3111 IL_ERR("Restarting adapter due to command queue full\n");
3112 queue_work(il->workqueue, &il->restart);
3116 idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
3117 out_cmd = txq->cmd[idx];
3118 out_meta = &txq->meta[idx];
3120 if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
3121 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3125 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
3126 out_meta->flags = cmd->flags | CMD_MAPPED;
3127 if (cmd->flags & CMD_WANT_SKB)
3128 out_meta->source = cmd;
3129 if (cmd->flags & CMD_ASYNC)
3130 out_meta->callback = cmd->callback;
3132 out_cmd->hdr.cmd = cmd->id;
3133 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
3135 /* At this point, the out_cmd now has all of the incoming cmd
3138 out_cmd->hdr.flags = 0;
3139 out_cmd->hdr.sequence =
3140 cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr));
3141 if (cmd->flags & CMD_SIZE_HUGE)
3142 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
3143 len = sizeof(struct il_device_cmd);
3144 if (idx == TFD_CMD_SLOTS)
3145 len = IL_MAX_CMD_SIZE;
3147 #ifdef CONFIG_IWLEGACY_DEBUG
3148 switch (out_cmd->hdr.cmd) {
3149 case C_TX_LINK_QUALITY_CMD:
3151 D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, "
3152 "%d bytes at %d[%d]:%d\n",
3153 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3154 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
3155 q->write_ptr, idx, il->cmd_queue);
3158 D_HC("Sending command %s (#%x), seq: 0x%04X, "
3159 "%d bytes at %d[%d]:%d\n",
3160 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3161 le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr,
3162 idx, il->cmd_queue);
3165 txq->need_update = 1;
3167 if (il->ops->txq_update_byte_cnt_tbl)
3168 /* Set up entry in queue's byte count circular buffer */
3169 il->ops->txq_update_byte_cnt_tbl(il, txq, 0);
3172 pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size,
3173 PCI_DMA_BIDIRECTIONAL);
3174 dma_unmap_addr_set(out_meta, mapping, phys_addr);
3175 dma_unmap_len_set(out_meta, len, fix_size);
3177 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, 1,
3180 /* Increment and update queue's write idx */
3181 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
3182 il_txq_update_write_ptr(il, txq);
3184 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3189 * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
3191 * When FW advances 'R' idx, all entries between old and new 'R' idx
3192 * need to be reclaimed. As result, some free space forms. If there is
3193 * enough free space (> low mark), wake the stack that feeds us.
3196 il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx)
3198 struct il_tx_queue *txq = &il->txq[txq_id];
3199 struct il_queue *q = &txq->q;
3202 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
3203 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
3204 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
3205 q->write_ptr, q->read_ptr);
3209 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
3210 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3213 IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
3214 q->write_ptr, q->read_ptr);
3215 queue_work(il->workqueue, &il->restart);
3222 * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3223 * @rxb: Rx buffer to reclaim
3225 * If an Rx buffer has an async callback associated with it the callback
3226 * will be executed. The attached skb (if present) will only be freed
3227 * if the callback returns 1
3230 il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
3232 struct il_rx_pkt *pkt = rxb_addr(rxb);
3233 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3234 int txq_id = SEQ_TO_QUEUE(sequence);
3235 int idx = SEQ_TO_IDX(sequence);
3237 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3238 struct il_device_cmd *cmd;
3239 struct il_cmd_meta *meta;
3240 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3241 unsigned long flags;
3243 /* If a Tx command is being handled and it isn't in the actual
3244 * command queue then there a command routing bug has been introduced
3245 * in the queue management code. */
3247 (txq_id != il->cmd_queue,
3248 "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
3249 txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr,
3250 il->txq[il->cmd_queue].q.write_ptr)) {
3251 il_print_hex_error(il, pkt, 32);
3255 cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
3256 cmd = txq->cmd[cmd_idx];
3257 meta = &txq->meta[cmd_idx];
3259 txq->time_stamp = jiffies;
3261 pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping),
3262 dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL);
3264 /* Input error checking is done when commands are added to queue. */
3265 if (meta->flags & CMD_WANT_SKB) {
3266 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
3268 } else if (meta->callback)
3269 meta->callback(il, cmd, pkt);
3271 spin_lock_irqsave(&il->hcmd_lock, flags);
3273 il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
3275 if (!(meta->flags & CMD_ASYNC)) {
3276 clear_bit(S_HCMD_ACTIVE, &il->status);
3277 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
3278 il_get_cmd_string(cmd->hdr.cmd));
3279 wake_up(&il->wait_command_queue);
3282 /* Mark as unmapped */
3285 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3287 EXPORT_SYMBOL(il_tx_cmd_complete);
3289 MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
3290 MODULE_VERSION(IWLWIFI_VERSION);
3291 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
3292 MODULE_LICENSE("GPL");
3295 * set bt_coex_active to true, uCode will do kill/defer
3296 * every time the priority line is asserted (BT is sending signals on the
3297 * priority line in the PCIx).
3298 * set bt_coex_active to false, uCode will ignore the BT activity and
3299 * perform the normal operation
3301 * User might experience transmit issue on some platform due to WiFi/BT
3302 * co-exist problem. The possible behaviors are:
3303 * Able to scan and finding all the available AP
3304 * Not able to associate with any AP
3305 * On those platforms, WiFi communication can be restored by set
3306 * "bt_coex_active" module parameter to "false"
3308 * default: bt_coex_active = true (BT_COEX_ENABLE)
3310 static bool bt_coex_active = true;
3311 module_param(bt_coex_active, bool, S_IRUGO);
3312 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
3315 EXPORT_SYMBOL(il_debug_level);
3317 const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3318 EXPORT_SYMBOL(il_bcast_addr);
3320 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
3321 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
3323 il_init_ht_hw_capab(const struct il_priv *il,
3324 struct ieee80211_sta_ht_cap *ht_info,
3325 enum ieee80211_band band)
3327 u16 max_bit_rate = 0;
3328 u8 rx_chains_num = il->hw_params.rx_chains_num;
3329 u8 tx_chains_num = il->hw_params.tx_chains_num;
3332 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
3334 ht_info->ht_supported = true;
3336 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
3337 max_bit_rate = MAX_BIT_RATE_20_MHZ;
3338 if (il->hw_params.ht40_channel & BIT(band)) {
3339 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
3340 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
3341 ht_info->mcs.rx_mask[4] = 0x01;
3342 max_bit_rate = MAX_BIT_RATE_40_MHZ;
3345 if (il->cfg->mod_params->amsdu_size_8K)
3346 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
3348 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3349 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3351 ht_info->mcs.rx_mask[0] = 0xFF;
3352 if (rx_chains_num >= 2)
3353 ht_info->mcs.rx_mask[1] = 0xFF;
3354 if (rx_chains_num >= 3)
3355 ht_info->mcs.rx_mask[2] = 0xFF;
3357 /* Highest supported Rx data rate */
3358 max_bit_rate *= rx_chains_num;
3359 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
3360 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
3362 /* Tx MCS capabilities */
3363 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3364 if (tx_chains_num != rx_chains_num) {
3365 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
3366 ht_info->mcs.tx_params |=
3368 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
3373 * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
3376 il_init_geos(struct il_priv *il)
3378 struct il_channel_info *ch;
3379 struct ieee80211_supported_band *sband;
3380 struct ieee80211_channel *channels;
3381 struct ieee80211_channel *geo_ch;
3382 struct ieee80211_rate *rates;
3384 s8 max_tx_power = 0;
3386 if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
3387 il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
3388 D_INFO("Geography modes already initialized.\n");
3389 set_bit(S_GEO_CONFIGURED, &il->status);
3394 kzalloc(sizeof(struct ieee80211_channel) * il->channel_count,
3400 kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
3407 /* 5.2GHz channels start after the 2.4GHz channels */
3408 sband = &il->bands[IEEE80211_BAND_5GHZ];
3409 sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
3411 sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
3412 sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
3414 if (il->cfg->sku & IL_SKU_N)
3415 il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_5GHZ);
3417 sband = &il->bands[IEEE80211_BAND_2GHZ];
3418 sband->channels = channels;
3420 sband->bitrates = rates;
3421 sband->n_bitrates = RATE_COUNT_LEGACY;
3423 if (il->cfg->sku & IL_SKU_N)
3424 il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_2GHZ);
3426 il->ieee_channels = channels;
3427 il->ieee_rates = rates;
3429 for (i = 0; i < il->channel_count; i++) {
3430 ch = &il->channel_info[i];
3432 if (!il_is_channel_valid(ch))
3435 sband = &il->bands[ch->band];
3437 geo_ch = &sband->channels[sband->n_channels++];
3439 geo_ch->center_freq =
3440 ieee80211_channel_to_frequency(ch->channel, ch->band);
3441 geo_ch->max_power = ch->max_power_avg;
3442 geo_ch->max_antenna_gain = 0xff;
3443 geo_ch->hw_value = ch->channel;
3445 if (il_is_channel_valid(ch)) {
3446 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
3447 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
3449 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
3450 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
3452 if (ch->flags & EEPROM_CHANNEL_RADAR)
3453 geo_ch->flags |= IEEE80211_CHAN_RADAR;
3455 geo_ch->flags |= ch->ht40_extension_channel;
3457 if (ch->max_power_avg > max_tx_power)
3458 max_tx_power = ch->max_power_avg;
3460 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
3463 D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel,
3464 geo_ch->center_freq,
3465 il_is_channel_a_band(ch) ? "5.2" : "2.4",
3467 flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid",
3471 il->tx_power_device_lmt = max_tx_power;
3472 il->tx_power_user_lmt = max_tx_power;
3473 il->tx_power_next = max_tx_power;
3475 if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
3476 (il->cfg->sku & IL_SKU_A)) {
3477 IL_INFO("Incorrectly detected BG card as ABG. "
3478 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
3479 il->pci_dev->device, il->pci_dev->subsystem_device);
3480 il->cfg->sku &= ~IL_SKU_A;
3483 IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
3484 il->bands[IEEE80211_BAND_2GHZ].n_channels,
3485 il->bands[IEEE80211_BAND_5GHZ].n_channels);
3487 set_bit(S_GEO_CONFIGURED, &il->status);
3491 EXPORT_SYMBOL(il_init_geos);
3494 * il_free_geos - undo allocations in il_init_geos
3497 il_free_geos(struct il_priv *il)
3499 kfree(il->ieee_channels);
3500 kfree(il->ieee_rates);
3501 clear_bit(S_GEO_CONFIGURED, &il->status);
3503 EXPORT_SYMBOL(il_free_geos);
3506 il_is_channel_extension(struct il_priv *il, enum ieee80211_band band,
3507 u16 channel, u8 extension_chan_offset)
3509 const struct il_channel_info *ch_info;
3511 ch_info = il_get_channel_info(il, band, channel);
3512 if (!il_is_channel_valid(ch_info))
3515 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
3517 ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS);
3518 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
3520 ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS);
3526 il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap)
3528 if (!il->ht.enabled || !il->ht.is_40mhz)
3532 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
3533 * the bit will not set if it is pure 40MHz case
3535 if (ht_cap && !ht_cap->ht_supported)
3538 #ifdef CONFIG_IWLEGACY_DEBUGFS
3539 if (il->disable_ht40)
3543 return il_is_channel_extension(il, il->band,
3544 le16_to_cpu(il->staging.channel),
3545 il->ht.extension_chan_offset);
3547 EXPORT_SYMBOL(il_is_ht40_tx_allowed);
3550 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
3556 * If mac80211 hasn't given us a beacon interval, program
3557 * the default into the device.
3560 return DEFAULT_BEACON_INTERVAL;
3563 * If the beacon interval we obtained from the peer
3564 * is too large, we'll have to wake up more often
3565 * (and in IBSS case, we'll beacon too much)
3567 * For example, if max_beacon_val is 4096, and the
3568 * requested beacon interval is 7000, we'll have to
3569 * use 3500 to be able to wake up on the beacons.
3571 * This could badly influence beacon detection stats.
3574 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
3575 new_val = beacon_val / beacon_factor;
3578 new_val = max_beacon_val;
3584 il_send_rxon_timing(struct il_priv *il)
3587 s32 interval_tm, rem;
3588 struct ieee80211_conf *conf = NULL;
3590 struct ieee80211_vif *vif = il->vif;
3592 conf = &il->hw->conf;
3594 lockdep_assert_held(&il->mutex);
3596 memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd));
3598 il->timing.timestamp = cpu_to_le64(il->timestamp);
3599 il->timing.listen_interval = cpu_to_le16(conf->listen_interval);
3601 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
3604 * TODO: For IBSS we need to get atim_win from mac80211,
3605 * for now just always use 0
3607 il->timing.atim_win = 0;
3610 il_adjust_beacon_interval(beacon_int,
3611 il->hw_params.max_beacon_itrvl *
3613 il->timing.beacon_interval = cpu_to_le16(beacon_int);
3615 tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
3616 interval_tm = beacon_int * TIME_UNIT;
3617 rem = do_div(tsf, interval_tm);
3618 il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
3620 il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1;
3622 D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
3623 le16_to_cpu(il->timing.beacon_interval),
3624 le32_to_cpu(il->timing.beacon_init_val),
3625 le16_to_cpu(il->timing.atim_win));
3627 return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing),
3630 EXPORT_SYMBOL(il_send_rxon_timing);
3633 il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt)
3635 struct il_rxon_cmd *rxon = &il->staging;
3638 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
3640 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
3643 EXPORT_SYMBOL(il_set_rxon_hwcrypto);
3645 /* validate RXON structure is valid */
3647 il_check_rxon_cmd(struct il_priv *il)
3649 struct il_rxon_cmd *rxon = &il->staging;
3652 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
3653 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
3654 IL_WARN("check 2.4G: wrong narrow\n");
3657 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
3658 IL_WARN("check 2.4G: wrong radar\n");
3662 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
3663 IL_WARN("check 5.2G: not short slot!\n");
3666 if (rxon->flags & RXON_FLG_CCK_MSK) {
3667 IL_WARN("check 5.2G: CCK!\n");
3671 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
3672 IL_WARN("mac/bssid mcast!\n");
3676 /* make sure basic rates 6Mbps and 1Mbps are supported */
3677 if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
3678 (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
3679 IL_WARN("neither 1 nor 6 are basic\n");
3683 if (le16_to_cpu(rxon->assoc_id) > 2007) {
3684 IL_WARN("aid > 2007\n");
3688 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) ==
3689 (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
3690 IL_WARN("CCK and short slot\n");
3694 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) ==
3695 (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
3696 IL_WARN("CCK and auto detect");
3701 flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) ==
3702 RXON_FLG_TGG_PROTECT_MSK) {
3703 IL_WARN("TGg but no auto-detect\n");
3708 IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel));
3711 IL_ERR("Invalid RXON\n");
3716 EXPORT_SYMBOL(il_check_rxon_cmd);
3719 * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
3720 * @il: staging_rxon is compared to active_rxon
3722 * If the RXON structure is changing enough to require a new tune,
3723 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
3724 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
3727 il_full_rxon_required(struct il_priv *il)
3729 const struct il_rxon_cmd *staging = &il->staging;
3730 const struct il_rxon_cmd *active = &il->active;
3734 D_INFO("need full RXON - " #cond "\n"); \
3738 #define CHK_NEQ(c1, c2) \
3739 if ((c1) != (c2)) { \
3740 D_INFO("need full RXON - " \
3741 #c1 " != " #c2 " - %d != %d\n", \
3746 /* These items are only settable from the full RXON command */
3747 CHK(!il_is_associated(il));
3748 CHK(!ether_addr_equal(staging->bssid_addr, active->bssid_addr));
3749 CHK(!ether_addr_equal(staging->node_addr, active->node_addr));
3750 CHK(!ether_addr_equal(staging->wlap_bssid_addr,
3751 active->wlap_bssid_addr));
3752 CHK_NEQ(staging->dev_type, active->dev_type);
3753 CHK_NEQ(staging->channel, active->channel);
3754 CHK_NEQ(staging->air_propagation, active->air_propagation);
3755 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
3756 active->ofdm_ht_single_stream_basic_rates);
3757 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
3758 active->ofdm_ht_dual_stream_basic_rates);
3759 CHK_NEQ(staging->assoc_id, active->assoc_id);
3761 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
3762 * be updated with the RXON_ASSOC command -- however only some
3763 * flag transitions are allowed using RXON_ASSOC */
3765 /* Check if we are not switching bands */
3766 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
3767 active->flags & RXON_FLG_BAND_24G_MSK);
3769 /* Check if we are switching association toggle */
3770 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,