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1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/ieee80211_radiotap.h>
49 #include <net/mac80211.h>
50
51 #include <asm/div64.h>
52
53 #define DRV_NAME        "iwl3945"
54
55 #include "iwl-fh.h"
56 #include "iwl-3945-fh.h"
57 #include "iwl-commands.h"
58 #include "iwl-sta.h"
59 #include "iwl-3945.h"
60 #include "iwl-core.h"
61 #include "iwl-helpers.h"
62 #include "iwl-dev.h"
63 #include "iwl-spectrum.h"
64
65 /*
66  * module name, copyright, version, etc.
67  */
68
69 #define DRV_DESCRIPTION \
70 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
71
72 #ifdef CONFIG_IWLWIFI_DEBUG
73 #define VD "d"
74 #else
75 #define VD
76 #endif
77
78 /*
79  * add "s" to indicate spectrum measurement included.
80  * we add it here to be consistent with previous releases in which
81  * this was configurable.
82  */
83 #define DRV_VERSION  IWLWIFI_VERSION VD "s"
84 #define DRV_COPYRIGHT   "Copyright(c) 2003-2010 Intel Corporation"
85 #define DRV_AUTHOR     "<ilw@linux.intel.com>"
86
87 MODULE_DESCRIPTION(DRV_DESCRIPTION);
88 MODULE_VERSION(DRV_VERSION);
89 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
90 MODULE_LICENSE("GPL");
91
92  /* module parameters */
93 struct iwl_mod_params iwl3945_mod_params = {
94         .sw_crypto = 1,
95         .restart_fw = 1,
96         /* the rest are 0 by default */
97 };
98
99 /**
100  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
101  * @priv: eeprom and antenna fields are used to determine antenna flags
102  *
103  * priv->eeprom39  is used to determine if antenna AUX/MAIN are reversed
104  * iwl3945_mod_params.antenna specifies the antenna diversity mode:
105  *
106  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
107  * IWL_ANTENNA_MAIN      - Force MAIN antenna
108  * IWL_ANTENNA_AUX       - Force AUX antenna
109  */
110 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
111 {
112         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
113
114         switch (iwl3945_mod_params.antenna) {
115         case IWL_ANTENNA_DIVERSITY:
116                 return 0;
117
118         case IWL_ANTENNA_MAIN:
119                 if (eeprom->antenna_switch_type)
120                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
121                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122
123         case IWL_ANTENNA_AUX:
124                 if (eeprom->antenna_switch_type)
125                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
126                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
127         }
128
129         /* bad antenna selector value */
130         IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
131                 iwl3945_mod_params.antenna);
132
133         return 0;               /* "diversity" is default if error */
134 }
135
136 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
137                                    struct ieee80211_key_conf *keyconf,
138                                    u8 sta_id)
139 {
140         unsigned long flags;
141         __le16 key_flags = 0;
142         int ret;
143
144         key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
145         key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
146
147         if (sta_id == priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id)
148                 key_flags |= STA_KEY_MULTICAST_MSK;
149
150         keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
151         keyconf->hw_key_idx = keyconf->keyidx;
152         key_flags &= ~STA_KEY_FLG_INVALID;
153
154         spin_lock_irqsave(&priv->sta_lock, flags);
155         priv->stations[sta_id].keyinfo.cipher = keyconf->cipher;
156         priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
157         memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
158                keyconf->keylen);
159
160         memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
161                keyconf->keylen);
162
163         if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
164                         == STA_KEY_FLG_NO_ENC)
165                 priv->stations[sta_id].sta.key.key_offset =
166                                  iwl_get_free_ucode_key_index(priv);
167         /* else, we are overriding an existing key => no need to allocated room
168         * in uCode. */
169
170         WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
171                 "no space for a new key");
172
173         priv->stations[sta_id].sta.key.key_flags = key_flags;
174         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
175         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
176
177         IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
178
179         ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
180
181         spin_unlock_irqrestore(&priv->sta_lock, flags);
182
183         return ret;
184 }
185
186 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
187                                   struct ieee80211_key_conf *keyconf,
188                                   u8 sta_id)
189 {
190         return -EOPNOTSUPP;
191 }
192
193 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
194                                   struct ieee80211_key_conf *keyconf,
195                                   u8 sta_id)
196 {
197         return -EOPNOTSUPP;
198 }
199
200 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
201 {
202         unsigned long flags;
203         struct iwl_addsta_cmd sta_cmd;
204
205         spin_lock_irqsave(&priv->sta_lock, flags);
206         memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
207         memset(&priv->stations[sta_id].sta.key, 0,
208                 sizeof(struct iwl4965_keyinfo));
209         priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
210         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
211         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
212         memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
213         spin_unlock_irqrestore(&priv->sta_lock, flags);
214
215         IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
216         return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
217 }
218
219 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
220                         struct ieee80211_key_conf *keyconf, u8 sta_id)
221 {
222         int ret = 0;
223
224         keyconf->hw_key_idx = HW_KEY_DYNAMIC;
225
226         switch (keyconf->cipher) {
227         case WLAN_CIPHER_SUITE_CCMP:
228                 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
229                 break;
230         case WLAN_CIPHER_SUITE_TKIP:
231                 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
232                 break;
233         case WLAN_CIPHER_SUITE_WEP40:
234         case WLAN_CIPHER_SUITE_WEP104:
235                 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
236                 break;
237         default:
238                 IWL_ERR(priv, "Unknown alg: %s alg=%x\n", __func__,
239                         keyconf->cipher);
240                 ret = -EINVAL;
241         }
242
243         IWL_DEBUG_WEP(priv, "Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
244                       keyconf->cipher, keyconf->keylen, keyconf->keyidx,
245                       sta_id, ret);
246
247         return ret;
248 }
249
250 static int iwl3945_remove_static_key(struct iwl_priv *priv)
251 {
252         int ret = -EOPNOTSUPP;
253
254         return ret;
255 }
256
257 static int iwl3945_set_static_key(struct iwl_priv *priv,
258                                 struct ieee80211_key_conf *key)
259 {
260         if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
261             key->cipher == WLAN_CIPHER_SUITE_WEP104)
262                 return -EOPNOTSUPP;
263
264         IWL_ERR(priv, "Static key invalid: cipher %x\n", key->cipher);
265         return -EINVAL;
266 }
267
268 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
269 {
270         struct list_head *element;
271
272         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
273                        priv->frames_count);
274
275         while (!list_empty(&priv->free_frames)) {
276                 element = priv->free_frames.next;
277                 list_del(element);
278                 kfree(list_entry(element, struct iwl3945_frame, list));
279                 priv->frames_count--;
280         }
281
282         if (priv->frames_count) {
283                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
284                             priv->frames_count);
285                 priv->frames_count = 0;
286         }
287 }
288
289 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
290 {
291         struct iwl3945_frame *frame;
292         struct list_head *element;
293         if (list_empty(&priv->free_frames)) {
294                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
295                 if (!frame) {
296                         IWL_ERR(priv, "Could not allocate frame!\n");
297                         return NULL;
298                 }
299
300                 priv->frames_count++;
301                 return frame;
302         }
303
304         element = priv->free_frames.next;
305         list_del(element);
306         return list_entry(element, struct iwl3945_frame, list);
307 }
308
309 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
310 {
311         memset(frame, 0, sizeof(*frame));
312         list_add(&frame->list, &priv->free_frames);
313 }
314
315 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
316                                 struct ieee80211_hdr *hdr,
317                                 int left)
318 {
319
320         if (!iwl_is_associated(priv, IWL_RXON_CTX_BSS) || !priv->beacon_skb)
321                 return 0;
322
323         if (priv->beacon_skb->len > left)
324                 return 0;
325
326         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
327
328         return priv->beacon_skb->len;
329 }
330
331 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
332 {
333         struct iwl3945_frame *frame;
334         unsigned int frame_size;
335         int rc;
336         u8 rate;
337
338         frame = iwl3945_get_free_frame(priv);
339
340         if (!frame) {
341                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
342                           "command.\n");
343                 return -ENOMEM;
344         }
345
346         rate = iwl_rate_get_lowest_plcp(priv,
347                                 &priv->contexts[IWL_RXON_CTX_BSS]);
348
349         frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
350
351         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
352                               &frame->u.cmd[0]);
353
354         iwl3945_free_frame(priv, frame);
355
356         return rc;
357 }
358
359 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
360 {
361         if (priv->_3945.shared_virt)
362                 dma_free_coherent(&priv->pci_dev->dev,
363                                   sizeof(struct iwl3945_shared),
364                                   priv->_3945.shared_virt,
365                                   priv->_3945.shared_phys);
366 }
367
368 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
369                                       struct ieee80211_tx_info *info,
370                                       struct iwl_device_cmd *cmd,
371                                       struct sk_buff *skb_frag,
372                                       int sta_id)
373 {
374         struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
375         struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
376
377         tx_cmd->sec_ctl = 0;
378
379         switch (keyinfo->cipher) {
380         case WLAN_CIPHER_SUITE_CCMP:
381                 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
382                 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
383                 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
384                 break;
385
386         case WLAN_CIPHER_SUITE_TKIP:
387                 break;
388
389         case WLAN_CIPHER_SUITE_WEP104:
390                 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
391                 /* fall through */
392         case WLAN_CIPHER_SUITE_WEP40:
393                 tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
394                     (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
395
396                 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
397
398                 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
399                              "with key %d\n", info->control.hw_key->hw_key_idx);
400                 break;
401
402         default:
403                 IWL_ERR(priv, "Unknown encode cipher %x\n", keyinfo->cipher);
404                 break;
405         }
406 }
407
408 /*
409  * handle build REPLY_TX command notification.
410  */
411 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
412                                   struct iwl_device_cmd *cmd,
413                                   struct ieee80211_tx_info *info,
414                                   struct ieee80211_hdr *hdr, u8 std_id)
415 {
416         struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
417         __le32 tx_flags = tx_cmd->tx_flags;
418         __le16 fc = hdr->frame_control;
419
420         tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
421         if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
422                 tx_flags |= TX_CMD_FLG_ACK_MSK;
423                 if (ieee80211_is_mgmt(fc))
424                         tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
425                 if (ieee80211_is_probe_resp(fc) &&
426                     !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
427                         tx_flags |= TX_CMD_FLG_TSF_MSK;
428         } else {
429                 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
430                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
431         }
432
433         tx_cmd->sta_id = std_id;
434         if (ieee80211_has_morefrags(fc))
435                 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
436
437         if (ieee80211_is_data_qos(fc)) {
438                 u8 *qc = ieee80211_get_qos_ctl(hdr);
439                 tx_cmd->tid_tspec = qc[0] & 0xf;
440                 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
441         } else {
442                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
443         }
444
445         priv->cfg->ops->utils->tx_cmd_protection(priv, info, fc, &tx_flags);
446
447         tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
448         if (ieee80211_is_mgmt(fc)) {
449                 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
450                         tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
451                 else
452                         tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
453         } else {
454                 tx_cmd->timeout.pm_frame_timeout = 0;
455         }
456
457         tx_cmd->driver_txop = 0;
458         tx_cmd->tx_flags = tx_flags;
459         tx_cmd->next_frame_len = 0;
460 }
461
462 /*
463  * start REPLY_TX command process
464  */
465 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
466 {
467         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
468         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
469         struct iwl3945_tx_cmd *tx_cmd;
470         struct iwl_tx_queue *txq = NULL;
471         struct iwl_queue *q = NULL;
472         struct iwl_device_cmd *out_cmd;
473         struct iwl_cmd_meta *out_meta;
474         dma_addr_t phys_addr;
475         dma_addr_t txcmd_phys;
476         int txq_id = skb_get_queue_mapping(skb);
477         u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
478         u8 id;
479         u8 unicast;
480         u8 sta_id;
481         u8 tid = 0;
482         __le16 fc;
483         u8 wait_write_ptr = 0;
484         unsigned long flags;
485
486         spin_lock_irqsave(&priv->lock, flags);
487         if (iwl_is_rfkill(priv)) {
488                 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
489                 goto drop_unlock;
490         }
491
492         if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
493                 IWL_ERR(priv, "ERROR: No TX rate available.\n");
494                 goto drop_unlock;
495         }
496
497         unicast = !is_multicast_ether_addr(hdr->addr1);
498         id = 0;
499
500         fc = hdr->frame_control;
501
502 #ifdef CONFIG_IWLWIFI_DEBUG
503         if (ieee80211_is_auth(fc))
504                 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
505         else if (ieee80211_is_assoc_req(fc))
506                 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
507         else if (ieee80211_is_reassoc_req(fc))
508                 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
509 #endif
510
511         spin_unlock_irqrestore(&priv->lock, flags);
512
513         hdr_len = ieee80211_hdrlen(fc);
514
515         /* Find index into station table for destination station */
516         sta_id = iwl_sta_id_or_broadcast(
517                         priv, &priv->contexts[IWL_RXON_CTX_BSS],
518                         info->control.sta);
519         if (sta_id == IWL_INVALID_STATION) {
520                 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
521                                hdr->addr1);
522                 goto drop;
523         }
524
525         IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
526
527         if (ieee80211_is_data_qos(fc)) {
528                 u8 *qc = ieee80211_get_qos_ctl(hdr);
529                 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
530                 if (unlikely(tid >= MAX_TID_COUNT))
531                         goto drop;
532         }
533
534         /* Descriptor for chosen Tx queue */
535         txq = &priv->txq[txq_id];
536         q = &txq->q;
537
538         if ((iwl_queue_space(q) < q->high_mark))
539                 goto drop;
540
541         spin_lock_irqsave(&priv->lock, flags);
542
543         idx = get_cmd_index(q, q->write_ptr, 0);
544
545         /* Set up driver data for this TFD */
546         memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
547         txq->txb[q->write_ptr].skb = skb;
548         txq->txb[q->write_ptr].ctx = &priv->contexts[IWL_RXON_CTX_BSS];
549
550         /* Init first empty entry in queue's array of Tx/cmd buffers */
551         out_cmd = txq->cmd[idx];
552         out_meta = &txq->meta[idx];
553         tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
554         memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
555         memset(tx_cmd, 0, sizeof(*tx_cmd));
556
557         /*
558          * Set up the Tx-command (not MAC!) header.
559          * Store the chosen Tx queue and TFD index within the sequence field;
560          * after Tx, uCode's Tx response will return this value so driver can
561          * locate the frame within the tx queue and do post-tx processing.
562          */
563         out_cmd->hdr.cmd = REPLY_TX;
564         out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
565                                 INDEX_TO_SEQ(q->write_ptr)));
566
567         /* Copy MAC header from skb into command buffer */
568         memcpy(tx_cmd->hdr, hdr, hdr_len);
569
570
571         if (info->control.hw_key)
572                 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
573
574         /* TODO need this for burst mode later on */
575         iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
576
577         /* set is_hcca to 0; it probably will never be implemented */
578         iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
579
580         /* Total # bytes to be transmitted */
581         len = (u16)skb->len;
582         tx_cmd->len = cpu_to_le16(len);
583
584         iwl_dbg_log_tx_data_frame(priv, len, hdr);
585         iwl_update_stats(priv, true, fc, len);
586         tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
587         tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
588
589         if (!ieee80211_has_morefrags(hdr->frame_control)) {
590                 txq->need_update = 1;
591         } else {
592                 wait_write_ptr = 1;
593                 txq->need_update = 0;
594         }
595
596         IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
597                      le16_to_cpu(out_cmd->hdr.sequence));
598         IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
599         iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
600         iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
601                            ieee80211_hdrlen(fc));
602
603         /*
604          * Use the first empty entry in this queue's command buffer array
605          * to contain the Tx command and MAC header concatenated together
606          * (payload data will be in another buffer).
607          * Size of this varies, due to varying MAC header length.
608          * If end is not dword aligned, we'll have 2 extra bytes at the end
609          * of the MAC header (device reads on dword boundaries).
610          * We'll tell device about this padding later.
611          */
612         len = sizeof(struct iwl3945_tx_cmd) +
613                         sizeof(struct iwl_cmd_header) + hdr_len;
614
615         len_org = len;
616         len = (len + 3) & ~3;
617
618         if (len_org != len)
619                 len_org = 1;
620         else
621                 len_org = 0;
622
623         /* Physical address of this Tx command's header (not MAC header!),
624          * within command buffer array. */
625         txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
626                                     len, PCI_DMA_TODEVICE);
627         /* we do not map meta data ... so we can safely access address to
628          * provide to unmap command*/
629         dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
630         dma_unmap_len_set(out_meta, len, len);
631
632         /* Add buffer containing Tx command and MAC(!) header to TFD's
633          * first entry */
634         priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
635                                                    txcmd_phys, len, 1, 0);
636
637
638         /* Set up TFD's 2nd entry to point directly to remainder of skb,
639          * if any (802.11 null frames have no payload). */
640         len = skb->len - hdr_len;
641         if (len) {
642                 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
643                                            len, PCI_DMA_TODEVICE);
644                 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
645                                                            phys_addr, len,
646                                                            0, U32_PAD(len));
647         }
648
649
650         /* Tell device the write index *just past* this latest filled TFD */
651         q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
652         iwl_txq_update_write_ptr(priv, txq);
653         spin_unlock_irqrestore(&priv->lock, flags);
654
655         if ((iwl_queue_space(q) < q->high_mark)
656             && priv->mac80211_registered) {
657                 if (wait_write_ptr) {
658                         spin_lock_irqsave(&priv->lock, flags);
659                         txq->need_update = 1;
660                         iwl_txq_update_write_ptr(priv, txq);
661                         spin_unlock_irqrestore(&priv->lock, flags);
662                 }
663
664                 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
665         }
666
667         return 0;
668
669 drop_unlock:
670         spin_unlock_irqrestore(&priv->lock, flags);
671 drop:
672         return -1;
673 }
674
675 static int iwl3945_get_measurement(struct iwl_priv *priv,
676                                struct ieee80211_measurement_params *params,
677                                u8 type)
678 {
679         struct iwl_spectrum_cmd spectrum;
680         struct iwl_rx_packet *pkt;
681         struct iwl_host_cmd cmd = {
682                 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
683                 .data = (void *)&spectrum,
684                 .flags = CMD_WANT_SKB,
685         };
686         u32 add_time = le64_to_cpu(params->start_time);
687         int rc;
688         int spectrum_resp_status;
689         int duration = le16_to_cpu(params->duration);
690         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
691
692         if (iwl_is_associated(priv, IWL_RXON_CTX_BSS))
693                 add_time = iwl_usecs_to_beacons(priv,
694                         le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
695                         le16_to_cpu(ctx->timing.beacon_interval));
696
697         memset(&spectrum, 0, sizeof(spectrum));
698
699         spectrum.channel_count = cpu_to_le16(1);
700         spectrum.flags =
701             RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
702         spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
703         cmd.len = sizeof(spectrum);
704         spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
705
706         if (iwl_is_associated(priv, IWL_RXON_CTX_BSS))
707                 spectrum.start_time =
708                         iwl_add_beacon_time(priv,
709                                 priv->_3945.last_beacon_time, add_time,
710                                 le16_to_cpu(ctx->timing.beacon_interval));
711         else
712                 spectrum.start_time = 0;
713
714         spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
715         spectrum.channels[0].channel = params->channel;
716         spectrum.channels[0].type = type;
717         if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
718                 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
719                     RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
720
721         rc = iwl_send_cmd_sync(priv, &cmd);
722         if (rc)
723                 return rc;
724
725         pkt = (struct iwl_rx_packet *)cmd.reply_page;
726         if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
727                 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
728                 rc = -EIO;
729         }
730
731         spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
732         switch (spectrum_resp_status) {
733         case 0:         /* Command will be handled */
734                 if (pkt->u.spectrum.id != 0xff) {
735                         IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
736                                                 pkt->u.spectrum.id);
737                         priv->measurement_status &= ~MEASUREMENT_READY;
738                 }
739                 priv->measurement_status |= MEASUREMENT_ACTIVE;
740                 rc = 0;
741                 break;
742
743         case 1:         /* Command will not be handled */
744                 rc = -EAGAIN;
745                 break;
746         }
747
748         iwl_free_pages(priv, cmd.reply_page);
749
750         return rc;
751 }
752
753 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
754                                struct iwl_rx_mem_buffer *rxb)
755 {
756         struct iwl_rx_packet *pkt = rxb_addr(rxb);
757         struct iwl_alive_resp *palive;
758         struct delayed_work *pwork;
759
760         palive = &pkt->u.alive_frame;
761
762         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
763                        "0x%01X 0x%01X\n",
764                        palive->is_valid, palive->ver_type,
765                        palive->ver_subtype);
766
767         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
768                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
769                 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
770                        sizeof(struct iwl_alive_resp));
771                 pwork = &priv->init_alive_start;
772         } else {
773                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
774                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
775                        sizeof(struct iwl_alive_resp));
776                 pwork = &priv->alive_start;
777                 iwl3945_disable_events(priv);
778         }
779
780         /* We delay the ALIVE response by 5ms to
781          * give the HW RF Kill time to activate... */
782         if (palive->is_valid == UCODE_VALID_OK)
783                 queue_delayed_work(priv->workqueue, pwork,
784                                    msecs_to_jiffies(5));
785         else
786                 IWL_WARN(priv, "uCode did not respond OK.\n");
787 }
788
789 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
790                                  struct iwl_rx_mem_buffer *rxb)
791 {
792 #ifdef CONFIG_IWLWIFI_DEBUG
793         struct iwl_rx_packet *pkt = rxb_addr(rxb);
794 #endif
795
796         IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
797 }
798
799 static void iwl3945_bg_beacon_update(struct work_struct *work)
800 {
801         struct iwl_priv *priv =
802                 container_of(work, struct iwl_priv, beacon_update);
803         struct sk_buff *beacon;
804
805         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
806         beacon = ieee80211_beacon_get(priv->hw,
807                         priv->contexts[IWL_RXON_CTX_BSS].vif);
808
809         if (!beacon) {
810                 IWL_ERR(priv, "update beacon failed\n");
811                 return;
812         }
813
814         mutex_lock(&priv->mutex);
815         /* new beacon skb is allocated every time; dispose previous.*/
816         if (priv->beacon_skb)
817                 dev_kfree_skb(priv->beacon_skb);
818
819         priv->beacon_skb = beacon;
820         mutex_unlock(&priv->mutex);
821
822         iwl3945_send_beacon_cmd(priv);
823 }
824
825 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
826                                 struct iwl_rx_mem_buffer *rxb)
827 {
828         struct iwl_rx_packet *pkt = rxb_addr(rxb);
829         struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
830 #ifdef CONFIG_IWLWIFI_DEBUG
831         u8 rate = beacon->beacon_notify_hdr.rate;
832
833         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
834                 "tsf %d %d rate %d\n",
835                 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
836                 beacon->beacon_notify_hdr.failure_frame,
837                 le32_to_cpu(beacon->ibss_mgr_status),
838                 le32_to_cpu(beacon->high_tsf),
839                 le32_to_cpu(beacon->low_tsf), rate);
840 #endif
841
842         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
843
844         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
845             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
846                 queue_work(priv->workqueue, &priv->beacon_update);
847 }
848
849 /* Handle notification from uCode that card's power state is changing
850  * due to software, hardware, or critical temperature RFKILL */
851 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
852                                     struct iwl_rx_mem_buffer *rxb)
853 {
854         struct iwl_rx_packet *pkt = rxb_addr(rxb);
855         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
856         unsigned long status = priv->status;
857
858         IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
859                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
860                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
861
862         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
863                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
864
865         if (flags & HW_CARD_DISABLED)
866                 set_bit(STATUS_RF_KILL_HW, &priv->status);
867         else
868                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
869
870
871         iwl_scan_cancel(priv);
872
873         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
874              test_bit(STATUS_RF_KILL_HW, &priv->status)))
875                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
876                                 test_bit(STATUS_RF_KILL_HW, &priv->status));
877         else
878                 wake_up_interruptible(&priv->wait_command_queue);
879 }
880
881 /**
882  * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
883  *
884  * Setup the RX handlers for each of the reply types sent from the uCode
885  * to the host.
886  *
887  * This function chains into the hardware specific files for them to setup
888  * any hardware specific handlers as well.
889  */
890 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
891 {
892         priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
893         priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
894         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
895         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
896         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
897                         iwl_rx_spectrum_measure_notif;
898         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
899         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
900             iwl_rx_pm_debug_statistics_notif;
901         priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
902
903         /*
904          * The same handler is used for both the REPLY to a discrete
905          * statistics request from the host as well as for the periodic
906          * statistics notifications (after received beacons) from the uCode.
907          */
908         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
909         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
910
911         iwl_setup_rx_scan_handlers(priv);
912         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
913
914         /* Set up hardware specific Rx handlers */
915         iwl3945_hw_rx_handler_setup(priv);
916 }
917
918 /************************** RX-FUNCTIONS ****************************/
919 /*
920  * Rx theory of operation
921  *
922  * The host allocates 32 DMA target addresses and passes the host address
923  * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
924  * 0 to 31
925  *
926  * Rx Queue Indexes
927  * The host/firmware share two index registers for managing the Rx buffers.
928  *
929  * The READ index maps to the first position that the firmware may be writing
930  * to -- the driver can read up to (but not including) this position and get
931  * good data.
932  * The READ index is managed by the firmware once the card is enabled.
933  *
934  * The WRITE index maps to the last position the driver has read from -- the
935  * position preceding WRITE is the last slot the firmware can place a packet.
936  *
937  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
938  * WRITE = READ.
939  *
940  * During initialization, the host sets up the READ queue position to the first
941  * INDEX position, and WRITE to the last (READ - 1 wrapped)
942  *
943  * When the firmware places a packet in a buffer, it will advance the READ index
944  * and fire the RX interrupt.  The driver can then query the READ index and
945  * process as many packets as possible, moving the WRITE index forward as it
946  * resets the Rx queue buffers with new memory.
947  *
948  * The management in the driver is as follows:
949  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
950  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
951  *   to replenish the iwl->rxq->rx_free.
952  * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
953  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
954  *   'processed' and 'read' driver indexes as well)
955  * + A received packet is processed and handed to the kernel network stack,
956  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
957  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
958  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
959  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
960  *   were enough free buffers and RX_STALLED is set it is cleared.
961  *
962  *
963  * Driver sequence:
964  *
965  * iwl3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
966  *                            iwl3945_rx_queue_restock
967  * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
968  *                            queue, updates firmware pointers, and updates
969  *                            the WRITE index.  If insufficient rx_free buffers
970  *                            are available, schedules iwl3945_rx_replenish
971  *
972  * -- enable interrupts --
973  * ISR - iwl3945_rx()         Detach iwl_rx_mem_buffers from pool up to the
974  *                            READ INDEX, detaching the SKB from the pool.
975  *                            Moves the packet buffer from queue to rx_used.
976  *                            Calls iwl3945_rx_queue_restock to refill any empty
977  *                            slots.
978  * ...
979  *
980  */
981
982 /**
983  * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
984  */
985 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
986                                           dma_addr_t dma_addr)
987 {
988         return cpu_to_le32((u32)dma_addr);
989 }
990
991 /**
992  * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
993  *
994  * If there are slots in the RX queue that need to be restocked,
995  * and we have free pre-allocated buffers, fill the ranks as much
996  * as we can, pulling from rx_free.
997  *
998  * This moves the 'write' index forward to catch up with 'processed', and
999  * also updates the memory address in the firmware to reference the new
1000  * target buffer.
1001  */
1002 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
1003 {
1004         struct iwl_rx_queue *rxq = &priv->rxq;
1005         struct list_head *element;
1006         struct iwl_rx_mem_buffer *rxb;
1007         unsigned long flags;
1008         int write;
1009
1010         spin_lock_irqsave(&rxq->lock, flags);
1011         write = rxq->write & ~0x7;
1012         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1013                 /* Get next free Rx buffer, remove from free list */
1014                 element = rxq->rx_free.next;
1015                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1016                 list_del(element);
1017
1018                 /* Point to Rx buffer via next RBD in circular buffer */
1019                 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1020                 rxq->queue[rxq->write] = rxb;
1021                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1022                 rxq->free_count--;
1023         }
1024         spin_unlock_irqrestore(&rxq->lock, flags);
1025         /* If the pre-allocated buffer pool is dropping low, schedule to
1026          * refill it */
1027         if (rxq->free_count <= RX_LOW_WATERMARK)
1028                 queue_work(priv->workqueue, &priv->rx_replenish);
1029
1030
1031         /* If we've added more space for the firmware to place data, tell it.
1032          * Increment device's write pointer in multiples of 8. */
1033         if ((rxq->write_actual != (rxq->write & ~0x7))
1034             || (abs(rxq->write - rxq->read) > 7)) {
1035                 spin_lock_irqsave(&rxq->lock, flags);
1036                 rxq->need_update = 1;
1037                 spin_unlock_irqrestore(&rxq->lock, flags);
1038                 iwl_rx_queue_update_write_ptr(priv, rxq);
1039         }
1040 }
1041
1042 /**
1043  * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1044  *
1045  * When moving to rx_free an SKB is allocated for the slot.
1046  *
1047  * Also restock the Rx queue via iwl3945_rx_queue_restock.
1048  * This is called as a scheduled work item (except for during initialization)
1049  */
1050 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1051 {
1052         struct iwl_rx_queue *rxq = &priv->rxq;
1053         struct list_head *element;
1054         struct iwl_rx_mem_buffer *rxb;
1055         struct page *page;
1056         unsigned long flags;
1057         gfp_t gfp_mask = priority;
1058
1059         while (1) {
1060                 spin_lock_irqsave(&rxq->lock, flags);
1061
1062                 if (list_empty(&rxq->rx_used)) {
1063                         spin_unlock_irqrestore(&rxq->lock, flags);
1064                         return;
1065                 }
1066                 spin_unlock_irqrestore(&rxq->lock, flags);
1067
1068                 if (rxq->free_count > RX_LOW_WATERMARK)
1069                         gfp_mask |= __GFP_NOWARN;
1070
1071                 if (priv->hw_params.rx_page_order > 0)
1072                         gfp_mask |= __GFP_COMP;
1073
1074                 /* Alloc a new receive buffer */
1075                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1076                 if (!page) {
1077                         if (net_ratelimit())
1078                                 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1079                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1080                             net_ratelimit())
1081                                 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1082                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
1083                                          rxq->free_count);
1084                         /* We don't reschedule replenish work here -- we will
1085                          * call the restock method and if it still needs
1086                          * more buffers it will schedule replenish */
1087                         break;
1088                 }
1089
1090                 spin_lock_irqsave(&rxq->lock, flags);
1091                 if (list_empty(&rxq->rx_used)) {
1092                         spin_unlock_irqrestore(&rxq->lock, flags);
1093                         __free_pages(page, priv->hw_params.rx_page_order);
1094                         return;
1095                 }
1096                 element = rxq->rx_used.next;
1097                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1098                 list_del(element);
1099                 spin_unlock_irqrestore(&rxq->lock, flags);
1100
1101                 rxb->page = page;
1102                 /* Get physical address of RB/SKB */
1103                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1104                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1105                                 PCI_DMA_FROMDEVICE);
1106
1107                 spin_lock_irqsave(&rxq->lock, flags);
1108
1109                 list_add_tail(&rxb->list, &rxq->rx_free);
1110                 rxq->free_count++;
1111                 priv->alloc_rxb_page++;
1112
1113                 spin_unlock_irqrestore(&rxq->lock, flags);
1114         }
1115 }
1116
1117 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1118 {
1119         unsigned long flags;
1120         int i;
1121         spin_lock_irqsave(&rxq->lock, flags);
1122         INIT_LIST_HEAD(&rxq->rx_free);
1123         INIT_LIST_HEAD(&rxq->rx_used);
1124         /* Fill the rx_used queue with _all_ of the Rx buffers */
1125         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1126                 /* In the reset function, these buffers may have been allocated
1127                  * to an SKB, so we need to unmap and free potential storage */
1128                 if (rxq->pool[i].page != NULL) {
1129                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1130                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1131                                 PCI_DMA_FROMDEVICE);
1132                         __iwl_free_pages(priv, rxq->pool[i].page);
1133                         rxq->pool[i].page = NULL;
1134                 }
1135                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1136         }
1137
1138         /* Set us so that we have processed and used all buffers, but have
1139          * not restocked the Rx queue with fresh buffers */
1140         rxq->read = rxq->write = 0;
1141         rxq->write_actual = 0;
1142         rxq->free_count = 0;
1143         spin_unlock_irqrestore(&rxq->lock, flags);
1144 }
1145
1146 void iwl3945_rx_replenish(void *data)
1147 {
1148         struct iwl_priv *priv = data;
1149         unsigned long flags;
1150
1151         iwl3945_rx_allocate(priv, GFP_KERNEL);
1152
1153         spin_lock_irqsave(&priv->lock, flags);
1154         iwl3945_rx_queue_restock(priv);
1155         spin_unlock_irqrestore(&priv->lock, flags);
1156 }
1157
1158 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1159 {
1160         iwl3945_rx_allocate(priv, GFP_ATOMIC);
1161
1162         iwl3945_rx_queue_restock(priv);
1163 }
1164
1165
1166 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1167  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1168  * This free routine walks the list of POOL entries and if SKB is set to
1169  * non NULL it is unmapped and freed
1170  */
1171 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1172 {
1173         int i;
1174         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1175                 if (rxq->pool[i].page != NULL) {
1176                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1177                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1178                                 PCI_DMA_FROMDEVICE);
1179                         __iwl_free_pages(priv, rxq->pool[i].page);
1180                         rxq->pool[i].page = NULL;
1181                 }
1182         }
1183
1184         dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1185                           rxq->bd_dma);
1186         dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1187                           rxq->rb_stts, rxq->rb_stts_dma);
1188         rxq->bd = NULL;
1189         rxq->rb_stts  = NULL;
1190 }
1191
1192
1193 /* Convert linear signal-to-noise ratio into dB */
1194 static u8 ratio2dB[100] = {
1195 /*       0   1   2   3   4   5   6   7   8   9 */
1196          0,  0,  6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1197         20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1198         26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1199         29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1200         32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1201         34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1202         36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1203         37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1204         38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1205         39, 39, 39, 39, 39, 40, 40, 40, 40, 40  /* 90 - 99 */
1206 };
1207
1208 /* Calculates a relative dB value from a ratio of linear
1209  *   (i.e. not dB) signal levels.
1210  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1211 int iwl3945_calc_db_from_ratio(int sig_ratio)
1212 {
1213         /* 1000:1 or higher just report as 60 dB */
1214         if (sig_ratio >= 1000)
1215                 return 60;
1216
1217         /* 100:1 or higher, divide by 10 and use table,
1218          *   add 20 dB to make up for divide by 10 */
1219         if (sig_ratio >= 100)
1220                 return 20 + (int)ratio2dB[sig_ratio/10];
1221
1222         /* We shouldn't see this */
1223         if (sig_ratio < 1)
1224                 return 0;
1225
1226         /* Use table for ratios 1:1 - 99:1 */
1227         return (int)ratio2dB[sig_ratio];
1228 }
1229
1230 /**
1231  * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1232  *
1233  * Uses the priv->rx_handlers callback function array to invoke
1234  * the appropriate handlers, including command responses,
1235  * frame-received notifications, and other notifications.
1236  */
1237 static void iwl3945_rx_handle(struct iwl_priv *priv)
1238 {
1239         struct iwl_rx_mem_buffer *rxb;
1240         struct iwl_rx_packet *pkt;
1241         struct iwl_rx_queue *rxq = &priv->rxq;
1242         u32 r, i;
1243         int reclaim;
1244         unsigned long flags;
1245         u8 fill_rx = 0;
1246         u32 count = 8;
1247         int total_empty = 0;
1248
1249         /* uCode's read index (stored in shared DRAM) indicates the last Rx
1250          * buffer that the driver may process (last buffer filled by ucode). */
1251         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
1252         i = rxq->read;
1253
1254         /* calculate total frames need to be restock after handling RX */
1255         total_empty = r - rxq->write_actual;
1256         if (total_empty < 0)
1257                 total_empty += RX_QUEUE_SIZE;
1258
1259         if (total_empty > (RX_QUEUE_SIZE / 2))
1260                 fill_rx = 1;
1261         /* Rx interrupt, but nothing sent from uCode */
1262         if (i == r)
1263                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1264
1265         while (i != r) {
1266                 int len;
1267
1268                 rxb = rxq->queue[i];
1269
1270                 /* If an RXB doesn't have a Rx queue slot associated with it,
1271                  * then a bug has been introduced in the queue refilling
1272                  * routines -- catch it here */
1273                 BUG_ON(rxb == NULL);
1274
1275                 rxq->queue[i] = NULL;
1276
1277                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1278                                PAGE_SIZE << priv->hw_params.rx_page_order,
1279                                PCI_DMA_FROMDEVICE);
1280                 pkt = rxb_addr(rxb);
1281
1282                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1283                 len += sizeof(u32); /* account for status word */
1284                 trace_iwlwifi_dev_rx(priv, pkt, len);
1285
1286                 /* Reclaim a command buffer only if this packet is a response
1287                  *   to a (driver-originated) command.
1288                  * If the packet (e.g. Rx frame) originated from uCode,
1289                  *   there is no command buffer to reclaim.
1290                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1291                  *   but apparently a few don't get set; catch them here. */
1292                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1293                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1294                         (pkt->hdr.cmd != REPLY_TX);
1295
1296                 /* Based on type of command response or notification,
1297                  *   handle those that need handling via function in
1298                  *   rx_handlers table.  See iwl3945_setup_rx_handlers() */
1299                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1300                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1301                                 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1302                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1303                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1304                 } else {
1305                         /* No handling needed */
1306                         IWL_DEBUG_RX(priv,
1307                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1308                                 r, i, get_cmd_string(pkt->hdr.cmd),
1309                                 pkt->hdr.cmd);
1310                 }
1311
1312                 /*
1313                  * XXX: After here, we should always check rxb->page
1314                  * against NULL before touching it or its virtual
1315                  * memory (pkt). Because some rx_handler might have
1316                  * already taken or freed the pages.
1317                  */
1318
1319                 if (reclaim) {
1320                         /* Invoke any callbacks, transfer the buffer to caller,
1321                          * and fire off the (possibly) blocking iwl_send_cmd()
1322                          * as we reclaim the driver command queue */
1323                         if (rxb->page)
1324                                 iwl_tx_cmd_complete(priv, rxb);
1325                         else
1326                                 IWL_WARN(priv, "Claim null rxb?\n");
1327                 }
1328
1329                 /* Reuse the page if possible. For notification packets and
1330                  * SKBs that fail to Rx correctly, add them back into the
1331                  * rx_free list for reuse later. */
1332                 spin_lock_irqsave(&rxq->lock, flags);
1333                 if (rxb->page != NULL) {
1334                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1335                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1336                                 PCI_DMA_FROMDEVICE);
1337                         list_add_tail(&rxb->list, &rxq->rx_free);
1338                         rxq->free_count++;
1339                 } else
1340                         list_add_tail(&rxb->list, &rxq->rx_used);
1341
1342                 spin_unlock_irqrestore(&rxq->lock, flags);
1343
1344                 i = (i + 1) & RX_QUEUE_MASK;
1345                 /* If there are a lot of unused frames,
1346                  * restock the Rx queue so ucode won't assert. */
1347                 if (fill_rx) {
1348                         count++;
1349                         if (count >= 8) {
1350                                 rxq->read = i;
1351                                 iwl3945_rx_replenish_now(priv);
1352                                 count = 0;
1353                         }
1354                 }
1355         }
1356
1357         /* Backtrack one entry */
1358         rxq->read = i;
1359         if (fill_rx)
1360                 iwl3945_rx_replenish_now(priv);
1361         else
1362                 iwl3945_rx_queue_restock(priv);
1363 }
1364
1365 /* call this function to flush any scheduled tasklet */
1366 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1367 {
1368         /* wait to make sure we flush pending tasklet*/
1369         synchronize_irq(priv->pci_dev->irq);
1370         tasklet_kill(&priv->irq_tasklet);
1371 }
1372
1373 static const char *desc_lookup(int i)
1374 {
1375         switch (i) {
1376         case 1:
1377                 return "FAIL";
1378         case 2:
1379                 return "BAD_PARAM";
1380         case 3:
1381                 return "BAD_CHECKSUM";
1382         case 4:
1383                 return "NMI_INTERRUPT";
1384         case 5:
1385                 return "SYSASSERT";
1386         case 6:
1387                 return "FATAL_ERROR";
1388         }
1389
1390         return "UNKNOWN";
1391 }
1392
1393 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1394 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1395
1396 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1397 {
1398         u32 i;
1399         u32 desc, time, count, base, data1;
1400         u32 blink1, blink2, ilink1, ilink2;
1401
1402         base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1403
1404         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1405                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1406                 return;
1407         }
1408
1409
1410         count = iwl_read_targ_mem(priv, base);
1411
1412         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1413                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1414                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1415                         priv->status, count);
1416         }
1417
1418         IWL_ERR(priv, "Desc       Time       asrtPC  blink2 "
1419                   "ilink1  nmiPC   Line\n");
1420         for (i = ERROR_START_OFFSET;
1421              i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1422              i += ERROR_ELEM_SIZE) {
1423                 desc = iwl_read_targ_mem(priv, base + i);
1424                 time =
1425                     iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1426                 blink1 =
1427                     iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1428                 blink2 =
1429                     iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1430                 ilink1 =
1431                     iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1432                 ilink2 =
1433                     iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1434                 data1 =
1435                     iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1436
1437                 IWL_ERR(priv,
1438                         "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1439                         desc_lookup(desc), desc, time, blink1, blink2,
1440                         ilink1, ilink2, data1);
1441                 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1442                                         0, blink1, blink2, ilink1, ilink2);
1443         }
1444 }
1445
1446 #define EVENT_START_OFFSET  (6 * sizeof(u32))
1447
1448 /**
1449  * iwl3945_print_event_log - Dump error event log to syslog
1450  *
1451  */
1452 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1453                                   u32 num_events, u32 mode,
1454                                   int pos, char **buf, size_t bufsz)
1455 {
1456         u32 i;
1457         u32 base;       /* SRAM byte address of event log header */
1458         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1459         u32 ptr;        /* SRAM byte address of log data */
1460         u32 ev, time, data; /* event log data */
1461         unsigned long reg_flags;
1462
1463         if (num_events == 0)
1464                 return pos;
1465
1466         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1467
1468         if (mode == 0)
1469                 event_size = 2 * sizeof(u32);
1470         else
1471                 event_size = 3 * sizeof(u32);
1472
1473         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1474
1475         /* Make sure device is powered up for SRAM reads */
1476         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1477         iwl_grab_nic_access(priv);
1478
1479         /* Set starting address; reads will auto-increment */
1480         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1481         rmb();
1482
1483         /* "time" is actually "data" for mode 0 (no timestamp).
1484          * place event id # at far right for easier visual parsing. */
1485         for (i = 0; i < num_events; i++) {
1486                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1487                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1488                 if (mode == 0) {
1489                         /* data, ev */
1490                         if (bufsz) {
1491                                 pos += scnprintf(*buf + pos, bufsz - pos,
1492                                                 "0x%08x:%04u\n",
1493                                                 time, ev);
1494                         } else {
1495                                 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1496                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1497                                                               time, ev);
1498                         }
1499                 } else {
1500                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1501                         if (bufsz) {
1502                                 pos += scnprintf(*buf + pos, bufsz - pos,
1503                                                 "%010u:0x%08x:%04u\n",
1504                                                  time, data, ev);
1505                         } else {
1506                                 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1507                                         time, data, ev);
1508                                 trace_iwlwifi_dev_ucode_event(priv, time,
1509                                                               data, ev);
1510                         }
1511                 }
1512         }
1513
1514         /* Allow device to power down */
1515         iwl_release_nic_access(priv);
1516         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1517         return pos;
1518 }
1519
1520 /**
1521  * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1522  */
1523 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1524                                       u32 num_wraps, u32 next_entry,
1525                                       u32 size, u32 mode,
1526                                       int pos, char **buf, size_t bufsz)
1527 {
1528         /*
1529          * display the newest DEFAULT_LOG_ENTRIES entries
1530          * i.e the entries just before the next ont that uCode would fill.
1531          */
1532         if (num_wraps) {
1533                 if (next_entry < size) {
1534                         pos = iwl3945_print_event_log(priv,
1535                                              capacity - (size - next_entry),
1536                                              size - next_entry, mode,
1537                                              pos, buf, bufsz);
1538                         pos = iwl3945_print_event_log(priv, 0,
1539                                                       next_entry, mode,
1540                                                       pos, buf, bufsz);
1541                 } else
1542                         pos = iwl3945_print_event_log(priv, next_entry - size,
1543                                                       size, mode,
1544                                                       pos, buf, bufsz);
1545         } else {
1546                 if (next_entry < size)
1547                         pos = iwl3945_print_event_log(priv, 0,
1548                                                       next_entry, mode,
1549                                                       pos, buf, bufsz);
1550                 else
1551                         pos = iwl3945_print_event_log(priv, next_entry - size,
1552                                                       size, mode,
1553                                                       pos, buf, bufsz);
1554         }
1555         return pos;
1556 }
1557
1558 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1559
1560 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1561                             char **buf, bool display)
1562 {
1563         u32 base;       /* SRAM byte address of event log header */
1564         u32 capacity;   /* event log capacity in # entries */
1565         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1566         u32 num_wraps;  /* # times uCode wrapped to top of log */
1567         u32 next_entry; /* index of next entry to be written by uCode */
1568         u32 size;       /* # entries that we'll print */
1569         int pos = 0;
1570         size_t bufsz = 0;
1571
1572         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1573         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1574                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1575                 return  -EINVAL;
1576         }
1577
1578         /* event log header */
1579         capacity = iwl_read_targ_mem(priv, base);
1580         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1581         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1582         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1583
1584         if (capacity > priv->cfg->base_params->max_event_log_size) {
1585                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1586                         capacity, priv->cfg->base_params->max_event_log_size);
1587                 capacity = priv->cfg->base_params->max_event_log_size;
1588         }
1589
1590         if (next_entry > priv->cfg->base_params->max_event_log_size) {
1591                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1592                         next_entry, priv->cfg->base_params->max_event_log_size);
1593                 next_entry = priv->cfg->base_params->max_event_log_size;
1594         }
1595
1596         size = num_wraps ? capacity : next_entry;
1597
1598         /* bail out if nothing in log */
1599         if (size == 0) {
1600                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1601                 return pos;
1602         }
1603
1604 #ifdef CONFIG_IWLWIFI_DEBUG
1605         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1606                 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1607                         ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1608 #else
1609         size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1610                 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1611 #endif
1612
1613         IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1614                   size);
1615
1616 #ifdef CONFIG_IWLWIFI_DEBUG
1617         if (display) {
1618                 if (full_log)
1619                         bufsz = capacity * 48;
1620                 else
1621                         bufsz = size * 48;
1622                 *buf = kmalloc(bufsz, GFP_KERNEL);
1623                 if (!*buf)
1624                         return -ENOMEM;
1625         }
1626         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1627                 /* if uCode has wrapped back to top of log,
1628                  * start at the oldest entry,
1629                  * i.e the next one that uCode would fill.
1630                  */
1631                 if (num_wraps)
1632                         pos = iwl3945_print_event_log(priv, next_entry,
1633                                                 capacity - next_entry, mode,
1634                                                 pos, buf, bufsz);
1635
1636                 /* (then/else) start at top of log */
1637                 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1638                                               pos, buf, bufsz);
1639         } else
1640                 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1641                                                     next_entry, size, mode,
1642                                                     pos, buf, bufsz);
1643 #else
1644         pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1645                                             next_entry, size, mode,
1646                                             pos, buf, bufsz);
1647 #endif
1648         return pos;
1649 }
1650
1651 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1652 {
1653         u32 inta, handled = 0;
1654         u32 inta_fh;
1655         unsigned long flags;
1656 #ifdef CONFIG_IWLWIFI_DEBUG
1657         u32 inta_mask;
1658 #endif
1659
1660         spin_lock_irqsave(&priv->lock, flags);
1661
1662         /* Ack/clear/reset pending uCode interrupts.
1663          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1664          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1665         inta = iwl_read32(priv, CSR_INT);
1666         iwl_write32(priv, CSR_INT, inta);
1667
1668         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1669          * Any new interrupts that happen after this, either while we're
1670          * in this tasklet, or later, will show up in next ISR/tasklet. */
1671         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1672         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1673
1674 #ifdef CONFIG_IWLWIFI_DEBUG
1675         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1676                 /* just for debug */
1677                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1678                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1679                               inta, inta_mask, inta_fh);
1680         }
1681 #endif
1682
1683         spin_unlock_irqrestore(&priv->lock, flags);
1684
1685         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1686          * atomic, make sure that inta covers all the interrupts that
1687          * we've discovered, even if FH interrupt came in just after
1688          * reading CSR_INT. */
1689         if (inta_fh & CSR39_FH_INT_RX_MASK)
1690                 inta |= CSR_INT_BIT_FH_RX;
1691         if (inta_fh & CSR39_FH_INT_TX_MASK)
1692                 inta |= CSR_INT_BIT_FH_TX;
1693
1694         /* Now service all interrupt bits discovered above. */
1695         if (inta & CSR_INT_BIT_HW_ERR) {
1696                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1697
1698                 /* Tell the device to stop sending interrupts */
1699                 iwl_disable_interrupts(priv);
1700
1701                 priv->isr_stats.hw++;
1702                 iwl_irq_handle_error(priv);
1703
1704                 handled |= CSR_INT_BIT_HW_ERR;
1705
1706                 return;
1707         }
1708
1709 #ifdef CONFIG_IWLWIFI_DEBUG
1710         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1711                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1712                 if (inta & CSR_INT_BIT_SCD) {
1713                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1714                                       "the frame/frames.\n");
1715                         priv->isr_stats.sch++;
1716                 }
1717
1718                 /* Alive notification via Rx interrupt will do the real work */
1719                 if (inta & CSR_INT_BIT_ALIVE) {
1720                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1721                         priv->isr_stats.alive++;
1722                 }
1723         }
1724 #endif
1725         /* Safely ignore these bits for debug checks below */
1726         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1727
1728         /* Error detected by uCode */
1729         if (inta & CSR_INT_BIT_SW_ERR) {
1730                 IWL_ERR(priv, "Microcode SW error detected. "
1731                         "Restarting 0x%X.\n", inta);
1732                 priv->isr_stats.sw++;
1733                 iwl_irq_handle_error(priv);
1734                 handled |= CSR_INT_BIT_SW_ERR;
1735         }
1736
1737         /* uCode wakes up after power-down sleep */
1738         if (inta & CSR_INT_BIT_WAKEUP) {
1739                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1740                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1741                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1742                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1743                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1744                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1745                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1746                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1747
1748                 priv->isr_stats.wakeup++;
1749                 handled |= CSR_INT_BIT_WAKEUP;
1750         }
1751
1752         /* All uCode command responses, including Tx command responses,
1753          * Rx "responses" (frame-received notification), and other
1754          * notifications from uCode come through here*/
1755         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1756                 iwl3945_rx_handle(priv);
1757                 priv->isr_stats.rx++;
1758                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1759         }
1760
1761         if (inta & CSR_INT_BIT_FH_TX) {
1762                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1763                 priv->isr_stats.tx++;
1764
1765                 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1766                 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1767                                         (FH39_SRVC_CHNL), 0x0);
1768                 handled |= CSR_INT_BIT_FH_TX;
1769         }
1770
1771         if (inta & ~handled) {
1772                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1773                 priv->isr_stats.unhandled++;
1774         }
1775
1776         if (inta & ~priv->inta_mask) {
1777                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1778                          inta & ~priv->inta_mask);
1779                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1780         }
1781
1782         /* Re-enable all interrupts */
1783         /* only Re-enable if disabled by irq */
1784         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1785                 iwl_enable_interrupts(priv);
1786
1787 #ifdef CONFIG_IWLWIFI_DEBUG
1788         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1789                 inta = iwl_read32(priv, CSR_INT);
1790                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1791                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1792                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1793                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1794         }
1795 #endif
1796 }
1797
1798 static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv,
1799                                                struct ieee80211_vif *vif,
1800                                                enum ieee80211_band band,
1801                                                struct iwl3945_scan_channel *scan_ch)
1802 {
1803         const struct ieee80211_supported_band *sband;
1804         u16 passive_dwell = 0;
1805         u16 active_dwell = 0;
1806         int added = 0;
1807         u8 channel = 0;
1808
1809         sband = iwl_get_hw_mode(priv, band);
1810         if (!sband) {
1811                 IWL_ERR(priv, "invalid band\n");
1812                 return added;
1813         }
1814
1815         active_dwell = iwl_get_active_dwell_time(priv, band, 0);
1816         passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1817
1818         if (passive_dwell <= active_dwell)
1819                 passive_dwell = active_dwell + 1;
1820
1821
1822         channel = iwl_get_single_channel_number(priv, band);
1823
1824         if (channel) {
1825                 scan_ch->channel = channel;
1826                 scan_ch->type = 0;      /* passive */
1827                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1828                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1829                 /* Set txpower levels to defaults */
1830                 scan_ch->tpc.dsp_atten = 110;
1831                 if (band == IEEE80211_BAND_5GHZ)
1832                         scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1833                 else
1834                         scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1835                 added++;
1836         } else
1837                 IWL_ERR(priv, "no valid channel found\n");
1838         return added;
1839 }
1840
1841 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1842                                          enum ieee80211_band band,
1843                                      u8 is_active, u8 n_probes,
1844                                      struct iwl3945_scan_channel *scan_ch,
1845                                      struct ieee80211_vif *vif)
1846 {
1847         struct ieee80211_channel *chan;
1848         const struct ieee80211_supported_band *sband;
1849         const struct iwl_channel_info *ch_info;
1850         u16 passive_dwell = 0;
1851         u16 active_dwell = 0;
1852         int added, i;
1853
1854         sband = iwl_get_hw_mode(priv, band);
1855         if (!sband)
1856                 return 0;
1857
1858         active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1859         passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1860
1861         if (passive_dwell <= active_dwell)
1862                 passive_dwell = active_dwell + 1;
1863
1864         for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1865                 chan = priv->scan_request->channels[i];
1866
1867                 if (chan->band != band)
1868                         continue;
1869
1870                 scan_ch->channel = chan->hw_value;
1871
1872                 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1873                 if (!is_channel_valid(ch_info)) {
1874                         IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1875                                        scan_ch->channel);
1876                         continue;
1877                 }
1878
1879                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1880                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1881                 /* If passive , set up for auto-switch
1882                  *  and use long active_dwell time.
1883                  */
1884                 if (!is_active || is_channel_passive(ch_info) ||
1885                     (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1886                         scan_ch->type = 0;      /* passive */
1887                         if (IWL_UCODE_API(priv->ucode_ver) == 1)
1888                                 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1889                 } else {
1890                         scan_ch->type = 1;      /* active */
1891                 }
1892
1893                 /* Set direct probe bits. These may be used both for active
1894                  * scan channels (probes gets sent right away),
1895                  * or for passive channels (probes get se sent only after
1896                  * hearing clear Rx packet).*/
1897                 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1898                         if (n_probes)
1899                                 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1900                 } else {
1901                         /* uCode v1 does not allow setting direct probe bits on
1902                          * passive channel. */
1903                         if ((scan_ch->type & 1) && n_probes)
1904                                 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1905                 }
1906
1907                 /* Set txpower levels to defaults */
1908                 scan_ch->tpc.dsp_atten = 110;
1909                 /* scan_pwr_info->tpc.dsp_atten; */
1910
1911                 /*scan_pwr_info->tpc.tx_gain; */
1912                 if (band == IEEE80211_BAND_5GHZ)
1913                         scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1914                 else {
1915                         scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1916                         /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1917                          * power level:
1918                          * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1919                          */
1920                 }
1921
1922                 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1923                                scan_ch->channel,
1924                                (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1925                                (scan_ch->type & 1) ?
1926                                active_dwell : passive_dwell);
1927
1928                 scan_ch++;
1929                 added++;
1930         }
1931
1932         IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1933         return added;
1934 }
1935
1936 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1937                               struct ieee80211_rate *rates)
1938 {
1939         int i;
1940
1941         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1942                 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1943                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1944                 rates[i].hw_value_short = i;
1945                 rates[i].flags = 0;
1946                 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1947                         /*
1948                          * If CCK != 1M then set short preamble rate flag.
1949                          */
1950                         rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1951                                 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1952                 }
1953         }
1954 }
1955
1956 /******************************************************************************
1957  *
1958  * uCode download functions
1959  *
1960  ******************************************************************************/
1961
1962 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1963 {
1964         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1965         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1966         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1967         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1968         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1969         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1970 }
1971
1972 /**
1973  * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1974  *     looking at all data.
1975  */
1976 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1977 {
1978         u32 val;
1979         u32 save_len = len;
1980         int rc = 0;
1981         u32 errcnt;
1982
1983         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1984
1985         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1986                                IWL39_RTC_INST_LOWER_BOUND);
1987
1988         errcnt = 0;
1989         for (; len > 0; len -= sizeof(u32), image++) {
1990                 /* read data comes through single port, auto-incr addr */
1991                 /* NOTE: Use the debugless read so we don't flood kernel log
1992                  * if IWL_DL_IO is set */
1993                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1994                 if (val != le32_to_cpu(*image)) {
1995                         IWL_ERR(priv, "uCode INST section is invalid at "
1996                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
1997                                   save_len - len, val, le32_to_cpu(*image));
1998                         rc = -EIO;
1999                         errcnt++;
2000                         if (errcnt >= 20)
2001                                 break;
2002                 }
2003         }
2004
2005
2006         if (!errcnt)
2007                 IWL_DEBUG_INFO(priv,
2008                         "ucode image in INSTRUCTION memory is good\n");
2009
2010         return rc;
2011 }
2012
2013
2014 /**
2015  * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2016  *   using sample data 100 bytes apart.  If these sample points are good,
2017  *   it's a pretty good bet that everything between them is good, too.
2018  */
2019 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2020 {
2021         u32 val;
2022         int rc = 0;
2023         u32 errcnt = 0;
2024         u32 i;
2025
2026         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2027
2028         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2029                 /* read data comes through single port, auto-incr addr */
2030                 /* NOTE: Use the debugless read so we don't flood kernel log
2031                  * if IWL_DL_IO is set */
2032                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2033                         i + IWL39_RTC_INST_LOWER_BOUND);
2034                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2035                 if (val != le32_to_cpu(*image)) {
2036 #if 0 /* Enable this if you want to see details */
2037                         IWL_ERR(priv, "uCode INST section is invalid at "
2038                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2039                                   i, val, *image);
2040 #endif
2041                         rc = -EIO;
2042                         errcnt++;
2043                         if (errcnt >= 3)
2044                                 break;
2045                 }
2046         }
2047
2048         return rc;
2049 }
2050
2051
2052 /**
2053  * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2054  *    and verify its contents
2055  */
2056 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2057 {
2058         __le32 *image;
2059         u32 len;
2060         int rc = 0;
2061
2062         /* Try bootstrap */
2063         image = (__le32 *)priv->ucode_boot.v_addr;
2064         len = priv->ucode_boot.len;
2065         rc = iwl3945_verify_inst_sparse(priv, image, len);
2066         if (rc == 0) {
2067                 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2068                 return 0;
2069         }
2070
2071         /* Try initialize */
2072         image = (__le32 *)priv->ucode_init.v_addr;
2073         len = priv->ucode_init.len;
2074         rc = iwl3945_verify_inst_sparse(priv, image, len);
2075         if (rc == 0) {
2076                 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2077                 return 0;
2078         }
2079
2080         /* Try runtime/protocol */
2081         image = (__le32 *)priv->ucode_code.v_addr;
2082         len = priv->ucode_code.len;
2083         rc = iwl3945_verify_inst_sparse(priv, image, len);
2084         if (rc == 0) {
2085                 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2086                 return 0;
2087         }
2088
2089         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2090
2091         /* Since nothing seems to match, show first several data entries in
2092          * instruction SRAM, so maybe visual inspection will give a clue.
2093          * Selection of bootstrap image (vs. other images) is arbitrary. */
2094         image = (__le32 *)priv->ucode_boot.v_addr;
2095         len = priv->ucode_boot.len;
2096         rc = iwl3945_verify_inst_full(priv, image, len);
2097
2098         return rc;
2099 }
2100
2101 static void iwl3945_nic_start(struct iwl_priv *priv)
2102 {
2103         /* Remove all resets to allow NIC to operate */
2104         iwl_write32(priv, CSR_RESET, 0);
2105 }
2106
2107 #define IWL3945_UCODE_GET(item)                                         \
2108 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
2109 {                                                                       \
2110         return le32_to_cpu(ucode->u.v1.item);                           \
2111 }
2112
2113 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2114 {
2115         return 24;
2116 }
2117
2118 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
2119 {
2120         return (u8 *) ucode->u.v1.data;
2121 }
2122
2123 IWL3945_UCODE_GET(inst_size);
2124 IWL3945_UCODE_GET(data_size);
2125 IWL3945_UCODE_GET(init_size);
2126 IWL3945_UCODE_GET(init_data_size);
2127 IWL3945_UCODE_GET(boot_size);
2128
2129 /**
2130  * iwl3945_read_ucode - Read uCode images from disk file.
2131  *
2132  * Copy into buffers for card to fetch via bus-mastering
2133  */
2134 static int iwl3945_read_ucode(struct iwl_priv *priv)
2135 {
2136         const struct iwl_ucode_header *ucode;
2137         int ret = -EINVAL, index;
2138         const struct firmware *ucode_raw;
2139         /* firmware file name contains uCode/driver compatibility version */
2140         const char *name_pre = priv->cfg->fw_name_pre;
2141         const unsigned int api_max = priv->cfg->ucode_api_max;
2142         const unsigned int api_min = priv->cfg->ucode_api_min;
2143         char buf[25];
2144         u8 *src;
2145         size_t len;
2146         u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2147
2148         /* Ask kernel firmware_class module to get the boot firmware off disk.
2149          * request_firmware() is synchronous, file is in memory on return. */
2150         for (index = api_max; index >= api_min; index--) {
2151                 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2152                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2153                 if (ret < 0) {
2154                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
2155                                   buf, ret);
2156                         if (ret == -ENOENT)
2157                                 continue;
2158                         else
2159                                 goto error;
2160                 } else {
2161                         if (index < api_max)
2162                                 IWL_ERR(priv, "Loaded firmware %s, "
2163                                         "which is deprecated. "
2164                                         " Please use API v%u instead.\n",
2165                                           buf, api_max);
2166                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2167                                        "(%zd bytes) from disk\n",
2168                                        buf, ucode_raw->size);
2169                         break;
2170                 }
2171         }
2172
2173         if (ret < 0)
2174                 goto error;
2175
2176         /* Make sure that we got at least our header! */
2177         if (ucode_raw->size <  iwl3945_ucode_get_header_size(1)) {
2178                 IWL_ERR(priv, "File size way too small!\n");
2179                 ret = -EINVAL;
2180                 goto err_release;
2181         }
2182
2183         /* Data from ucode file:  header followed by uCode images */
2184         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2185
2186         priv->ucode_ver = le32_to_cpu(ucode->ver);
2187         api_ver = IWL_UCODE_API(priv->ucode_ver);
2188         inst_size = iwl3945_ucode_get_inst_size(ucode);
2189         data_size = iwl3945_ucode_get_data_size(ucode);
2190         init_size = iwl3945_ucode_get_init_size(ucode);
2191         init_data_size = iwl3945_ucode_get_init_data_size(ucode);
2192         boot_size = iwl3945_ucode_get_boot_size(ucode);
2193         src = iwl3945_ucode_get_data(ucode);
2194
2195         /* api_ver should match the api version forming part of the
2196          * firmware filename ... but we don't check for that and only rely
2197          * on the API version read from firmware header from here on forward */
2198
2199         if (api_ver < api_min || api_ver > api_max) {
2200                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2201                           "Driver supports v%u, firmware is v%u.\n",
2202                           api_max, api_ver);
2203                 priv->ucode_ver = 0;
2204                 ret = -EINVAL;
2205                 goto err_release;
2206         }
2207         if (api_ver != api_max)
2208                 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2209                           "got %u. New firmware can be obtained "
2210                           "from http://www.intellinuxwireless.org.\n",
2211                           api_max, api_ver);
2212
2213         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2214                 IWL_UCODE_MAJOR(priv->ucode_ver),
2215                 IWL_UCODE_MINOR(priv->ucode_ver),
2216                 IWL_UCODE_API(priv->ucode_ver),
2217                 IWL_UCODE_SERIAL(priv->ucode_ver));
2218
2219         snprintf(priv->hw->wiphy->fw_version,
2220                  sizeof(priv->hw->wiphy->fw_version),
2221                  "%u.%u.%u.%u",
2222                  IWL_UCODE_MAJOR(priv->ucode_ver),
2223                  IWL_UCODE_MINOR(priv->ucode_ver),
2224                  IWL_UCODE_API(priv->ucode_ver),
2225                  IWL_UCODE_SERIAL(priv->ucode_ver));
2226
2227         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2228                        priv->ucode_ver);
2229         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2230                        inst_size);
2231         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2232                        data_size);
2233         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2234                        init_size);
2235         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2236                        init_data_size);
2237         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2238                        boot_size);
2239
2240
2241         /* Verify size of file vs. image size info in file's header */
2242         if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
2243                 inst_size + data_size + init_size +
2244                 init_data_size + boot_size) {
2245
2246                 IWL_DEBUG_INFO(priv,
2247                         "uCode file size %zd does not match expected size\n",
2248                         ucode_raw->size);
2249                 ret = -EINVAL;
2250                 goto err_release;
2251         }
2252
2253         /* Verify that uCode images will fit in card's SRAM */
2254         if (inst_size > IWL39_MAX_INST_SIZE) {
2255                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2256                                inst_size);
2257                 ret = -EINVAL;
2258                 goto err_release;
2259         }
2260
2261         if (data_size > IWL39_MAX_DATA_SIZE) {
2262                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2263                                data_size);
2264                 ret = -EINVAL;
2265                 goto err_release;
2266         }
2267         if (init_size > IWL39_MAX_INST_SIZE) {
2268                 IWL_DEBUG_INFO(priv,
2269                                 "uCode init instr len %d too large to fit in\n",
2270                                 init_size);
2271                 ret = -EINVAL;
2272                 goto err_release;
2273         }
2274         if (init_data_size > IWL39_MAX_DATA_SIZE) {
2275                 IWL_DEBUG_INFO(priv,
2276                                 "uCode init data len %d too large to fit in\n",
2277                                 init_data_size);
2278                 ret = -EINVAL;
2279                 goto err_release;
2280         }
2281         if (boot_size > IWL39_MAX_BSM_SIZE) {
2282                 IWL_DEBUG_INFO(priv,
2283                                 "uCode boot instr len %d too large to fit in\n",
2284                                 boot_size);
2285                 ret = -EINVAL;
2286                 goto err_release;
2287         }
2288
2289         /* Allocate ucode buffers for card's bus-master loading ... */
2290
2291         /* Runtime instructions and 2 copies of data:
2292          * 1) unmodified from disk
2293          * 2) backup cache for save/restore during power-downs */
2294         priv->ucode_code.len = inst_size;
2295         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2296
2297         priv->ucode_data.len = data_size;
2298         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2299
2300         priv->ucode_data_backup.len = data_size;
2301         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2302
2303         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2304             !priv->ucode_data_backup.v_addr)
2305                 goto err_pci_alloc;
2306
2307         /* Initialization instructions and data */
2308         if (init_size && init_data_size) {
2309                 priv->ucode_init.len = init_size;
2310                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2311
2312                 priv->ucode_init_data.len = init_data_size;
2313                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2314
2315                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2316                         goto err_pci_alloc;
2317         }
2318
2319         /* Bootstrap (instructions only, no data) */
2320         if (boot_size) {
2321                 priv->ucode_boot.len = boot_size;
2322                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2323
2324                 if (!priv->ucode_boot.v_addr)
2325                         goto err_pci_alloc;
2326         }
2327
2328         /* Copy images into buffers for card's bus-master reads ... */
2329
2330         /* Runtime instructions (first block of data in file) */
2331         len = inst_size;
2332         IWL_DEBUG_INFO(priv,
2333                 "Copying (but not loading) uCode instr len %zd\n", len);
2334         memcpy(priv->ucode_code.v_addr, src, len);
2335         src += len;
2336
2337         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2338                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2339
2340         /* Runtime data (2nd block)
2341          * NOTE:  Copy into backup buffer will be done in iwl3945_up()  */
2342         len = data_size;
2343         IWL_DEBUG_INFO(priv,
2344                 "Copying (but not loading) uCode data len %zd\n", len);
2345         memcpy(priv->ucode_data.v_addr, src, len);
2346         memcpy(priv->ucode_data_backup.v_addr, src, len);
2347         src += len;
2348
2349         /* Initialization instructions (3rd block) */
2350         if (init_size) {
2351                 len = init_size;
2352                 IWL_DEBUG_INFO(priv,
2353                         "Copying (but not loading) init instr len %zd\n", len);
2354                 memcpy(priv->ucode_init.v_addr, src, len);
2355                 src += len;
2356         }
2357
2358         /* Initialization data (4th block) */
2359         if (init_data_size) {
2360                 len = init_data_size;
2361                 IWL_DEBUG_INFO(priv,
2362                         "Copying (but not loading) init data len %zd\n", len);
2363                 memcpy(priv->ucode_init_data.v_addr, src, len);
2364                 src += len;
2365         }
2366
2367         /* Bootstrap instructions (5th block) */
2368         len = boot_size;
2369         IWL_DEBUG_INFO(priv,
2370                 "Copying (but not loading) boot instr len %zd\n", len);
2371         memcpy(priv->ucode_boot.v_addr, src, len);
2372
2373         /* We have our copies now, allow OS release its copies */
2374         release_firmware(ucode_raw);
2375         return 0;
2376
2377  err_pci_alloc:
2378         IWL_ERR(priv, "failed to allocate pci memory\n");
2379         ret = -ENOMEM;
2380         iwl3945_dealloc_ucode_pci(priv);
2381
2382  err_release:
2383         release_firmware(ucode_raw);
2384
2385  error:
2386         return ret;
2387 }
2388
2389
2390 /**
2391  * iwl3945_set_ucode_ptrs - Set uCode address location
2392  *
2393  * Tell initialization uCode where to find runtime uCode.
2394  *
2395  * BSM registers initially contain pointers to initialization uCode.
2396  * We need to replace them to load runtime uCode inst and data,
2397  * and to save runtime data when powering down.
2398  */
2399 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2400 {
2401         dma_addr_t pinst;
2402         dma_addr_t pdata;
2403
2404         /* bits 31:0 for 3945 */
2405         pinst = priv->ucode_code.p_addr;
2406         pdata = priv->ucode_data_backup.p_addr;
2407
2408         /* Tell bootstrap uCode where to find image to load */
2409         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2410         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2411         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2412                                  priv->ucode_data.len);
2413
2414         /* Inst byte count must be last to set up, bit 31 signals uCode
2415          *   that all new ptr/size info is in place */
2416         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2417                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2418
2419         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2420
2421         return 0;
2422 }
2423
2424 /**
2425  * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2426  *
2427  * Called after REPLY_ALIVE notification received from "initialize" uCode.
2428  *
2429  * Tell "initialize" uCode to go ahead and load the runtime uCode.
2430  */
2431 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2432 {
2433         /* Check alive response for "valid" sign from uCode */
2434         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2435                 /* We had an error bringing up the hardware, so take it
2436                  * all the way back down so we can try again */
2437                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2438                 goto restart;
2439         }
2440
2441         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2442          * This is a paranoid check, because we would not have gotten the
2443          * "initialize" alive if code weren't properly loaded.  */
2444         if (iwl3945_verify_ucode(priv)) {
2445                 /* Runtime instruction load was bad;
2446                  * take it all the way back down so we can try again */
2447                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2448                 goto restart;
2449         }
2450
2451         /* Send pointers to protocol/runtime uCode image ... init code will
2452          * load and launch runtime uCode, which will send us another "Alive"
2453          * notification. */
2454         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2455         if (iwl3945_set_ucode_ptrs(priv)) {
2456                 /* Runtime instruction load won't happen;
2457                  * take it all the way back down so we can try again */
2458                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2459                 goto restart;
2460         }
2461         return;
2462
2463  restart:
2464         queue_work(priv->workqueue, &priv->restart);
2465 }
2466
2467 /**
2468  * iwl3945_alive_start - called after REPLY_ALIVE notification received
2469  *                   from protocol/runtime uCode (initialization uCode's
2470  *                   Alive gets handled by iwl3945_init_alive_start()).
2471  */
2472 static void iwl3945_alive_start(struct iwl_priv *priv)
2473 {
2474         int thermal_spin = 0;
2475         u32 rfkill;
2476         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2477
2478         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2479
2480         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2481                 /* We had an error bringing up the hardware, so take it
2482                  * all the way back down so we can try again */
2483                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2484                 goto restart;
2485         }
2486
2487         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2488          * This is a paranoid check, because we would not have gotten the
2489          * "runtime" alive if code weren't properly loaded.  */
2490         if (iwl3945_verify_ucode(priv)) {
2491                 /* Runtime instruction load was bad;
2492                  * take it all the way back down so we can try again */
2493                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2494                 goto restart;
2495         }
2496
2497         rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2498         IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2499
2500         if (rfkill & 0x1) {
2501                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2502                 /* if RFKILL is not on, then wait for thermal
2503                  * sensor in adapter to kick in */
2504                 while (iwl3945_hw_get_temperature(priv) == 0) {
2505                         thermal_spin++;
2506                         udelay(10);
2507                 }
2508
2509                 if (thermal_spin)
2510                         IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2511                                        thermal_spin * 10);
2512         } else
2513                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2514
2515         /* After the ALIVE response, we can send commands to 3945 uCode */
2516         set_bit(STATUS_ALIVE, &priv->status);
2517
2518         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2519                 /* Enable timer to monitor the driver queues */
2520                 mod_timer(&priv->monitor_recover,
2521                         jiffies +
2522                         msecs_to_jiffies(
2523                           priv->cfg->base_params->monitor_recover_period));
2524         }
2525
2526         if (iwl_is_rfkill(priv))
2527                 return;
2528
2529         ieee80211_wake_queues(priv->hw);
2530
2531         priv->active_rate = IWL_RATES_MASK;
2532
2533         iwl_power_update_mode(priv, true);
2534
2535         if (iwl_is_associated(priv, IWL_RXON_CTX_BSS)) {
2536                 struct iwl3945_rxon_cmd *active_rxon =
2537                                 (struct iwl3945_rxon_cmd *)(&ctx->active);
2538
2539                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2540                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2541         } else {
2542                 /* Initialize our rx_config data */
2543                 iwl_connection_init_rx_config(priv, ctx);
2544         }
2545
2546         /* Configure Bluetooth device coexistence support */
2547         priv->cfg->ops->hcmd->send_bt_config(priv);
2548
2549         /* Configure the adapter for unassociated operation */
2550         iwl3945_commit_rxon(priv, ctx);
2551
2552         iwl3945_reg_txpower_periodic(priv);
2553
2554         iwl_leds_init(priv);
2555
2556         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2557         set_bit(STATUS_READY, &priv->status);
2558         wake_up_interruptible(&priv->wait_command_queue);
2559
2560         return;
2561
2562  restart:
2563         queue_work(priv->workqueue, &priv->restart);
2564 }
2565
2566 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2567
2568 static void __iwl3945_down(struct iwl_priv *priv)
2569 {
2570         unsigned long flags;
2571         int exit_pending;
2572
2573         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2574
2575         iwl_scan_cancel_timeout(priv, 200);
2576
2577         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2578
2579         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2580          * to prevent rearm timer */
2581         if (priv->cfg->ops->lib->recover_from_tx_stall)
2582                 del_timer_sync(&priv->monitor_recover);
2583
2584         /* Station information will now be cleared in device */
2585         iwl_clear_ucode_stations(priv, NULL);
2586         iwl_dealloc_bcast_stations(priv);
2587         iwl_clear_driver_stations(priv);
2588
2589         /* Unblock any waiting calls */
2590         wake_up_interruptible_all(&priv->wait_command_queue);
2591
2592         /* Wipe out the EXIT_PENDING status bit if we are not actually
2593          * exiting the module */
2594         if (!exit_pending)
2595                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2596
2597         /* stop and reset the on-board processor */
2598         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2599
2600         /* tell the device to stop sending interrupts */
2601         spin_lock_irqsave(&priv->lock, flags);
2602         iwl_disable_interrupts(priv);
2603         spin_unlock_irqrestore(&priv->lock, flags);
2604         iwl_synchronize_irq(priv);
2605
2606         if (priv->mac80211_registered)
2607                 ieee80211_stop_queues(priv->hw);
2608
2609         /* If we have not previously called iwl3945_init() then
2610          * clear all bits but the RF Kill bits and return */
2611         if (!iwl_is_init(priv)) {
2612                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2613                                         STATUS_RF_KILL_HW |
2614                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2615                                         STATUS_GEO_CONFIGURED |
2616                                 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2617                                         STATUS_EXIT_PENDING;
2618                 goto exit;
2619         }
2620
2621         /* ...otherwise clear out all the status bits but the RF Kill
2622          * bit and continue taking the NIC down. */
2623         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2624                                 STATUS_RF_KILL_HW |
2625                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2626                                 STATUS_GEO_CONFIGURED |
2627                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2628                                 STATUS_FW_ERROR |
2629                         test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2630                                 STATUS_EXIT_PENDING;
2631
2632         iwl3945_hw_txq_ctx_stop(priv);
2633         iwl3945_hw_rxq_stop(priv);
2634
2635         /* Power-down device's busmaster DMA clocks */
2636         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2637         udelay(5);
2638
2639         /* Stop the device, and put it in low power state */
2640         iwl_apm_stop(priv);
2641
2642  exit:
2643         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2644
2645         if (priv->beacon_skb)
2646                 dev_kfree_skb(priv->beacon_skb);
2647         priv->beacon_skb = NULL;
2648
2649         /* clear out any free frames */
2650         iwl3945_clear_free_frames(priv);
2651 }
2652
2653 static void iwl3945_down(struct iwl_priv *priv)
2654 {
2655         mutex_lock(&priv->mutex);
2656         __iwl3945_down(priv);
2657         mutex_unlock(&priv->mutex);
2658
2659         iwl3945_cancel_deferred_work(priv);
2660 }
2661
2662 #define MAX_HW_RESTARTS 5
2663
2664 static int iwl3945_alloc_bcast_station(struct iwl_priv *priv)
2665 {
2666         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2667         unsigned long flags;
2668         u8 sta_id;
2669
2670         spin_lock_irqsave(&priv->sta_lock, flags);
2671         sta_id = iwl_prep_station(priv, ctx, iwl_bcast_addr, false, NULL);
2672         if (sta_id == IWL_INVALID_STATION) {
2673                 IWL_ERR(priv, "Unable to prepare broadcast station\n");
2674                 spin_unlock_irqrestore(&priv->sta_lock, flags);
2675
2676                 return -EINVAL;
2677         }
2678
2679         priv->stations[sta_id].used |= IWL_STA_DRIVER_ACTIVE;
2680         priv->stations[sta_id].used |= IWL_STA_BCAST;
2681         spin_unlock_irqrestore(&priv->sta_lock, flags);
2682
2683         return 0;
2684 }
2685
2686 static int __iwl3945_up(struct iwl_priv *priv)
2687 {
2688         int rc, i;
2689
2690         rc = iwl3945_alloc_bcast_station(priv);
2691         if (rc)
2692                 return rc;
2693
2694         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2695                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2696                 return -EIO;
2697         }
2698
2699         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2700                 IWL_ERR(priv, "ucode not available for device bring up\n");
2701                 return -EIO;
2702         }
2703
2704         /* If platform's RF_KILL switch is NOT set to KILL */
2705         if (iwl_read32(priv, CSR_GP_CNTRL) &
2706                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2707                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2708         else {
2709                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2710                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2711                 return -ENODEV;
2712         }
2713
2714         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2715
2716         rc = iwl3945_hw_nic_init(priv);
2717         if (rc) {
2718                 IWL_ERR(priv, "Unable to int nic\n");
2719                 return rc;
2720         }
2721
2722         /* make sure rfkill handshake bits are cleared */
2723         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2724         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2725                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2726
2727         /* clear (again), then enable host interrupts */
2728         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2729         iwl_enable_interrupts(priv);
2730
2731         /* really make sure rfkill handshake bits are cleared */
2732         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2733         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2734
2735         /* Copy original ucode data image from disk into backup cache.
2736          * This will be used to initialize the on-board processor's
2737          * data SRAM for a clean start when the runtime program first loads. */
2738         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2739                priv->ucode_data.len);
2740
2741         /* We return success when we resume from suspend and rf_kill is on. */
2742         if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2743                 return 0;
2744
2745         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2746
2747                 /* load bootstrap state machine,
2748                  * load bootstrap program into processor's memory,
2749                  * prepare to load the "initialize" uCode */
2750                 rc = priv->cfg->ops->lib->load_ucode(priv);
2751
2752                 if (rc) {
2753                         IWL_ERR(priv,
2754                                 "Unable to set up bootstrap uCode: %d\n", rc);
2755                         continue;
2756                 }
2757
2758                 /* start card; "initialize" will load runtime ucode */
2759                 iwl3945_nic_start(priv);
2760
2761                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2762
2763                 return 0;
2764         }
2765
2766         set_bit(STATUS_EXIT_PENDING, &priv->status);
2767         __iwl3945_down(priv);
2768         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2769
2770         /* tried to restart and config the device for as long as our
2771          * patience could withstand */
2772         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2773         return -EIO;
2774 }
2775
2776
2777 /*****************************************************************************
2778  *
2779  * Workqueue callbacks
2780  *
2781  *****************************************************************************/
2782
2783 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2784 {
2785         struct iwl_priv *priv =
2786             container_of(data, struct iwl_priv, init_alive_start.work);
2787
2788         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2789                 return;
2790
2791         mutex_lock(&priv->mutex);
2792         iwl3945_init_alive_start(priv);
2793         mutex_unlock(&priv->mutex);
2794 }
2795
2796 static void iwl3945_bg_alive_start(struct work_struct *data)
2797 {
2798         struct iwl_priv *priv =
2799             container_of(data, struct iwl_priv, alive_start.work);
2800
2801         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2802                 return;
2803
2804         mutex_lock(&priv->mutex);
2805         iwl3945_alive_start(priv);
2806         mutex_unlock(&priv->mutex);
2807 }
2808
2809 /*
2810  * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2811  * driver must poll CSR_GP_CNTRL_REG register for change.  This register
2812  * *is* readable even when device has been SW_RESET into low power mode
2813  * (e.g. during RF KILL).
2814  */
2815 static void iwl3945_rfkill_poll(struct work_struct *data)
2816 {
2817         struct iwl_priv *priv =
2818             container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2819         bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2820         bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2821                         & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2822
2823         if (new_rfkill != old_rfkill) {
2824                 if (new_rfkill)
2825                         set_bit(STATUS_RF_KILL_HW, &priv->status);
2826                 else
2827                         clear_bit(STATUS_RF_KILL_HW, &priv->status);
2828
2829                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2830
2831                 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2832                                 new_rfkill ? "disable radio" : "enable radio");
2833         }
2834
2835         /* Keep this running, even if radio now enabled.  This will be
2836          * cancelled in mac_start() if system decides to start again */
2837         queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2838                            round_jiffies_relative(2 * HZ));
2839
2840 }
2841
2842 int iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
2843 {
2844         struct iwl_host_cmd cmd = {
2845                 .id = REPLY_SCAN_CMD,
2846                 .len = sizeof(struct iwl3945_scan_cmd),
2847                 .flags = CMD_SIZE_HUGE,
2848         };
2849         struct iwl3945_scan_cmd *scan;
2850         u8 n_probes = 0;
2851         enum ieee80211_band band;
2852         bool is_active = false;
2853         int ret;
2854
2855         lockdep_assert_held(&priv->mutex);
2856
2857         if (!priv->scan_cmd) {
2858                 priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2859                                          IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2860                 if (!priv->scan_cmd) {
2861                         IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2862                         return -ENOMEM;
2863                 }
2864         }
2865         scan = priv->scan_cmd;
2866         memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2867
2868         scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2869         scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2870
2871         if (iwl_is_associated(priv, IWL_RXON_CTX_BSS)) {
2872                 u16 interval = 0;
2873                 u32 extra;
2874                 u32 suspend_time = 100;
2875                 u32 scan_suspend_time = 100;
2876                 unsigned long flags;
2877
2878                 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2879
2880                 spin_lock_irqsave(&priv->lock, flags);
2881                 if (priv->is_internal_short_scan)
2882                         interval = 0;
2883                 else
2884                         interval = vif->bss_conf.beacon_int;
2885                 spin_unlock_irqrestore(&priv->lock, flags);
2886
2887                 scan->suspend_time = 0;
2888                 scan->max_out_time = cpu_to_le32(200 * 1024);
2889                 if (!interval)
2890                         interval = suspend_time;
2891                 /*
2892                  * suspend time format:
2893                  *  0-19: beacon interval in usec (time before exec.)
2894                  * 20-23: 0
2895                  * 24-31: number of beacons (suspend between channels)
2896                  */
2897
2898                 extra = (suspend_time / interval) << 24;
2899                 scan_suspend_time = 0xFF0FFFFF &
2900                     (extra | ((suspend_time % interval) * 1024));
2901
2902                 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2903                 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2904                                scan_suspend_time, interval);
2905         }
2906
2907         if (priv->is_internal_short_scan) {
2908                 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2909         } else if (priv->scan_request->n_ssids) {
2910                 int i, p = 0;
2911                 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2912                 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2913                         /* always does wildcard anyway */
2914                         if (!priv->scan_request->ssids[i].ssid_len)
2915                                 continue;
2916                         scan->direct_scan[p].id = WLAN_EID_SSID;
2917                         scan->direct_scan[p].len =
2918                                 priv->scan_request->ssids[i].ssid_len;
2919                         memcpy(scan->direct_scan[p].ssid,
2920                                priv->scan_request->ssids[i].ssid,
2921                                priv->scan_request->ssids[i].ssid_len);
2922                         n_probes++;
2923                         p++;
2924                 }
2925                 is_active = true;
2926         } else
2927                 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2928
2929         /* We don't build a direct scan probe request; the uCode will do
2930          * that based on the direct_mask added to each channel entry */
2931         scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2932         scan->tx_cmd.sta_id = priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
2933         scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2934
2935         /* flags + rate selection */
2936
2937         switch (priv->scan_band) {
2938         case IEEE80211_BAND_2GHZ:
2939                 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2940                 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2941                 band = IEEE80211_BAND_2GHZ;
2942                 break;
2943         case IEEE80211_BAND_5GHZ:
2944                 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2945                 band = IEEE80211_BAND_5GHZ;
2946                 break;
2947         default:
2948                 IWL_WARN(priv, "Invalid scan band\n");
2949                 return -EIO;
2950         }
2951
2952         /*
2953          * If active scaning is requested but a certain channel
2954          * is marked passive, we can do active scanning if we
2955          * detect transmissions.
2956          */
2957         scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2958                                         IWL_GOOD_CRC_TH_DISABLED;
2959
2960         if (!priv->is_internal_short_scan) {
2961                 scan->tx_cmd.len = cpu_to_le16(
2962                         iwl_fill_probe_req(priv,
2963                                 (struct ieee80211_mgmt *)scan->data,
2964                                 vif->addr,
2965                                 priv->scan_request->ie,
2966                                 priv->scan_request->ie_len,
2967                                 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2968         } else {
2969                 /* use bcast addr, will not be transmitted but must be valid */
2970                 scan->tx_cmd.len = cpu_to_le16(
2971                         iwl_fill_probe_req(priv,
2972                                 (struct ieee80211_mgmt *)scan->data,
2973                                 iwl_bcast_addr, NULL, 0,
2974                                 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2975         }
2976         /* select Rx antennas */
2977         scan->flags |= iwl3945_get_antenna_flags(priv);
2978
2979         if (priv->is_internal_short_scan) {
2980                 scan->channel_count =
2981                         iwl3945_get_single_channel_for_scan(priv, vif, band,
2982                                 (void *)&scan->data[le16_to_cpu(
2983                                 scan->tx_cmd.len)]);
2984         } else {
2985                 scan->channel_count =
2986                         iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2987                                 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
2988         }
2989
2990         if (scan->channel_count == 0) {
2991                 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2992                 return -EIO;
2993         }
2994
2995         cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2996             scan->channel_count * sizeof(struct iwl3945_scan_channel);
2997         cmd.data = scan;
2998         scan->len = cpu_to_le16(cmd.len);
2999
3000         set_bit(STATUS_SCAN_HW, &priv->status);
3001         ret = iwl_send_cmd_sync(priv, &cmd);
3002         if (ret)
3003                 clear_bit(STATUS_SCAN_HW, &priv->status);
3004         return ret;
3005 }
3006
3007 void iwl3945_post_scan(struct iwl_priv *priv)
3008 {
3009         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3010
3011         /*
3012          * Since setting the RXON may have been deferred while
3013          * performing the scan, fire one off if needed
3014          */
3015         if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
3016                 iwl3945_commit_rxon(priv, ctx);
3017 }
3018
3019 static void iwl3945_bg_restart(struct work_struct *data)
3020 {
3021         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3022
3023         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3024                 return;
3025
3026         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3027                 struct iwl_rxon_context *ctx;
3028                 mutex_lock(&priv->mutex);
3029                 for_each_context(priv, ctx)
3030                         ctx->vif = NULL;
3031                 priv->is_open = 0;
3032                 mutex_unlock(&priv->mutex);
3033                 iwl3945_down(priv);
3034                 ieee80211_restart_hw(priv->hw);
3035         } else {
3036                 iwl3945_down(priv);
3037
3038                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3039                         return;
3040
3041                 mutex_lock(&priv->mutex);
3042                 __iwl3945_up(priv);
3043                 mutex_unlock(&priv->mutex);
3044         }
3045 }
3046
3047 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3048 {
3049         struct iwl_priv *priv =
3050             container_of(data, struct iwl_priv, rx_replenish);
3051
3052         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3053                 return;
3054
3055         mutex_lock(&priv->mutex);
3056         iwl3945_rx_replenish(priv);
3057         mutex_unlock(&priv->mutex);
3058 }