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1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/ieee80211_radiotap.h>
49 #include <net/mac80211.h>
50
51 #include <asm/div64.h>
52
53 #define DRV_NAME        "iwl3945"
54
55 #include "iwl-fh.h"
56 #include "iwl-3945-fh.h"
57 #include "iwl-commands.h"
58 #include "iwl-sta.h"
59 #include "iwl-3945.h"
60 #include "iwl-core.h"
61 #include "iwl-helpers.h"
62 #include "iwl-dev.h"
63 #include "iwl-spectrum.h"
64 #include "iwl-legacy.h"
65
66 /*
67  * module name, copyright, version, etc.
68  */
69
70 #define DRV_DESCRIPTION \
71 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
72
73 #ifdef CONFIG_IWLWIFI_DEBUG
74 #define VD "d"
75 #else
76 #define VD
77 #endif
78
79 /*
80  * add "s" to indicate spectrum measurement included.
81  * we add it here to be consistent with previous releases in which
82  * this was configurable.
83  */
84 #define DRV_VERSION  IWLWIFI_VERSION VD "s"
85 #define DRV_COPYRIGHT   "Copyright(c) 2003-2010 Intel Corporation"
86 #define DRV_AUTHOR     "<ilw@linux.intel.com>"
87
88 MODULE_DESCRIPTION(DRV_DESCRIPTION);
89 MODULE_VERSION(DRV_VERSION);
90 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
91 MODULE_LICENSE("GPL");
92
93  /* module parameters */
94 struct iwl_mod_params iwl3945_mod_params = {
95         .sw_crypto = 1,
96         .restart_fw = 1,
97         /* the rest are 0 by default */
98 };
99
100 /**
101  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
102  * @priv: eeprom and antenna fields are used to determine antenna flags
103  *
104  * priv->eeprom39  is used to determine if antenna AUX/MAIN are reversed
105  * iwl3945_mod_params.antenna specifies the antenna diversity mode:
106  *
107  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
108  * IWL_ANTENNA_MAIN      - Force MAIN antenna
109  * IWL_ANTENNA_AUX       - Force AUX antenna
110  */
111 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
112 {
113         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
114
115         switch (iwl3945_mod_params.antenna) {
116         case IWL_ANTENNA_DIVERSITY:
117                 return 0;
118
119         case IWL_ANTENNA_MAIN:
120                 if (eeprom->antenna_switch_type)
121                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
122                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
123
124         case IWL_ANTENNA_AUX:
125                 if (eeprom->antenna_switch_type)
126                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
127                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
128         }
129
130         /* bad antenna selector value */
131         IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
132                 iwl3945_mod_params.antenna);
133
134         return 0;               /* "diversity" is default if error */
135 }
136
137 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
138                                    struct ieee80211_key_conf *keyconf,
139                                    u8 sta_id)
140 {
141         unsigned long flags;
142         __le16 key_flags = 0;
143         int ret;
144
145         key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
146         key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
147
148         if (sta_id == priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id)
149                 key_flags |= STA_KEY_MULTICAST_MSK;
150
151         keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
152         keyconf->hw_key_idx = keyconf->keyidx;
153         key_flags &= ~STA_KEY_FLG_INVALID;
154
155         spin_lock_irqsave(&priv->sta_lock, flags);
156         priv->stations[sta_id].keyinfo.cipher = keyconf->cipher;
157         priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
158         memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
159                keyconf->keylen);
160
161         memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
162                keyconf->keylen);
163
164         if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
165                         == STA_KEY_FLG_NO_ENC)
166                 priv->stations[sta_id].sta.key.key_offset =
167                                  iwl_get_free_ucode_key_index(priv);
168         /* else, we are overriding an existing key => no need to allocated room
169         * in uCode. */
170
171         WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
172                 "no space for a new key");
173
174         priv->stations[sta_id].sta.key.key_flags = key_flags;
175         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
176         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
177
178         IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
179
180         ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
181
182         spin_unlock_irqrestore(&priv->sta_lock, flags);
183
184         return ret;
185 }
186
187 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
188                                   struct ieee80211_key_conf *keyconf,
189                                   u8 sta_id)
190 {
191         return -EOPNOTSUPP;
192 }
193
194 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
195                                   struct ieee80211_key_conf *keyconf,
196                                   u8 sta_id)
197 {
198         return -EOPNOTSUPP;
199 }
200
201 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
202 {
203         unsigned long flags;
204         struct iwl_addsta_cmd sta_cmd;
205
206         spin_lock_irqsave(&priv->sta_lock, flags);
207         memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
208         memset(&priv->stations[sta_id].sta.key, 0,
209                 sizeof(struct iwl4965_keyinfo));
210         priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
211         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
212         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
213         memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
214         spin_unlock_irqrestore(&priv->sta_lock, flags);
215
216         IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
217         return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
218 }
219
220 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
221                         struct ieee80211_key_conf *keyconf, u8 sta_id)
222 {
223         int ret = 0;
224
225         keyconf->hw_key_idx = HW_KEY_DYNAMIC;
226
227         switch (keyconf->cipher) {
228         case WLAN_CIPHER_SUITE_CCMP:
229                 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
230                 break;
231         case WLAN_CIPHER_SUITE_TKIP:
232                 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
233                 break;
234         case WLAN_CIPHER_SUITE_WEP40:
235         case WLAN_CIPHER_SUITE_WEP104:
236                 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
237                 break;
238         default:
239                 IWL_ERR(priv, "Unknown alg: %s alg=%x\n", __func__,
240                         keyconf->cipher);
241                 ret = -EINVAL;
242         }
243
244         IWL_DEBUG_WEP(priv, "Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
245                       keyconf->cipher, keyconf->keylen, keyconf->keyidx,
246                       sta_id, ret);
247
248         return ret;
249 }
250
251 static int iwl3945_remove_static_key(struct iwl_priv *priv)
252 {
253         int ret = -EOPNOTSUPP;
254
255         return ret;
256 }
257
258 static int iwl3945_set_static_key(struct iwl_priv *priv,
259                                 struct ieee80211_key_conf *key)
260 {
261         if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
262             key->cipher == WLAN_CIPHER_SUITE_WEP104)
263                 return -EOPNOTSUPP;
264
265         IWL_ERR(priv, "Static key invalid: cipher %x\n", key->cipher);
266         return -EINVAL;
267 }
268
269 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
270 {
271         struct list_head *element;
272
273         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
274                        priv->frames_count);
275
276         while (!list_empty(&priv->free_frames)) {
277                 element = priv->free_frames.next;
278                 list_del(element);
279                 kfree(list_entry(element, struct iwl3945_frame, list));
280                 priv->frames_count--;
281         }
282
283         if (priv->frames_count) {
284                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
285                             priv->frames_count);
286                 priv->frames_count = 0;
287         }
288 }
289
290 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
291 {
292         struct iwl3945_frame *frame;
293         struct list_head *element;
294         if (list_empty(&priv->free_frames)) {
295                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
296                 if (!frame) {
297                         IWL_ERR(priv, "Could not allocate frame!\n");
298                         return NULL;
299                 }
300
301                 priv->frames_count++;
302                 return frame;
303         }
304
305         element = priv->free_frames.next;
306         list_del(element);
307         return list_entry(element, struct iwl3945_frame, list);
308 }
309
310 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
311 {
312         memset(frame, 0, sizeof(*frame));
313         list_add(&frame->list, &priv->free_frames);
314 }
315
316 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
317                                 struct ieee80211_hdr *hdr,
318                                 int left)
319 {
320
321         if (!iwl_is_associated(priv, IWL_RXON_CTX_BSS) || !priv->beacon_skb)
322                 return 0;
323
324         if (priv->beacon_skb->len > left)
325                 return 0;
326
327         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
328
329         return priv->beacon_skb->len;
330 }
331
332 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
333 {
334         struct iwl3945_frame *frame;
335         unsigned int frame_size;
336         int rc;
337         u8 rate;
338
339         frame = iwl3945_get_free_frame(priv);
340
341         if (!frame) {
342                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
343                           "command.\n");
344                 return -ENOMEM;
345         }
346
347         rate = iwl_rate_get_lowest_plcp(priv,
348                                 &priv->contexts[IWL_RXON_CTX_BSS]);
349
350         frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
351
352         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
353                               &frame->u.cmd[0]);
354
355         iwl3945_free_frame(priv, frame);
356
357         return rc;
358 }
359
360 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
361 {
362         if (priv->_3945.shared_virt)
363                 dma_free_coherent(&priv->pci_dev->dev,
364                                   sizeof(struct iwl3945_shared),
365                                   priv->_3945.shared_virt,
366                                   priv->_3945.shared_phys);
367 }
368
369 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
370                                       struct ieee80211_tx_info *info,
371                                       struct iwl_device_cmd *cmd,
372                                       struct sk_buff *skb_frag,
373                                       int sta_id)
374 {
375         struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
376         struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
377
378         tx_cmd->sec_ctl = 0;
379
380         switch (keyinfo->cipher) {
381         case WLAN_CIPHER_SUITE_CCMP:
382                 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
383                 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
384                 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
385                 break;
386
387         case WLAN_CIPHER_SUITE_TKIP:
388                 break;
389
390         case WLAN_CIPHER_SUITE_WEP104:
391                 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
392                 /* fall through */
393         case WLAN_CIPHER_SUITE_WEP40:
394                 tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
395                     (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
396
397                 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
398
399                 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
400                              "with key %d\n", info->control.hw_key->hw_key_idx);
401                 break;
402
403         default:
404                 IWL_ERR(priv, "Unknown encode cipher %x\n", keyinfo->cipher);
405                 break;
406         }
407 }
408
409 /*
410  * handle build REPLY_TX command notification.
411  */
412 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
413                                   struct iwl_device_cmd *cmd,
414                                   struct ieee80211_tx_info *info,
415                                   struct ieee80211_hdr *hdr, u8 std_id)
416 {
417         struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
418         __le32 tx_flags = tx_cmd->tx_flags;
419         __le16 fc = hdr->frame_control;
420
421         tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
422         if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
423                 tx_flags |= TX_CMD_FLG_ACK_MSK;
424                 if (ieee80211_is_mgmt(fc))
425                         tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
426                 if (ieee80211_is_probe_resp(fc) &&
427                     !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
428                         tx_flags |= TX_CMD_FLG_TSF_MSK;
429         } else {
430                 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
431                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
432         }
433
434         tx_cmd->sta_id = std_id;
435         if (ieee80211_has_morefrags(fc))
436                 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
437
438         if (ieee80211_is_data_qos(fc)) {
439                 u8 *qc = ieee80211_get_qos_ctl(hdr);
440                 tx_cmd->tid_tspec = qc[0] & 0xf;
441                 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
442         } else {
443                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
444         }
445
446         priv->cfg->ops->utils->tx_cmd_protection(priv, info, fc, &tx_flags);
447
448         tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
449         if (ieee80211_is_mgmt(fc)) {
450                 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
451                         tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
452                 else
453                         tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
454         } else {
455                 tx_cmd->timeout.pm_frame_timeout = 0;
456         }
457
458         tx_cmd->driver_txop = 0;
459         tx_cmd->tx_flags = tx_flags;
460         tx_cmd->next_frame_len = 0;
461 }
462
463 /*
464  * start REPLY_TX command process
465  */
466 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
467 {
468         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
469         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
470         struct iwl3945_tx_cmd *tx_cmd;
471         struct iwl_tx_queue *txq = NULL;
472         struct iwl_queue *q = NULL;
473         struct iwl_device_cmd *out_cmd;
474         struct iwl_cmd_meta *out_meta;
475         dma_addr_t phys_addr;
476         dma_addr_t txcmd_phys;
477         int txq_id = skb_get_queue_mapping(skb);
478         u16 len, idx, hdr_len;
479         u8 id;
480         u8 unicast;
481         u8 sta_id;
482         u8 tid = 0;
483         __le16 fc;
484         u8 wait_write_ptr = 0;
485         unsigned long flags;
486
487         spin_lock_irqsave(&priv->lock, flags);
488         if (iwl_is_rfkill(priv)) {
489                 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
490                 goto drop_unlock;
491         }
492
493         if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
494                 IWL_ERR(priv, "ERROR: No TX rate available.\n");
495                 goto drop_unlock;
496         }
497
498         unicast = !is_multicast_ether_addr(hdr->addr1);
499         id = 0;
500
501         fc = hdr->frame_control;
502
503 #ifdef CONFIG_IWLWIFI_DEBUG
504         if (ieee80211_is_auth(fc))
505                 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
506         else if (ieee80211_is_assoc_req(fc))
507                 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
508         else if (ieee80211_is_reassoc_req(fc))
509                 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
510 #endif
511
512         spin_unlock_irqrestore(&priv->lock, flags);
513
514         hdr_len = ieee80211_hdrlen(fc);
515
516         /* Find index into station table for destination station */
517         sta_id = iwl_sta_id_or_broadcast(
518                         priv, &priv->contexts[IWL_RXON_CTX_BSS],
519                         info->control.sta);
520         if (sta_id == IWL_INVALID_STATION) {
521                 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
522                                hdr->addr1);
523                 goto drop;
524         }
525
526         IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
527
528         if (ieee80211_is_data_qos(fc)) {
529                 u8 *qc = ieee80211_get_qos_ctl(hdr);
530                 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
531                 if (unlikely(tid >= MAX_TID_COUNT))
532                         goto drop;
533         }
534
535         /* Descriptor for chosen Tx queue */
536         txq = &priv->txq[txq_id];
537         q = &txq->q;
538
539         if ((iwl_queue_space(q) < q->high_mark))
540                 goto drop;
541
542         spin_lock_irqsave(&priv->lock, flags);
543
544         idx = get_cmd_index(q, q->write_ptr, 0);
545
546         /* Set up driver data for this TFD */
547         memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
548         txq->txb[q->write_ptr].skb = skb;
549         txq->txb[q->write_ptr].ctx = &priv->contexts[IWL_RXON_CTX_BSS];
550
551         /* Init first empty entry in queue's array of Tx/cmd buffers */
552         out_cmd = txq->cmd[idx];
553         out_meta = &txq->meta[idx];
554         tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
555         memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
556         memset(tx_cmd, 0, sizeof(*tx_cmd));
557
558         /*
559          * Set up the Tx-command (not MAC!) header.
560          * Store the chosen Tx queue and TFD index within the sequence field;
561          * after Tx, uCode's Tx response will return this value so driver can
562          * locate the frame within the tx queue and do post-tx processing.
563          */
564         out_cmd->hdr.cmd = REPLY_TX;
565         out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
566                                 INDEX_TO_SEQ(q->write_ptr)));
567
568         /* Copy MAC header from skb into command buffer */
569         memcpy(tx_cmd->hdr, hdr, hdr_len);
570
571
572         if (info->control.hw_key)
573                 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
574
575         /* TODO need this for burst mode later on */
576         iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
577
578         /* set is_hcca to 0; it probably will never be implemented */
579         iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
580
581         /* Total # bytes to be transmitted */
582         len = (u16)skb->len;
583         tx_cmd->len = cpu_to_le16(len);
584
585         iwl_dbg_log_tx_data_frame(priv, len, hdr);
586         iwl_update_stats(priv, true, fc, len);
587         tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
588         tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
589
590         if (!ieee80211_has_morefrags(hdr->frame_control)) {
591                 txq->need_update = 1;
592         } else {
593                 wait_write_ptr = 1;
594                 txq->need_update = 0;
595         }
596
597         IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
598                      le16_to_cpu(out_cmd->hdr.sequence));
599         IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
600         iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
601         iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
602                            ieee80211_hdrlen(fc));
603
604         /*
605          * Use the first empty entry in this queue's command buffer array
606          * to contain the Tx command and MAC header concatenated together
607          * (payload data will be in another buffer).
608          * Size of this varies, due to varying MAC header length.
609          * If end is not dword aligned, we'll have 2 extra bytes at the end
610          * of the MAC header (device reads on dword boundaries).
611          * We'll tell device about this padding later.
612          */
613         len = sizeof(struct iwl3945_tx_cmd) +
614                         sizeof(struct iwl_cmd_header) + hdr_len;
615         len = (len + 3) & ~3;
616
617         /* Physical address of this Tx command's header (not MAC header!),
618          * within command buffer array. */
619         txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
620                                     len, PCI_DMA_TODEVICE);
621         /* we do not map meta data ... so we can safely access address to
622          * provide to unmap command*/
623         dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
624         dma_unmap_len_set(out_meta, len, len);
625
626         /* Add buffer containing Tx command and MAC(!) header to TFD's
627          * first entry */
628         priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
629                                                    txcmd_phys, len, 1, 0);
630
631
632         /* Set up TFD's 2nd entry to point directly to remainder of skb,
633          * if any (802.11 null frames have no payload). */
634         len = skb->len - hdr_len;
635         if (len) {
636                 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
637                                            len, PCI_DMA_TODEVICE);
638                 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
639                                                            phys_addr, len,
640                                                            0, U32_PAD(len));
641         }
642
643
644         /* Tell device the write index *just past* this latest filled TFD */
645         q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
646         iwl_txq_update_write_ptr(priv, txq);
647         spin_unlock_irqrestore(&priv->lock, flags);
648
649         if ((iwl_queue_space(q) < q->high_mark)
650             && priv->mac80211_registered) {
651                 if (wait_write_ptr) {
652                         spin_lock_irqsave(&priv->lock, flags);
653                         txq->need_update = 1;
654                         iwl_txq_update_write_ptr(priv, txq);
655                         spin_unlock_irqrestore(&priv->lock, flags);
656                 }
657
658                 iwl_stop_queue(priv, txq);
659         }
660
661         return 0;
662
663 drop_unlock:
664         spin_unlock_irqrestore(&priv->lock, flags);
665 drop:
666         return -1;
667 }
668
669 static int iwl3945_get_measurement(struct iwl_priv *priv,
670                                struct ieee80211_measurement_params *params,
671                                u8 type)
672 {
673         struct iwl_spectrum_cmd spectrum;
674         struct iwl_rx_packet *pkt;
675         struct iwl_host_cmd cmd = {
676                 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
677                 .data = (void *)&spectrum,
678                 .flags = CMD_WANT_SKB,
679         };
680         u32 add_time = le64_to_cpu(params->start_time);
681         int rc;
682         int spectrum_resp_status;
683         int duration = le16_to_cpu(params->duration);
684         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
685
686         if (iwl_is_associated(priv, IWL_RXON_CTX_BSS))
687                 add_time = iwl_usecs_to_beacons(priv,
688                         le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
689                         le16_to_cpu(ctx->timing.beacon_interval));
690
691         memset(&spectrum, 0, sizeof(spectrum));
692
693         spectrum.channel_count = cpu_to_le16(1);
694         spectrum.flags =
695             RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
696         spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
697         cmd.len = sizeof(spectrum);
698         spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
699
700         if (iwl_is_associated(priv, IWL_RXON_CTX_BSS))
701                 spectrum.start_time =
702                         iwl_add_beacon_time(priv,
703                                 priv->_3945.last_beacon_time, add_time,
704                                 le16_to_cpu(ctx->timing.beacon_interval));
705         else
706                 spectrum.start_time = 0;
707
708         spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
709         spectrum.channels[0].channel = params->channel;
710         spectrum.channels[0].type = type;
711         if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
712                 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
713                     RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
714
715         rc = iwl_send_cmd_sync(priv, &cmd);
716         if (rc)
717                 return rc;
718
719         pkt = (struct iwl_rx_packet *)cmd.reply_page;
720         if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
721                 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
722                 rc = -EIO;
723         }
724
725         spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
726         switch (spectrum_resp_status) {
727         case 0:         /* Command will be handled */
728                 if (pkt->u.spectrum.id != 0xff) {
729                         IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
730                                                 pkt->u.spectrum.id);
731                         priv->measurement_status &= ~MEASUREMENT_READY;
732                 }
733                 priv->measurement_status |= MEASUREMENT_ACTIVE;
734                 rc = 0;
735                 break;
736
737         case 1:         /* Command will not be handled */
738                 rc = -EAGAIN;
739                 break;
740         }
741
742         iwl_free_pages(priv, cmd.reply_page);
743
744         return rc;
745 }
746
747 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
748                                struct iwl_rx_mem_buffer *rxb)
749 {
750         struct iwl_rx_packet *pkt = rxb_addr(rxb);
751         struct iwl_alive_resp *palive;
752         struct delayed_work *pwork;
753
754         palive = &pkt->u.alive_frame;
755
756         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
757                        "0x%01X 0x%01X\n",
758                        palive->is_valid, palive->ver_type,
759                        palive->ver_subtype);
760
761         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
762                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
763                 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
764                        sizeof(struct iwl_alive_resp));
765                 pwork = &priv->init_alive_start;
766         } else {
767                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
768                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
769                        sizeof(struct iwl_alive_resp));
770                 pwork = &priv->alive_start;
771                 iwl3945_disable_events(priv);
772         }
773
774         /* We delay the ALIVE response by 5ms to
775          * give the HW RF Kill time to activate... */
776         if (palive->is_valid == UCODE_VALID_OK)
777                 queue_delayed_work(priv->workqueue, pwork,
778                                    msecs_to_jiffies(5));
779         else
780                 IWL_WARN(priv, "uCode did not respond OK.\n");
781 }
782
783 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
784                                  struct iwl_rx_mem_buffer *rxb)
785 {
786 #ifdef CONFIG_IWLWIFI_DEBUG
787         struct iwl_rx_packet *pkt = rxb_addr(rxb);
788 #endif
789
790         IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
791 }
792
793 static void iwl3945_bg_beacon_update(struct work_struct *work)
794 {
795         struct iwl_priv *priv =
796                 container_of(work, struct iwl_priv, beacon_update);
797         struct sk_buff *beacon;
798
799         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
800         beacon = ieee80211_beacon_get(priv->hw,
801                         priv->contexts[IWL_RXON_CTX_BSS].vif);
802
803         if (!beacon) {
804                 IWL_ERR(priv, "update beacon failed\n");
805                 return;
806         }
807
808         mutex_lock(&priv->mutex);
809         /* new beacon skb is allocated every time; dispose previous.*/
810         if (priv->beacon_skb)
811                 dev_kfree_skb(priv->beacon_skb);
812
813         priv->beacon_skb = beacon;
814         mutex_unlock(&priv->mutex);
815
816         iwl3945_send_beacon_cmd(priv);
817 }
818
819 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
820                                 struct iwl_rx_mem_buffer *rxb)
821 {
822         struct iwl_rx_packet *pkt = rxb_addr(rxb);
823         struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
824 #ifdef CONFIG_IWLWIFI_DEBUG
825         u8 rate = beacon->beacon_notify_hdr.rate;
826
827         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
828                 "tsf %d %d rate %d\n",
829                 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
830                 beacon->beacon_notify_hdr.failure_frame,
831                 le32_to_cpu(beacon->ibss_mgr_status),
832                 le32_to_cpu(beacon->high_tsf),
833                 le32_to_cpu(beacon->low_tsf), rate);
834 #endif
835
836         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
837
838         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
839             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
840                 queue_work(priv->workqueue, &priv->beacon_update);
841 }
842
843 /* Handle notification from uCode that card's power state is changing
844  * due to software, hardware, or critical temperature RFKILL */
845 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
846                                     struct iwl_rx_mem_buffer *rxb)
847 {
848         struct iwl_rx_packet *pkt = rxb_addr(rxb);
849         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
850         unsigned long status = priv->status;
851
852         IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
853                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
854                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
855
856         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
857                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
858
859         if (flags & HW_CARD_DISABLED)
860                 set_bit(STATUS_RF_KILL_HW, &priv->status);
861         else
862                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
863
864
865         iwl_scan_cancel(priv);
866
867         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
868              test_bit(STATUS_RF_KILL_HW, &priv->status)))
869                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
870                                 test_bit(STATUS_RF_KILL_HW, &priv->status));
871         else
872                 wake_up_interruptible(&priv->wait_command_queue);
873 }
874
875 /**
876  * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
877  *
878  * Setup the RX handlers for each of the reply types sent from the uCode
879  * to the host.
880  *
881  * This function chains into the hardware specific files for them to setup
882  * any hardware specific handlers as well.
883  */
884 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
885 {
886         priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
887         priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
888         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
889         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
890         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
891                         iwl_rx_spectrum_measure_notif;
892         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
893         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
894             iwl_rx_pm_debug_statistics_notif;
895         priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
896
897         /*
898          * The same handler is used for both the REPLY to a discrete
899          * statistics request from the host as well as for the periodic
900          * statistics notifications (after received beacons) from the uCode.
901          */
902         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
903         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
904
905         iwl_setup_rx_scan_handlers(priv);
906         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
907
908         /* Set up hardware specific Rx handlers */
909         iwl3945_hw_rx_handler_setup(priv);
910 }
911
912 /************************** RX-FUNCTIONS ****************************/
913 /*
914  * Rx theory of operation
915  *
916  * The host allocates 32 DMA target addresses and passes the host address
917  * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
918  * 0 to 31
919  *
920  * Rx Queue Indexes
921  * The host/firmware share two index registers for managing the Rx buffers.
922  *
923  * The READ index maps to the first position that the firmware may be writing
924  * to -- the driver can read up to (but not including) this position and get
925  * good data.
926  * The READ index is managed by the firmware once the card is enabled.
927  *
928  * The WRITE index maps to the last position the driver has read from -- the
929  * position preceding WRITE is the last slot the firmware can place a packet.
930  *
931  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
932  * WRITE = READ.
933  *
934  * During initialization, the host sets up the READ queue position to the first
935  * INDEX position, and WRITE to the last (READ - 1 wrapped)
936  *
937  * When the firmware places a packet in a buffer, it will advance the READ index
938  * and fire the RX interrupt.  The driver can then query the READ index and
939  * process as many packets as possible, moving the WRITE index forward as it
940  * resets the Rx queue buffers with new memory.
941  *
942  * The management in the driver is as follows:
943  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
944  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
945  *   to replenish the iwl->rxq->rx_free.
946  * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
947  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
948  *   'processed' and 'read' driver indexes as well)
949  * + A received packet is processed and handed to the kernel network stack,
950  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
951  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
952  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
953  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
954  *   were enough free buffers and RX_STALLED is set it is cleared.
955  *
956  *
957  * Driver sequence:
958  *
959  * iwl3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
960  *                            iwl3945_rx_queue_restock
961  * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
962  *                            queue, updates firmware pointers, and updates
963  *                            the WRITE index.  If insufficient rx_free buffers
964  *                            are available, schedules iwl3945_rx_replenish
965  *
966  * -- enable interrupts --
967  * ISR - iwl3945_rx()         Detach iwl_rx_mem_buffers from pool up to the
968  *                            READ INDEX, detaching the SKB from the pool.
969  *                            Moves the packet buffer from queue to rx_used.
970  *                            Calls iwl3945_rx_queue_restock to refill any empty
971  *                            slots.
972  * ...
973  *
974  */
975
976 /**
977  * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
978  */
979 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
980                                           dma_addr_t dma_addr)
981 {
982         return cpu_to_le32((u32)dma_addr);
983 }
984
985 /**
986  * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
987  *
988  * If there are slots in the RX queue that need to be restocked,
989  * and we have free pre-allocated buffers, fill the ranks as much
990  * as we can, pulling from rx_free.
991  *
992  * This moves the 'write' index forward to catch up with 'processed', and
993  * also updates the memory address in the firmware to reference the new
994  * target buffer.
995  */
996 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
997 {
998         struct iwl_rx_queue *rxq = &priv->rxq;
999         struct list_head *element;
1000         struct iwl_rx_mem_buffer *rxb;
1001         unsigned long flags;
1002         int write;
1003
1004         spin_lock_irqsave(&rxq->lock, flags);
1005         write = rxq->write & ~0x7;
1006         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1007                 /* Get next free Rx buffer, remove from free list */
1008                 element = rxq->rx_free.next;
1009                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1010                 list_del(element);
1011
1012                 /* Point to Rx buffer via next RBD in circular buffer */
1013                 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1014                 rxq->queue[rxq->write] = rxb;
1015                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1016                 rxq->free_count--;
1017         }
1018         spin_unlock_irqrestore(&rxq->lock, flags);
1019         /* If the pre-allocated buffer pool is dropping low, schedule to
1020          * refill it */
1021         if (rxq->free_count <= RX_LOW_WATERMARK)
1022                 queue_work(priv->workqueue, &priv->rx_replenish);
1023
1024
1025         /* If we've added more space for the firmware to place data, tell it.
1026          * Increment device's write pointer in multiples of 8. */
1027         if ((rxq->write_actual != (rxq->write & ~0x7))
1028             || (abs(rxq->write - rxq->read) > 7)) {
1029                 spin_lock_irqsave(&rxq->lock, flags);
1030                 rxq->need_update = 1;
1031                 spin_unlock_irqrestore(&rxq->lock, flags);
1032                 iwl_rx_queue_update_write_ptr(priv, rxq);
1033         }
1034 }
1035
1036 /**
1037  * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1038  *
1039  * When moving to rx_free an SKB is allocated for the slot.
1040  *
1041  * Also restock the Rx queue via iwl3945_rx_queue_restock.
1042  * This is called as a scheduled work item (except for during initialization)
1043  */
1044 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1045 {
1046         struct iwl_rx_queue *rxq = &priv->rxq;
1047         struct list_head *element;
1048         struct iwl_rx_mem_buffer *rxb;
1049         struct page *page;
1050         unsigned long flags;
1051         gfp_t gfp_mask = priority;
1052
1053         while (1) {
1054                 spin_lock_irqsave(&rxq->lock, flags);
1055
1056                 if (list_empty(&rxq->rx_used)) {
1057                         spin_unlock_irqrestore(&rxq->lock, flags);
1058                         return;
1059                 }
1060                 spin_unlock_irqrestore(&rxq->lock, flags);
1061
1062                 if (rxq->free_count > RX_LOW_WATERMARK)
1063                         gfp_mask |= __GFP_NOWARN;
1064
1065                 if (priv->hw_params.rx_page_order > 0)
1066                         gfp_mask |= __GFP_COMP;
1067
1068                 /* Alloc a new receive buffer */
1069                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1070                 if (!page) {
1071                         if (net_ratelimit())
1072                                 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1073                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1074                             net_ratelimit())
1075                                 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1076                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
1077                                          rxq->free_count);
1078                         /* We don't reschedule replenish work here -- we will
1079                          * call the restock method and if it still needs
1080                          * more buffers it will schedule replenish */
1081                         break;
1082                 }
1083
1084                 spin_lock_irqsave(&rxq->lock, flags);
1085                 if (list_empty(&rxq->rx_used)) {
1086                         spin_unlock_irqrestore(&rxq->lock, flags);
1087                         __free_pages(page, priv->hw_params.rx_page_order);
1088                         return;
1089                 }
1090                 element = rxq->rx_used.next;
1091                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1092                 list_del(element);
1093                 spin_unlock_irqrestore(&rxq->lock, flags);
1094
1095                 rxb->page = page;
1096                 /* Get physical address of RB/SKB */
1097                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1098                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1099                                 PCI_DMA_FROMDEVICE);
1100
1101                 spin_lock_irqsave(&rxq->lock, flags);
1102
1103                 list_add_tail(&rxb->list, &rxq->rx_free);
1104                 rxq->free_count++;
1105                 priv->alloc_rxb_page++;
1106
1107                 spin_unlock_irqrestore(&rxq->lock, flags);
1108         }
1109 }
1110
1111 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1112 {
1113         unsigned long flags;
1114         int i;
1115         spin_lock_irqsave(&rxq->lock, flags);
1116         INIT_LIST_HEAD(&rxq->rx_free);
1117         INIT_LIST_HEAD(&rxq->rx_used);
1118         /* Fill the rx_used queue with _all_ of the Rx buffers */
1119         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1120                 /* In the reset function, these buffers may have been allocated
1121                  * to an SKB, so we need to unmap and free potential storage */
1122                 if (rxq->pool[i].page != NULL) {
1123                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1124                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1125                                 PCI_DMA_FROMDEVICE);
1126                         __iwl_free_pages(priv, rxq->pool[i].page);
1127                         rxq->pool[i].page = NULL;
1128                 }
1129                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1130         }
1131
1132         /* Set us so that we have processed and used all buffers, but have
1133          * not restocked the Rx queue with fresh buffers */
1134         rxq->read = rxq->write = 0;
1135         rxq->write_actual = 0;
1136         rxq->free_count = 0;
1137         spin_unlock_irqrestore(&rxq->lock, flags);
1138 }
1139
1140 void iwl3945_rx_replenish(void *data)
1141 {
1142         struct iwl_priv *priv = data;
1143         unsigned long flags;
1144
1145         iwl3945_rx_allocate(priv, GFP_KERNEL);
1146
1147         spin_lock_irqsave(&priv->lock, flags);
1148         iwl3945_rx_queue_restock(priv);
1149         spin_unlock_irqrestore(&priv->lock, flags);
1150 }
1151
1152 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1153 {
1154         iwl3945_rx_allocate(priv, GFP_ATOMIC);
1155
1156         iwl3945_rx_queue_restock(priv);
1157 }
1158
1159
1160 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1161  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1162  * This free routine walks the list of POOL entries and if SKB is set to
1163  * non NULL it is unmapped and freed
1164  */
1165 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1166 {
1167         int i;
1168         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1169                 if (rxq->pool[i].page != NULL) {
1170                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1171                                 PAGE_SIZE << priv->hw_params.rx_page_order,
1172                                 PCI_DMA_FROMDEVICE);
1173                         __iwl_free_pages(priv, rxq->pool[i].page);
1174                         rxq->pool[i].page = NULL;
1175                 }
1176         }
1177
1178         dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1179                           rxq->bd_dma);
1180         dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1181                           rxq->rb_stts, rxq->rb_stts_dma);
1182         rxq->bd = NULL;
1183         rxq->rb_stts  = NULL;
1184 }
1185
1186
1187 /* Convert linear signal-to-noise ratio into dB */
1188 static u8 ratio2dB[100] = {
1189 /*       0   1   2   3   4   5   6   7   8   9 */
1190          0,  0,  6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1191         20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1192         26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1193         29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1194         32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1195         34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1196         36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1197         37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1198         38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1199         39, 39, 39, 39, 39, 40, 40, 40, 40, 40  /* 90 - 99 */
1200 };
1201
1202 /* Calculates a relative dB value from a ratio of linear
1203  *   (i.e. not dB) signal levels.
1204  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1205 int iwl3945_calc_db_from_ratio(int sig_ratio)
1206 {
1207         /* 1000:1 or higher just report as 60 dB */
1208         if (sig_ratio >= 1000)
1209                 return 60;
1210
1211         /* 100:1 or higher, divide by 10 and use table,
1212          *   add 20 dB to make up for divide by 10 */
1213         if (sig_ratio >= 100)
1214                 return 20 + (int)ratio2dB[sig_ratio/10];
1215
1216         /* We shouldn't see this */
1217         if (sig_ratio < 1)
1218                 return 0;
1219
1220         /* Use table for ratios 1:1 - 99:1 */
1221         return (int)ratio2dB[sig_ratio];
1222 }
1223
1224 /**
1225  * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1226  *
1227  * Uses the priv->rx_handlers callback function array to invoke
1228  * the appropriate handlers, including command responses,
1229  * frame-received notifications, and other notifications.
1230  */
1231 static void iwl3945_rx_handle(struct iwl_priv *priv)
1232 {
1233         struct iwl_rx_mem_buffer *rxb;
1234         struct iwl_rx_packet *pkt;
1235         struct iwl_rx_queue *rxq = &priv->rxq;
1236         u32 r, i;
1237         int reclaim;
1238         unsigned long flags;
1239         u8 fill_rx = 0;
1240         u32 count = 8;
1241         int total_empty = 0;
1242
1243         /* uCode's read index (stored in shared DRAM) indicates the last Rx
1244          * buffer that the driver may process (last buffer filled by ucode). */
1245         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
1246         i = rxq->read;
1247
1248         /* calculate total frames need to be restock after handling RX */
1249         total_empty = r - rxq->write_actual;
1250         if (total_empty < 0)
1251                 total_empty += RX_QUEUE_SIZE;
1252
1253         if (total_empty > (RX_QUEUE_SIZE / 2))
1254                 fill_rx = 1;
1255         /* Rx interrupt, but nothing sent from uCode */
1256         if (i == r)
1257                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1258
1259         while (i != r) {
1260                 int len;
1261
1262                 rxb = rxq->queue[i];
1263
1264                 /* If an RXB doesn't have a Rx queue slot associated with it,
1265                  * then a bug has been introduced in the queue refilling
1266                  * routines -- catch it here */
1267                 BUG_ON(rxb == NULL);
1268
1269                 rxq->queue[i] = NULL;
1270
1271                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1272                                PAGE_SIZE << priv->hw_params.rx_page_order,
1273                                PCI_DMA_FROMDEVICE);
1274                 pkt = rxb_addr(rxb);
1275
1276                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1277                 len += sizeof(u32); /* account for status word */
1278                 trace_iwlwifi_dev_rx(priv, pkt, len);
1279
1280                 /* Reclaim a command buffer only if this packet is a response
1281                  *   to a (driver-originated) command.
1282                  * If the packet (e.g. Rx frame) originated from uCode,
1283                  *   there is no command buffer to reclaim.
1284                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1285                  *   but apparently a few don't get set; catch them here. */
1286                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1287                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1288                         (pkt->hdr.cmd != REPLY_TX);
1289
1290                 /* Based on type of command response or notification,
1291                  *   handle those that need handling via function in
1292                  *   rx_handlers table.  See iwl3945_setup_rx_handlers() */
1293                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1294                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1295                                 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1296                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1297                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1298                 } else {
1299                         /* No handling needed */
1300                         IWL_DEBUG_RX(priv,
1301                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1302                                 r, i, get_cmd_string(pkt->hdr.cmd),
1303                                 pkt->hdr.cmd);
1304                 }
1305
1306                 /*
1307                  * XXX: After here, we should always check rxb->page
1308                  * against NULL before touching it or its virtual
1309                  * memory (pkt). Because some rx_handler might have
1310                  * already taken or freed the pages.
1311                  */
1312
1313                 if (reclaim) {
1314                         /* Invoke any callbacks, transfer the buffer to caller,
1315                          * and fire off the (possibly) blocking iwl_send_cmd()
1316                          * as we reclaim the driver command queue */
1317                         if (rxb->page)
1318                                 iwl_tx_cmd_complete(priv, rxb);
1319                         else
1320                                 IWL_WARN(priv, "Claim null rxb?\n");
1321                 }
1322
1323                 /* Reuse the page if possible. For notification packets and
1324                  * SKBs that fail to Rx correctly, add them back into the
1325                  * rx_free list for reuse later. */
1326                 spin_lock_irqsave(&rxq->lock, flags);
1327                 if (rxb->page != NULL) {
1328                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1329                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1330                                 PCI_DMA_FROMDEVICE);
1331                         list_add_tail(&rxb->list, &rxq->rx_free);
1332                         rxq->free_count++;
1333                 } else
1334                         list_add_tail(&rxb->list, &rxq->rx_used);
1335
1336                 spin_unlock_irqrestore(&rxq->lock, flags);
1337
1338                 i = (i + 1) & RX_QUEUE_MASK;
1339                 /* If there are a lot of unused frames,
1340                  * restock the Rx queue so ucode won't assert. */
1341                 if (fill_rx) {
1342                         count++;
1343                         if (count >= 8) {
1344                                 rxq->read = i;
1345                                 iwl3945_rx_replenish_now(priv);
1346                                 count = 0;
1347                         }
1348                 }
1349         }
1350
1351         /* Backtrack one entry */
1352         rxq->read = i;
1353         if (fill_rx)
1354                 iwl3945_rx_replenish_now(priv);
1355         else
1356                 iwl3945_rx_queue_restock(priv);
1357 }
1358
1359 /* call this function to flush any scheduled tasklet */
1360 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1361 {
1362         /* wait to make sure we flush pending tasklet*/
1363         synchronize_irq(priv->pci_dev->irq);
1364         tasklet_kill(&priv->irq_tasklet);
1365 }
1366
1367 static const char *desc_lookup(int i)
1368 {
1369         switch (i) {
1370         case 1:
1371                 return "FAIL";
1372         case 2:
1373                 return "BAD_PARAM";
1374         case 3:
1375                 return "BAD_CHECKSUM";
1376         case 4:
1377                 return "NMI_INTERRUPT";
1378         case 5:
1379                 return "SYSASSERT";
1380         case 6:
1381                 return "FATAL_ERROR";
1382         }
1383
1384         return "UNKNOWN";
1385 }
1386
1387 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1388 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1389
1390 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1391 {
1392         u32 i;
1393         u32 desc, time, count, base, data1;
1394         u32 blink1, blink2, ilink1, ilink2;
1395
1396         base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1397
1398         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1399                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1400                 return;
1401         }
1402
1403
1404         count = iwl_read_targ_mem(priv, base);
1405
1406         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1407                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1408                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1409                         priv->status, count);
1410         }
1411
1412         IWL_ERR(priv, "Desc       Time       asrtPC  blink2 "
1413                   "ilink1  nmiPC   Line\n");
1414         for (i = ERROR_START_OFFSET;
1415              i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1416              i += ERROR_ELEM_SIZE) {
1417                 desc = iwl_read_targ_mem(priv, base + i);
1418                 time =
1419                     iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1420                 blink1 =
1421                     iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1422                 blink2 =
1423                     iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1424                 ilink1 =
1425                     iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1426                 ilink2 =
1427                     iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1428                 data1 =
1429                     iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1430
1431                 IWL_ERR(priv,
1432                         "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1433                         desc_lookup(desc), desc, time, blink1, blink2,
1434                         ilink1, ilink2, data1);
1435                 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1436                                         0, blink1, blink2, ilink1, ilink2);
1437         }
1438 }
1439
1440 #define EVENT_START_OFFSET  (6 * sizeof(u32))
1441
1442 /**
1443  * iwl3945_print_event_log - Dump error event log to syslog
1444  *
1445  */
1446 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1447                                   u32 num_events, u32 mode,
1448                                   int pos, char **buf, size_t bufsz)
1449 {
1450         u32 i;
1451         u32 base;       /* SRAM byte address of event log header */
1452         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1453         u32 ptr;        /* SRAM byte address of log data */
1454         u32 ev, time, data; /* event log data */
1455         unsigned long reg_flags;
1456
1457         if (num_events == 0)
1458                 return pos;
1459
1460         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1461
1462         if (mode == 0)
1463                 event_size = 2 * sizeof(u32);
1464         else
1465                 event_size = 3 * sizeof(u32);
1466
1467         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1468
1469         /* Make sure device is powered up for SRAM reads */
1470         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1471         iwl_grab_nic_access(priv);
1472
1473         /* Set starting address; reads will auto-increment */
1474         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1475         rmb();
1476
1477         /* "time" is actually "data" for mode 0 (no timestamp).
1478          * place event id # at far right for easier visual parsing. */
1479         for (i = 0; i < num_events; i++) {
1480                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1481                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1482                 if (mode == 0) {
1483                         /* data, ev */
1484                         if (bufsz) {
1485                                 pos += scnprintf(*buf + pos, bufsz - pos,
1486                                                 "0x%08x:%04u\n",
1487                                                 time, ev);
1488                         } else {
1489                                 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1490                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1491                                                               time, ev);
1492                         }
1493                 } else {
1494                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1495                         if (bufsz) {
1496                                 pos += scnprintf(*buf + pos, bufsz - pos,
1497                                                 "%010u:0x%08x:%04u\n",
1498                                                  time, data, ev);
1499                         } else {
1500                                 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1501                                         time, data, ev);
1502                                 trace_iwlwifi_dev_ucode_event(priv, time,
1503                                                               data, ev);
1504                         }
1505                 }
1506         }
1507
1508         /* Allow device to power down */
1509         iwl_release_nic_access(priv);
1510         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1511         return pos;
1512 }
1513
1514 /**
1515  * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1516  */
1517 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1518                                       u32 num_wraps, u32 next_entry,
1519                                       u32 size, u32 mode,
1520                                       int pos, char **buf, size_t bufsz)
1521 {
1522         /*
1523          * display the newest DEFAULT_LOG_ENTRIES entries
1524          * i.e the entries just before the next ont that uCode would fill.
1525          */
1526         if (num_wraps) {
1527                 if (next_entry < size) {
1528                         pos = iwl3945_print_event_log(priv,
1529                                              capacity - (size - next_entry),
1530                                              size - next_entry, mode,
1531                                              pos, buf, bufsz);
1532                         pos = iwl3945_print_event_log(priv, 0,
1533                                                       next_entry, mode,
1534                                                       pos, buf, bufsz);
1535                 } else
1536                         pos = iwl3945_print_event_log(priv, next_entry - size,
1537                                                       size, mode,
1538                                                       pos, buf, bufsz);
1539         } else {
1540                 if (next_entry < size)
1541                         pos = iwl3945_print_event_log(priv, 0,
1542                                                       next_entry, mode,
1543                                                       pos, buf, bufsz);
1544                 else
1545                         pos = iwl3945_print_event_log(priv, next_entry - size,
1546                                                       size, mode,
1547                                                       pos, buf, bufsz);
1548         }
1549         return pos;
1550 }
1551
1552 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1553
1554 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1555                             char **buf, bool display)
1556 {
1557         u32 base;       /* SRAM byte address of event log header */
1558         u32 capacity;   /* event log capacity in # entries */
1559         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1560         u32 num_wraps;  /* # times uCode wrapped to top of log */
1561         u32 next_entry; /* index of next entry to be written by uCode */
1562         u32 size;       /* # entries that we'll print */
1563         int pos = 0;
1564         size_t bufsz = 0;
1565
1566         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1567         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1568                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1569                 return  -EINVAL;
1570         }
1571
1572         /* event log header */
1573         capacity = iwl_read_targ_mem(priv, base);
1574         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1575         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1576         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1577
1578         if (capacity > priv->cfg->base_params->max_event_log_size) {
1579                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1580                         capacity, priv->cfg->base_params->max_event_log_size);
1581                 capacity = priv->cfg->base_params->max_event_log_size;
1582         }
1583
1584         if (next_entry > priv->cfg->base_params->max_event_log_size) {
1585                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1586                         next_entry, priv->cfg->base_params->max_event_log_size);
1587                 next_entry = priv->cfg->base_params->max_event_log_size;
1588         }
1589
1590         size = num_wraps ? capacity : next_entry;
1591
1592         /* bail out if nothing in log */
1593         if (size == 0) {
1594                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1595                 return pos;
1596         }
1597
1598 #ifdef CONFIG_IWLWIFI_DEBUG
1599         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1600                 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1601                         ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1602 #else
1603         size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1604                 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1605 #endif
1606
1607         IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1608                   size);
1609
1610 #ifdef CONFIG_IWLWIFI_DEBUG
1611         if (display) {
1612                 if (full_log)
1613                         bufsz = capacity * 48;
1614                 else
1615                         bufsz = size * 48;
1616                 *buf = kmalloc(bufsz, GFP_KERNEL);
1617                 if (!*buf)
1618                         return -ENOMEM;
1619         }
1620         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1621                 /* if uCode has wrapped back to top of log,
1622                  * start at the oldest entry,
1623                  * i.e the next one that uCode would fill.
1624                  */
1625                 if (num_wraps)
1626                         pos = iwl3945_print_event_log(priv, next_entry,
1627                                                 capacity - next_entry, mode,
1628                                                 pos, buf, bufsz);
1629
1630                 /* (then/else) start at top of log */
1631                 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1632                                               pos, buf, bufsz);
1633         } else
1634                 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1635                                                     next_entry, size, mode,
1636                                                     pos, buf, bufsz);
1637 #else
1638         pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1639                                             next_entry, size, mode,
1640                                             pos, buf, bufsz);
1641 #endif
1642         return pos;
1643 }
1644
1645 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1646 {
1647         u32 inta, handled = 0;
1648         u32 inta_fh;
1649         unsigned long flags;
1650 #ifdef CONFIG_IWLWIFI_DEBUG
1651         u32 inta_mask;
1652 #endif
1653
1654         spin_lock_irqsave(&priv->lock, flags);
1655
1656         /* Ack/clear/reset pending uCode interrupts.
1657          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1658          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1659         inta = iwl_read32(priv, CSR_INT);
1660         iwl_write32(priv, CSR_INT, inta);
1661
1662         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1663          * Any new interrupts that happen after this, either while we're
1664          * in this tasklet, or later, will show up in next ISR/tasklet. */
1665         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1666         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1667
1668 #ifdef CONFIG_IWLWIFI_DEBUG
1669         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1670                 /* just for debug */
1671                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1672                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1673                               inta, inta_mask, inta_fh);
1674         }
1675 #endif
1676
1677         spin_unlock_irqrestore(&priv->lock, flags);
1678
1679         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1680          * atomic, make sure that inta covers all the interrupts that
1681          * we've discovered, even if FH interrupt came in just after
1682          * reading CSR_INT. */
1683         if (inta_fh & CSR39_FH_INT_RX_MASK)
1684                 inta |= CSR_INT_BIT_FH_RX;
1685         if (inta_fh & CSR39_FH_INT_TX_MASK)
1686                 inta |= CSR_INT_BIT_FH_TX;
1687
1688         /* Now service all interrupt bits discovered above. */
1689         if (inta & CSR_INT_BIT_HW_ERR) {
1690                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1691
1692                 /* Tell the device to stop sending interrupts */
1693                 iwl_disable_interrupts(priv);
1694
1695                 priv->isr_stats.hw++;
1696                 iwl_irq_handle_error(priv);
1697
1698                 handled |= CSR_INT_BIT_HW_ERR;
1699
1700                 return;
1701         }
1702
1703 #ifdef CONFIG_IWLWIFI_DEBUG
1704         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1705                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1706                 if (inta & CSR_INT_BIT_SCD) {
1707                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1708                                       "the frame/frames.\n");
1709                         priv->isr_stats.sch++;
1710                 }
1711
1712                 /* Alive notification via Rx interrupt will do the real work */
1713                 if (inta & CSR_INT_BIT_ALIVE) {
1714                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1715                         priv->isr_stats.alive++;
1716                 }
1717         }
1718 #endif
1719         /* Safely ignore these bits for debug checks below */
1720         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1721
1722         /* Error detected by uCode */
1723         if (inta & CSR_INT_BIT_SW_ERR) {
1724                 IWL_ERR(priv, "Microcode SW error detected. "
1725                         "Restarting 0x%X.\n", inta);
1726                 priv->isr_stats.sw++;
1727                 iwl_irq_handle_error(priv);
1728                 handled |= CSR_INT_BIT_SW_ERR;
1729         }
1730
1731         /* uCode wakes up after power-down sleep */
1732         if (inta & CSR_INT_BIT_WAKEUP) {
1733                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1734                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1735                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1736                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1737                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1738                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1739                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1740                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1741
1742                 priv->isr_stats.wakeup++;
1743                 handled |= CSR_INT_BIT_WAKEUP;
1744         }
1745
1746         /* All uCode command responses, including Tx command responses,
1747          * Rx "responses" (frame-received notification), and other
1748          * notifications from uCode come through here*/
1749         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1750                 iwl3945_rx_handle(priv);
1751                 priv->isr_stats.rx++;
1752                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1753         }
1754
1755         if (inta & CSR_INT_BIT_FH_TX) {
1756                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1757                 priv->isr_stats.tx++;
1758
1759                 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1760                 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1761                                         (FH39_SRVC_CHNL), 0x0);
1762                 handled |= CSR_INT_BIT_FH_TX;
1763         }
1764
1765         if (inta & ~handled) {
1766                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1767                 priv->isr_stats.unhandled++;
1768         }
1769
1770         if (inta & ~priv->inta_mask) {
1771                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1772                          inta & ~priv->inta_mask);
1773                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1774         }
1775
1776         /* Re-enable all interrupts */
1777         /* only Re-enable if disabled by irq */
1778         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1779                 iwl_enable_interrupts(priv);
1780
1781 #ifdef CONFIG_IWLWIFI_DEBUG
1782         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1783                 inta = iwl_read32(priv, CSR_INT);
1784                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1785                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1786                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1787                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1788         }
1789 #endif
1790 }
1791
1792 static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv,
1793                                                struct ieee80211_vif *vif,
1794                                                enum ieee80211_band band,
1795                                                struct iwl3945_scan_channel *scan_ch)
1796 {
1797         const struct ieee80211_supported_band *sband;
1798         u16 passive_dwell = 0;
1799         u16 active_dwell = 0;
1800         int added = 0;
1801         u8 channel = 0;
1802
1803         sband = iwl_get_hw_mode(priv, band);
1804         if (!sband) {
1805                 IWL_ERR(priv, "invalid band\n");
1806                 return added;
1807         }
1808
1809         active_dwell = iwl_get_active_dwell_time(priv, band, 0);
1810         passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1811
1812         if (passive_dwell <= active_dwell)
1813                 passive_dwell = active_dwell + 1;
1814
1815
1816         channel = iwl_get_single_channel_number(priv, band);
1817
1818         if (channel) {
1819                 scan_ch->channel = channel;
1820                 scan_ch->type = 0;      /* passive */
1821                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1822                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1823                 /* Set txpower levels to defaults */
1824                 scan_ch->tpc.dsp_atten = 110;
1825                 if (band == IEEE80211_BAND_5GHZ)
1826                         scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1827                 else
1828                         scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1829                 added++;
1830         } else
1831                 IWL_ERR(priv, "no valid channel found\n");
1832         return added;
1833 }
1834
1835 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1836                                          enum ieee80211_band band,
1837                                      u8 is_active, u8 n_probes,
1838                                      struct iwl3945_scan_channel *scan_ch,
1839                                      struct ieee80211_vif *vif)
1840 {
1841         struct ieee80211_channel *chan;
1842         const struct ieee80211_supported_band *sband;
1843         const struct iwl_channel_info *ch_info;
1844         u16 passive_dwell = 0;
1845         u16 active_dwell = 0;
1846         int added, i;
1847
1848         sband = iwl_get_hw_mode(priv, band);
1849         if (!sband)
1850                 return 0;
1851
1852         active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1853         passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1854
1855         if (passive_dwell <= active_dwell)
1856                 passive_dwell = active_dwell + 1;
1857
1858         for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1859                 chan = priv->scan_request->channels[i];
1860
1861                 if (chan->band != band)
1862                         continue;
1863
1864                 scan_ch->channel = chan->hw_value;
1865
1866                 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1867                 if (!is_channel_valid(ch_info)) {
1868                         IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1869                                        scan_ch->channel);
1870                         continue;
1871                 }
1872
1873                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1874                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1875                 /* If passive , set up for auto-switch
1876                  *  and use long active_dwell time.
1877                  */
1878                 if (!is_active || is_channel_passive(ch_info) ||
1879                     (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1880                         scan_ch->type = 0;      /* passive */
1881                         if (IWL_UCODE_API(priv->ucode_ver) == 1)
1882                                 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1883                 } else {
1884                         scan_ch->type = 1;      /* active */
1885                 }
1886
1887                 /* Set direct probe bits. These may be used both for active
1888                  * scan channels (probes gets sent right away),
1889                  * or for passive channels (probes get se sent only after
1890                  * hearing clear Rx packet).*/
1891                 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1892                         if (n_probes)
1893                                 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1894                 } else {
1895                         /* uCode v1 does not allow setting direct probe bits on
1896                          * passive channel. */
1897                         if ((scan_ch->type & 1) && n_probes)
1898                                 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1899                 }
1900
1901                 /* Set txpower levels to defaults */
1902                 scan_ch->tpc.dsp_atten = 110;
1903                 /* scan_pwr_info->tpc.dsp_atten; */
1904
1905                 /*scan_pwr_info->tpc.tx_gain; */
1906                 if (band == IEEE80211_BAND_5GHZ)
1907                         scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1908                 else {
1909                         scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1910                         /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1911                          * power level:
1912                          * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1913                          */
1914                 }
1915
1916                 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1917                                scan_ch->channel,
1918                                (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1919                                (scan_ch->type & 1) ?
1920                                active_dwell : passive_dwell);
1921
1922                 scan_ch++;
1923                 added++;
1924         }
1925
1926         IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1927         return added;
1928 }
1929
1930 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1931                               struct ieee80211_rate *rates)
1932 {
1933         int i;
1934
1935         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1936                 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1937                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1938                 rates[i].hw_value_short = i;
1939                 rates[i].flags = 0;
1940                 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1941                         /*
1942                          * If CCK != 1M then set short preamble rate flag.
1943                          */
1944                         rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1945                                 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1946                 }
1947         }
1948 }
1949
1950 /******************************************************************************
1951  *
1952  * uCode download functions
1953  *
1954  ******************************************************************************/
1955
1956 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1957 {
1958         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1959         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1960         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1961         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1962         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1963         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1964 }
1965
1966 /**
1967  * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1968  *     looking at all data.
1969  */
1970 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1971 {
1972         u32 val;
1973         u32 save_len = len;
1974         int rc = 0;
1975         u32 errcnt;
1976
1977         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1978
1979         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1980                                IWL39_RTC_INST_LOWER_BOUND);
1981
1982         errcnt = 0;
1983         for (; len > 0; len -= sizeof(u32), image++) {
1984                 /* read data comes through single port, auto-incr addr */
1985                 /* NOTE: Use the debugless read so we don't flood kernel log
1986                  * if IWL_DL_IO is set */
1987                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1988                 if (val != le32_to_cpu(*image)) {
1989                         IWL_ERR(priv, "uCode INST section is invalid at "
1990                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
1991                                   save_len - len, val, le32_to_cpu(*image));
1992                         rc = -EIO;
1993                         errcnt++;
1994                         if (errcnt >= 20)
1995                                 break;
1996                 }
1997         }
1998
1999
2000         if (!errcnt)
2001                 IWL_DEBUG_INFO(priv,
2002                         "ucode image in INSTRUCTION memory is good\n");
2003
2004         return rc;
2005 }
2006
2007
2008 /**
2009  * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2010  *   using sample data 100 bytes apart.  If these sample points are good,
2011  *   it's a pretty good bet that everything between them is good, too.
2012  */
2013 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2014 {
2015         u32 val;
2016         int rc = 0;
2017         u32 errcnt = 0;
2018         u32 i;
2019
2020         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2021
2022         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2023                 /* read data comes through single port, auto-incr addr */
2024                 /* NOTE: Use the debugless read so we don't flood kernel log
2025                  * if IWL_DL_IO is set */
2026                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2027                         i + IWL39_RTC_INST_LOWER_BOUND);
2028                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2029                 if (val != le32_to_cpu(*image)) {
2030 #if 0 /* Enable this if you want to see details */
2031                         IWL_ERR(priv, "uCode INST section is invalid at "
2032                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2033                                   i, val, *image);
2034 #endif
2035                         rc = -EIO;
2036                         errcnt++;
2037                         if (errcnt >= 3)
2038                                 break;
2039                 }
2040         }
2041
2042         return rc;
2043 }
2044
2045
2046 /**
2047  * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2048  *    and verify its contents
2049  */
2050 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2051 {
2052         __le32 *image;
2053         u32 len;
2054         int rc = 0;
2055
2056         /* Try bootstrap */
2057         image = (__le32 *)priv->ucode_boot.v_addr;
2058         len = priv->ucode_boot.len;
2059         rc = iwl3945_verify_inst_sparse(priv, image, len);
2060         if (rc == 0) {
2061                 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2062                 return 0;
2063         }
2064
2065         /* Try initialize */
2066         image = (__le32 *)priv->ucode_init.v_addr;
2067         len = priv->ucode_init.len;
2068         rc = iwl3945_verify_inst_sparse(priv, image, len);
2069         if (rc == 0) {
2070                 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2071                 return 0;
2072         }
2073
2074         /* Try runtime/protocol */
2075         image = (__le32 *)priv->ucode_code.v_addr;
2076         len = priv->ucode_code.len;
2077         rc = iwl3945_verify_inst_sparse(priv, image, len);
2078         if (rc == 0) {
2079                 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2080                 return 0;
2081         }
2082
2083         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2084
2085         /* Since nothing seems to match, show first several data entries in
2086          * instruction SRAM, so maybe visual inspection will give a clue.
2087          * Selection of bootstrap image (vs. other images) is arbitrary. */
2088         image = (__le32 *)priv->ucode_boot.v_addr;
2089         len = priv->ucode_boot.len;
2090         rc = iwl3945_verify_inst_full(priv, image, len);
2091
2092         return rc;
2093 }
2094
2095 static void iwl3945_nic_start(struct iwl_priv *priv)
2096 {
2097         /* Remove all resets to allow NIC to operate */
2098         iwl_write32(priv, CSR_RESET, 0);
2099 }
2100
2101 #define IWL3945_UCODE_GET(item)                                         \
2102 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
2103 {                                                                       \
2104         return le32_to_cpu(ucode->u.v1.item);                           \
2105 }
2106
2107 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2108 {
2109         return 24;
2110 }
2111
2112 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
2113 {
2114         return (u8 *) ucode->u.v1.data;
2115 }
2116
2117 IWL3945_UCODE_GET(inst_size);
2118 IWL3945_UCODE_GET(data_size);
2119 IWL3945_UCODE_GET(init_size);
2120 IWL3945_UCODE_GET(init_data_size);
2121 IWL3945_UCODE_GET(boot_size);
2122
2123 /**
2124  * iwl3945_read_ucode - Read uCode images from disk file.
2125  *
2126  * Copy into buffers for card to fetch via bus-mastering
2127  */
2128 static int iwl3945_read_ucode(struct iwl_priv *priv)
2129 {
2130         const struct iwl_ucode_header *ucode;
2131         int ret = -EINVAL, index;
2132         const struct firmware *ucode_raw;
2133         /* firmware file name contains uCode/driver compatibility version */
2134         const char *name_pre = priv->cfg->fw_name_pre;
2135         const unsigned int api_max = priv->cfg->ucode_api_max;
2136         const unsigned int api_min = priv->cfg->ucode_api_min;
2137         char buf[25];
2138         u8 *src;
2139         size_t len;
2140         u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2141
2142         /* Ask kernel firmware_class module to get the boot firmware off disk.
2143          * request_firmware() is synchronous, file is in memory on return. */
2144         for (index = api_max; index >= api_min; index--) {
2145                 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2146                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2147                 if (ret < 0) {
2148                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
2149                                   buf, ret);
2150                         if (ret == -ENOENT)
2151                                 continue;
2152                         else
2153                                 goto error;
2154                 } else {
2155                         if (index < api_max)
2156                                 IWL_ERR(priv, "Loaded firmware %s, "
2157                                         "which is deprecated. "
2158                                         " Please use API v%u instead.\n",
2159                                           buf, api_max);
2160                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2161                                        "(%zd bytes) from disk\n",
2162                                        buf, ucode_raw->size);
2163                         break;
2164                 }
2165         }
2166
2167         if (ret < 0)
2168                 goto error;
2169
2170         /* Make sure that we got at least our header! */
2171         if (ucode_raw->size <  iwl3945_ucode_get_header_size(1)) {
2172                 IWL_ERR(priv, "File size way too small!\n");
2173                 ret = -EINVAL;
2174                 goto err_release;
2175         }
2176
2177         /* Data from ucode file:  header followed by uCode images */
2178         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2179
2180         priv->ucode_ver = le32_to_cpu(ucode->ver);
2181         api_ver = IWL_UCODE_API(priv->ucode_ver);
2182         inst_size = iwl3945_ucode_get_inst_size(ucode);
2183         data_size = iwl3945_ucode_get_data_size(ucode);
2184         init_size = iwl3945_ucode_get_init_size(ucode);
2185         init_data_size = iwl3945_ucode_get_init_data_size(ucode);
2186         boot_size = iwl3945_ucode_get_boot_size(ucode);
2187         src = iwl3945_ucode_get_data(ucode);
2188
2189         /* api_ver should match the api version forming part of the
2190          * firmware filename ... but we don't check for that and only rely
2191          * on the API version read from firmware header from here on forward */
2192
2193         if (api_ver < api_min || api_ver > api_max) {
2194                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2195                           "Driver supports v%u, firmware is v%u.\n",
2196                           api_max, api_ver);
2197                 priv->ucode_ver = 0;
2198                 ret = -EINVAL;
2199                 goto err_release;
2200         }
2201         if (api_ver != api_max)
2202                 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2203                           "got %u. New firmware can be obtained "
2204                           "from http://www.intellinuxwireless.org.\n",
2205                           api_max, api_ver);
2206
2207         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2208                 IWL_UCODE_MAJOR(priv->ucode_ver),
2209                 IWL_UCODE_MINOR(priv->ucode_ver),
2210                 IWL_UCODE_API(priv->ucode_ver),
2211                 IWL_UCODE_SERIAL(priv->ucode_ver));
2212
2213         snprintf(priv->hw->wiphy->fw_version,
2214                  sizeof(priv->hw->wiphy->fw_version),
2215                  "%u.%u.%u.%u",
2216                  IWL_UCODE_MAJOR(priv->ucode_ver),
2217                  IWL_UCODE_MINOR(priv->ucode_ver),
2218                  IWL_UCODE_API(priv->ucode_ver),
2219                  IWL_UCODE_SERIAL(priv->ucode_ver));
2220
2221         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2222                        priv->ucode_ver);
2223         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2224                        inst_size);
2225         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2226                        data_size);
2227         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2228                        init_size);
2229         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2230                        init_data_size);
2231         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2232                        boot_size);
2233
2234
2235         /* Verify size of file vs. image size info in file's header */
2236         if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
2237                 inst_size + data_size + init_size +
2238                 init_data_size + boot_size) {
2239
2240                 IWL_DEBUG_INFO(priv,
2241                         "uCode file size %zd does not match expected size\n",
2242                         ucode_raw->size);
2243                 ret = -EINVAL;
2244                 goto err_release;
2245         }
2246
2247         /* Verify that uCode images will fit in card's SRAM */
2248         if (inst_size > IWL39_MAX_INST_SIZE) {
2249                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2250                                inst_size);
2251                 ret = -EINVAL;
2252                 goto err_release;
2253         }
2254
2255         if (data_size > IWL39_MAX_DATA_SIZE) {
2256                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2257                                data_size);
2258                 ret = -EINVAL;
2259                 goto err_release;
2260         }
2261         if (init_size > IWL39_MAX_INST_SIZE) {
2262                 IWL_DEBUG_INFO(priv,
2263                                 "uCode init instr len %d too large to fit in\n",
2264                                 init_size);
2265                 ret = -EINVAL;
2266                 goto err_release;
2267         }
2268         if (init_data_size > IWL39_MAX_DATA_SIZE) {
2269                 IWL_DEBUG_INFO(priv,
2270                                 "uCode init data len %d too large to fit in\n",
2271                                 init_data_size);
2272                 ret = -EINVAL;
2273                 goto err_release;
2274         }
2275         if (boot_size > IWL39_MAX_BSM_SIZE) {
2276                 IWL_DEBUG_INFO(priv,
2277                                 "uCode boot instr len %d too large to fit in\n",
2278                                 boot_size);
2279                 ret = -EINVAL;
2280                 goto err_release;
2281         }
2282
2283         /* Allocate ucode buffers for card's bus-master loading ... */
2284
2285         /* Runtime instructions and 2 copies of data:
2286          * 1) unmodified from disk
2287          * 2) backup cache for save/restore during power-downs */
2288         priv->ucode_code.len = inst_size;
2289         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2290
2291         priv->ucode_data.len = data_size;
2292         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2293
2294         priv->ucode_data_backup.len = data_size;
2295         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2296
2297         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2298             !priv->ucode_data_backup.v_addr)
2299                 goto err_pci_alloc;
2300
2301         /* Initialization instructions and data */
2302         if (init_size && init_data_size) {
2303                 priv->ucode_init.len = init_size;
2304                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2305
2306                 priv->ucode_init_data.len = init_data_size;
2307                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2308
2309                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2310                         goto err_pci_alloc;
2311         }
2312
2313         /* Bootstrap (instructions only, no data) */
2314         if (boot_size) {
2315                 priv->ucode_boot.len = boot_size;
2316                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2317
2318                 if (!priv->ucode_boot.v_addr)
2319                         goto err_pci_alloc;
2320         }
2321
2322         /* Copy images into buffers for card's bus-master reads ... */
2323
2324         /* Runtime instructions (first block of data in file) */
2325         len = inst_size;
2326         IWL_DEBUG_INFO(priv,
2327                 "Copying (but not loading) uCode instr len %zd\n", len);
2328         memcpy(priv->ucode_code.v_addr, src, len);
2329         src += len;
2330
2331         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2332                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2333
2334         /* Runtime data (2nd block)
2335          * NOTE:  Copy into backup buffer will be done in iwl3945_up()  */
2336         len = data_size;
2337         IWL_DEBUG_INFO(priv,
2338                 "Copying (but not loading) uCode data len %zd\n", len);
2339         memcpy(priv->ucode_data.v_addr, src, len);
2340         memcpy(priv->ucode_data_backup.v_addr, src, len);
2341         src += len;
2342
2343         /* Initialization instructions (3rd block) */
2344         if (init_size) {
2345                 len = init_size;
2346                 IWL_DEBUG_INFO(priv,
2347                         "Copying (but not loading) init instr len %zd\n", len);
2348                 memcpy(priv->ucode_init.v_addr, src, len);
2349                 src += len;
2350         }
2351
2352         /* Initialization data (4th block) */
2353         if (init_data_size) {
2354                 len = init_data_size;
2355                 IWL_DEBUG_INFO(priv,
2356                         "Copying (but not loading) init data len %zd\n", len);
2357                 memcpy(priv->ucode_init_data.v_addr, src, len);
2358                 src += len;
2359         }
2360
2361         /* Bootstrap instructions (5th block) */
2362         len = boot_size;
2363         IWL_DEBUG_INFO(priv,
2364                 "Copying (but not loading) boot instr len %zd\n", len);
2365         memcpy(priv->ucode_boot.v_addr, src, len);
2366
2367         /* We have our copies now, allow OS release its copies */
2368         release_firmware(ucode_raw);
2369         return 0;
2370
2371  err_pci_alloc:
2372         IWL_ERR(priv, "failed to allocate pci memory\n");
2373         ret = -ENOMEM;
2374         iwl3945_dealloc_ucode_pci(priv);
2375
2376  err_release:
2377         release_firmware(ucode_raw);
2378
2379  error:
2380         return ret;
2381 }
2382
2383
2384 /**
2385  * iwl3945_set_ucode_ptrs - Set uCode address location
2386  *
2387  * Tell initialization uCode where to find runtime uCode.
2388  *
2389  * BSM registers initially contain pointers to initialization uCode.
2390  * We need to replace them to load runtime uCode inst and data,
2391  * and to save runtime data when powering down.
2392  */
2393 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2394 {
2395         dma_addr_t pinst;
2396         dma_addr_t pdata;
2397
2398         /* bits 31:0 for 3945 */
2399         pinst = priv->ucode_code.p_addr;
2400         pdata = priv->ucode_data_backup.p_addr;
2401
2402         /* Tell bootstrap uCode where to find image to load */
2403         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2404         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2405         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2406                                  priv->ucode_data.len);
2407
2408         /* Inst byte count must be last to set up, bit 31 signals uCode
2409          *   that all new ptr/size info is in place */
2410         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2411                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2412
2413         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2414
2415         return 0;
2416 }
2417
2418 /**
2419  * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2420  *
2421  * Called after REPLY_ALIVE notification received from "initialize" uCode.
2422  *
2423  * Tell "initialize" uCode to go ahead and load the runtime uCode.
2424  */
2425 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2426 {
2427         /* Check alive response for "valid" sign from uCode */
2428         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2429                 /* We had an error bringing up the hardware, so take it
2430                  * all the way back down so we can try again */
2431                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2432                 goto restart;
2433         }
2434
2435         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2436          * This is a paranoid check, because we would not have gotten the
2437          * "initialize" alive if code weren't properly loaded.  */
2438         if (iwl3945_verify_ucode(priv)) {
2439                 /* Runtime instruction load was bad;
2440                  * take it all the way back down so we can try again */
2441                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2442                 goto restart;
2443         }
2444
2445         /* Send pointers to protocol/runtime uCode image ... init code will
2446          * load and launch runtime uCode, which will send us another "Alive"
2447          * notification. */
2448         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2449         if (iwl3945_set_ucode_ptrs(priv)) {
2450                 /* Runtime instruction load won't happen;
2451                  * take it all the way back down so we can try again */
2452                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2453                 goto restart;
2454         }
2455         return;
2456
2457  restart:
2458         queue_work(priv->workqueue, &priv->restart);
2459 }
2460
2461 /**
2462  * iwl3945_alive_start - called after REPLY_ALIVE notification received
2463  *                   from protocol/runtime uCode (initialization uCode's
2464  *                   Alive gets handled by iwl3945_init_alive_start()).
2465  */
2466 static void iwl3945_alive_start(struct iwl_priv *priv)
2467 {
2468         int thermal_spin = 0;
2469         u32 rfkill;
2470         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2471
2472         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2473
2474         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2475                 /* We had an error bringing up the hardware, so take it
2476                  * all the way back down so we can try again */
2477                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2478                 goto restart;
2479         }
2480
2481         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2482          * This is a paranoid check, because we would not have gotten the
2483          * "runtime" alive if code weren't properly loaded.  */
2484         if (iwl3945_verify_ucode(priv)) {
2485                 /* Runtime instruction load was bad;
2486                  * take it all the way back down so we can try again */
2487                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2488                 goto restart;
2489         }
2490
2491         rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2492         IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2493
2494         if (rfkill & 0x1) {
2495                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2496                 /* if RFKILL is not on, then wait for thermal
2497                  * sensor in adapter to kick in */
2498                 while (iwl3945_hw_get_temperature(priv) == 0) {
2499                         thermal_spin++;
2500                         udelay(10);
2501                 }
2502
2503                 if (thermal_spin)
2504                         IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2505                                        thermal_spin * 10);
2506         } else
2507                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2508
2509         /* After the ALIVE response, we can send commands to 3945 uCode */
2510         set_bit(STATUS_ALIVE, &priv->status);
2511
2512         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2513                 /* Enable timer to monitor the driver queues */
2514                 mod_timer(&priv->monitor_recover,
2515                         jiffies +
2516                         msecs_to_jiffies(
2517                           priv->cfg->base_params->monitor_recover_period));
2518         }
2519
2520         if (iwl_is_rfkill(priv))
2521                 return;
2522
2523         ieee80211_wake_queues(priv->hw);
2524
2525         priv->active_rate = IWL_RATES_MASK;
2526
2527         iwl_power_update_mode(priv, true);
2528
2529         if (iwl_is_associated(priv, IWL_RXON_CTX_BSS)) {
2530                 struct iwl3945_rxon_cmd *active_rxon =
2531                                 (struct iwl3945_rxon_cmd *)(&ctx->active);
2532
2533                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2534                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2535         } else {
2536                 /* Initialize our rx_config data */
2537                 iwl_connection_init_rx_config(priv, ctx);
2538         }
2539
2540         /* Configure Bluetooth device coexistence support */
2541         priv->cfg->ops->hcmd->send_bt_config(priv);
2542
2543         /* Configure the adapter for unassociated operation */
2544         iwl3945_commit_rxon(priv, ctx);
2545
2546         iwl3945_reg_txpower_periodic(priv);
2547
2548         iwl_leds_init(priv);
2549
2550         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2551         set_bit(STATUS_READY, &priv->status);
2552         wake_up_interruptible(&priv->wait_command_queue);
2553
2554         return;
2555
2556  restart:
2557         queue_work(priv->workqueue, &priv->restart);
2558 }
2559
2560 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2561
2562 static void __iwl3945_down(struct iwl_priv *priv)
2563 {
2564         unsigned long flags;
2565         int exit_pending;
2566
2567         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2568
2569         iwl_scan_cancel_timeout(priv, 200);
2570
2571         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2572
2573         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2574          * to prevent rearm timer */
2575         if (priv->cfg->ops->lib->recover_from_tx_stall)
2576                 del_timer_sync(&priv->monitor_recover);
2577
2578         /* Station information will now be cleared in device */
2579         iwl_clear_ucode_stations(priv, NULL);
2580         iwl_dealloc_bcast_stations(priv);
2581         iwl_clear_driver_stations(priv);
2582
2583         /* Unblock any waiting calls */
2584         wake_up_interruptible_all(&priv->wait_command_queue);
2585
2586         /* Wipe out the EXIT_PENDING status bit if we are not actually
2587          * exiting the module */
2588         if (!exit_pending)
2589                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2590
2591         /* stop and reset the on-board processor */
2592         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2593
2594         /* tell the device to stop sending interrupts */
2595         spin_lock_irqsave(&priv->lock, flags);
2596         iwl_disable_interrupts(priv);
2597         spin_unlock_irqrestore(&priv->lock, flags);
2598         iwl_synchronize_irq(priv);
2599
2600         if (priv->mac80211_registered)
2601                 ieee80211_stop_queues(priv->hw);
2602
2603         /* If we have not previously called iwl3945_init() then
2604          * clear all bits but the RF Kill bits and return */
2605         if (!iwl_is_init(priv)) {
2606                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2607                                         STATUS_RF_KILL_HW |
2608                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2609                                         STATUS_GEO_CONFIGURED |
2610                                 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2611                                         STATUS_EXIT_PENDING;
2612                 goto exit;
2613         }
2614
2615         /* ...otherwise clear out all the status bits but the RF Kill
2616          * bit and continue taking the NIC down. */
2617         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2618                                 STATUS_RF_KILL_HW |
2619                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2620                                 STATUS_GEO_CONFIGURED |
2621                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2622                                 STATUS_FW_ERROR |
2623                         test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2624                                 STATUS_EXIT_PENDING;
2625
2626         iwl3945_hw_txq_ctx_stop(priv);
2627         iwl3945_hw_rxq_stop(priv);
2628
2629         /* Power-down device's busmaster DMA clocks */
2630         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2631         udelay(5);
2632
2633         /* Stop the device, and put it in low power state */
2634         iwl_apm_stop(priv);
2635
2636  exit:
2637         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2638
2639         if (priv->beacon_skb)
2640                 dev_kfree_skb(priv->beacon_skb);
2641         priv->beacon_skb = NULL;
2642
2643         /* clear out any free frames */
2644         iwl3945_clear_free_frames(priv);
2645 }
2646
2647 static void iwl3945_down(struct iwl_priv *priv)
2648 {
2649         mutex_lock(&priv->mutex);
2650         __iwl3945_down(priv);
2651         mutex_unlock(&priv->mutex);
2652
2653         iwl3945_cancel_deferred_work(priv);
2654 }
2655
2656 #define MAX_HW_RESTARTS 5
2657
2658 static int iwl3945_alloc_bcast_station(struct iwl_priv *priv)
2659 {
2660         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2661         unsigned long flags;
2662         u8 sta_id;
2663
2664         spin_lock_irqsave(&priv->sta_lock, flags);
2665         sta_id = iwl_prep_station(priv, ctx, iwl_bcast_addr, false, NULL);
2666         if (sta_id == IWL_INVALID_STATION) {
2667                 IWL_ERR(priv, "Unable to prepare broadcast station\n");
2668                 spin_unlock_irqrestore(&priv->sta_lock, flags);
2669
2670                 return -EINVAL;
2671         }
2672
2673         priv->stations[sta_id].used |= IWL_STA_DRIVER_ACTIVE;
2674         priv->stations[sta_id].used |= IWL_STA_BCAST;
2675         spin_unlock_irqrestore(&priv->sta_lock, flags);
2676
2677         return 0;
2678 }
2679
2680 static int __iwl3945_up(struct iwl_priv *priv)
2681 {
2682         int rc, i;
2683
2684         rc = iwl3945_alloc_bcast_station(priv);
2685         if (rc)
2686                 return rc;
2687
2688         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2689                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2690                 return -EIO;
2691         }
2692
2693         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2694                 IWL_ERR(priv, "ucode not available for device bring up\n");
2695                 return -EIO;
2696         }
2697
2698         /* If platform's RF_KILL switch is NOT set to KILL */
2699         if (iwl_read32(priv, CSR_GP_CNTRL) &
2700                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2701                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2702         else {
2703                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2704                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2705                 return -ENODEV;
2706         }
2707
2708         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2709
2710         rc = iwl3945_hw_nic_init(priv);
2711         if (rc) {
2712                 IWL_ERR(priv, "Unable to int nic\n");
2713                 return rc;
2714         }
2715
2716         /* make sure rfkill handshake bits are cleared */
2717         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2718         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2719                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2720
2721         /* clear (again), then enable host interrupts */
2722         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2723         iwl_enable_interrupts(priv);
2724
2725         /* really make sure rfkill handshake bits are cleared */
2726         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2727         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2728
2729         /* Copy original ucode data image from disk into backup cache.
2730          * This will be used to initialize the on-board processor's
2731          * data SRAM for a clean start when the runtime program first loads. */
2732         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2733                priv->ucode_data.len);
2734
2735         /* We return success when we resume from suspend and rf_kill is on. */
2736         if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2737                 return 0;
2738
2739         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2740
2741                 /* load bootstrap state machine,
2742                  * load bootstrap program into processor's memory,
2743                  * prepare to load the "initialize" uCode */
2744                 rc = priv->cfg->ops->lib->load_ucode(priv);
2745
2746                 if (rc) {
2747                         IWL_ERR(priv,
2748                                 "Unable to set up bootstrap uCode: %d\n", rc);
2749                         continue;
2750                 }
2751
2752                 /* start card; "initialize" will load runtime ucode */
2753                 iwl3945_nic_start(priv);
2754
2755                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2756
2757                 return 0;
2758         }
2759
2760         set_bit(STATUS_EXIT_PENDING, &priv->status);
2761         __iwl3945_down(priv);
2762         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2763
2764         /* tried to restart and config the device for as long as our
2765          * patience could withstand */
2766         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2767         return -EIO;
2768 }
2769
2770
2771 /*****************************************************************************
2772  *
2773  * Workqueue callbacks
2774  *
2775  *****************************************************************************/
2776
2777 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2778 {
2779         struct iwl_priv *priv =
2780             container_of(data, struct iwl_priv, init_alive_start.work);
2781
2782         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2783                 return;
2784
2785         mutex_lock(&priv->mutex);
2786         iwl3945_init_alive_start(priv);
2787         mutex_unlock(&priv->mutex);
2788 }
2789
2790 static void iwl3945_bg_alive_start(struct work_struct *data)
2791 {
2792         struct iwl_priv *priv =
2793             container_of(data, struct iwl_priv, alive_start.work);
2794
2795         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2796                 return;
2797
2798         mutex_lock(&priv->mutex);
2799         iwl3945_alive_start(priv);
2800         mutex_unlock(&priv->mutex);
2801 }
2802
2803 /*
2804  * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2805  * driver must poll CSR_GP_CNTRL_REG register for change.  This register
2806  * *is* readable even when device has been SW_RESET into low power mode
2807  * (e.g. during RF KILL).
2808  */
2809 static void iwl3945_rfkill_poll(struct work_struct *data)
2810 {
2811         struct iwl_priv *priv =
2812             container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2813         bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2814         bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2815                         & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2816
2817         if (new_rfkill != old_rfkill) {
2818                 if (new_rfkill)
2819                         set_bit(STATUS_RF_KILL_HW, &priv->status);
2820                 else
2821                         clear_bit(STATUS_RF_KILL_HW, &priv->status);
2822
2823                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2824
2825                 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2826                                 new_rfkill ? "disable radio" : "enable radio");
2827         }
2828
2829         /* Keep this running, even if radio now enabled.  This will be
2830          * cancelled in mac_start() if system decides to start again */
2831         queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2832                            round_jiffies_relative(2 * HZ));
2833
2834 }
2835
2836 int iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
2837 {
2838         struct iwl_host_cmd cmd = {
2839                 .id = REPLY_SCAN_CMD,
2840                 .len = sizeof(struct iwl3945_scan_cmd),
2841                 .flags = CMD_SIZE_HUGE,
2842         };
2843         struct iwl3945_scan_cmd *scan;
2844         u8 n_probes = 0;
2845         enum ieee80211_band band;
2846         bool is_active = false;
2847         int ret;
2848
2849         lockdep_assert_held(&priv->mutex);
2850
2851         if (!priv->scan_cmd) {
2852                 priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2853                                          IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2854                 if (!priv->scan_cmd) {
2855                         IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2856                         return -ENOMEM;
2857                 }
2858         }
2859         scan = priv->scan_cmd;
2860         memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2861
2862         scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2863         scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2864
2865         if (iwl_is_associated(priv, IWL_RXON_CTX_BSS)) {
2866                 u16 interval = 0;
2867                 u32 extra;
2868                 u32 suspend_time = 100;
2869                 u32 scan_suspend_time = 100;
2870                 unsigned long flags;
2871
2872                 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2873
2874                 spin_lock_irqsave(&priv->lock, flags);
2875                 if (priv->is_internal_short_scan)
2876                         interval = 0;
2877                 else
2878                         interval = vif->bss_conf.beacon_int;
2879                 spin_unlock_irqrestore(&priv->lock, flags);
2880
2881                 scan->suspend_time = 0;
2882                 scan->max_out_time = cpu_to_le32(200 * 1024);
2883                 if (!interval)
2884                         interval = suspend_time;
2885                 /*
2886                  * suspend time format:
2887                  *  0-19: beacon interval in usec (time before exec.)
2888                  * 20-23: 0
2889                  * 24-31: number of beacons (suspend between channels)
2890                  */
2891
2892                 extra = (suspend_time / interval) << 24;
2893                 scan_suspend_time = 0xFF0FFFFF &
2894                     (extra | ((suspend_time % interval) * 1024));
2895
2896                 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2897                 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2898                                scan_suspend_time, interval);
2899         }
2900
2901         if (priv->is_internal_short_scan) {
2902                 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2903         } else if (priv->scan_request->n_ssids) {
2904                 int i, p = 0;
2905                 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2906                 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2907                         /* always does wildcard anyway */
2908                         if (!priv->scan_request->ssids[i].ssid_len)
2909                                 continue;
2910                         scan->direct_scan[p].id = WLAN_EID_SSID;
2911                         scan->direct_scan[p].len =
2912                                 priv->scan_request->ssids[i].ssid_len;
2913                         memcpy(scan->direct_scan[p].ssid,
2914                                priv->scan_request->ssids[i].ssid,
2915                                priv->scan_request->ssids[i].ssid_len);
2916                         n_probes++;
2917                         p++;
2918                 }
2919                 is_active = true;
2920         } else
2921                 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2922
2923         /* We don't build a direct scan probe request; the uCode will do
2924          * that based on the direct_mask added to each channel entry */
2925         scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2926         scan->tx_cmd.sta_id = priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
2927         scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2928
2929         /* flags + rate selection */
2930
2931         switch (priv->scan_band) {
2932         case IEEE80211_BAND_2GHZ:
2933                 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2934                 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2935                 band = IEEE80211_BAND_2GHZ;
2936                 break;
2937         case IEEE80211_BAND_5GHZ:
2938                 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2939                 band = IEEE80211_BAND_5GHZ;
2940                 break;
2941         default:
2942                 IWL_WARN(priv, "Invalid scan band\n");
2943                 return -EIO;
2944         }
2945
2946         /*
2947          * If active scaning is requested but a certain channel
2948          * is marked passive, we can do active scanning if we
2949          * detect transmissions.
2950          */
2951         scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2952                                         IWL_GOOD_CRC_TH_DISABLED;
2953
2954         if (!priv->is_internal_short_scan) {
2955                 scan->tx_cmd.len = cpu_to_le16(
2956                         iwl_fill_probe_req(priv,
2957                                 (struct ieee80211_mgmt *)scan->data,
2958                                 vif->addr,
2959                                 priv->scan_request->ie,
2960                                 priv->scan_request->ie_len,
2961                                 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2962         } else {
2963                 /* use bcast addr, will not be transmitted but must be valid */
2964                 scan->tx_cmd.len = cpu_to_le16(
2965                         iwl_fill_probe_req(priv,
2966                                 (struct ieee80211_mgmt *)scan->data,
2967                                 iwl_bcast_addr, NULL, 0,
2968                                 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2969         }
2970         /* select Rx antennas */
2971         scan->flags |= iwl3945_get_antenna_flags(priv);
2972
2973         if (priv->is_internal_short_scan) {
2974                 scan->channel_count =
2975                         iwl3945_get_single_channel_for_scan(priv, vif, band,
2976                                 (void *)&scan->data[le16_to_cpu(
2977                                 scan->tx_cmd.len)]);
2978         } else {
2979                 scan->channel_count =
2980                         iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2981                                 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
2982         }
2983
2984         if (scan->channel_count == 0) {
2985                 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2986                 return -EIO;
2987         }
2988
2989         cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2990             scan->channel_count * sizeof(struct iwl3945_scan_channel);
2991         cmd.data = scan;
2992         scan->len = cpu_to_le16(cmd.len);
2993
2994         set_bit(STATUS_SCAN_HW, &priv->status);
2995         ret = iwl_send_cmd_sync(priv, &cmd);
2996         if (ret)
2997                 clear_bit(STATUS_SCAN_HW, &priv->status);
2998         return ret;
2999 }
3000
3001 void iwl3945_post_scan(struct iwl_priv *priv)
3002 {
3003         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3004
3005         /*
3006          * Since setting the RXON may have been deferred while
3007          * performing the scan, fire one off if needed
3008          */
3009         if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
3010                 iwl3945_commit_rxon(priv, ctx);
3011 }
3012
3013 static void iwl3945_bg_restart(struct work_struct *data)
3014 {
3015         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3016
3017         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3018                 return;
3019
3020         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3021                 struct iwl_rxon_context *ctx;
3022                 mutex_lock(&priv->mutex);
3023                 for_each_context(priv, ctx)
3024                         ctx->vif = NULL;
3025                 priv->is_open = 0;
3026                 mutex_unlock(&priv->mutex);
3027                 iwl3945_down(priv);
3028                 ieee80211_restart_hw(priv->hw);
3029         } else {
3030                 iwl3945_down(priv);
3031
3032                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3033                         return;
3034
3035                 mutex_lock(&priv->mutex);
3036                 __iwl3945_up(priv);
3037                 mutex_unlock(&priv->mutex);
3038         }
3039 }
3040
3041 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3042 {
3043         struct iwl_priv *priv =
3044             container_of(data, struct iwl_priv, rx_replenish);
3045
3046         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3047                 return;
3048
3049         mutex_lock(&priv->mutex);
3050         iwl3945_rx_replenish(priv);
3051         mutex_unlock(&priv->mutex);
3052 }
3053
3054 void iwl3945_post_associate(struct iwl_priv *priv)
3055 {
3056         int rc = 0;
3057         struct ieee80211_conf *conf = NULL;
3058         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3059