Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[~shefty/rdma-dev.git] / drivers / ssb / main.c
1 /*
2  * Sonics Silicon Backplane
3  * Subsystem core
4  *
5  * Copyright 2005, Broadcom Corporation
6  * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
7  *
8  * Licensed under the GNU/GPL. See COPYING for details.
9  */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/ssb/ssb.h>
18 #include <linux/ssb/ssb_regs.h>
19 #include <linux/ssb/ssb_driver_gige.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/pci.h>
22 #include <linux/mmc/sdio_func.h>
23 #include <linux/slab.h>
24
25 #include <pcmcia/cistpl.h>
26 #include <pcmcia/ds.h>
27
28
29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
30 MODULE_LICENSE("GPL");
31
32
33 /* Temporary list of yet-to-be-attached buses */
34 static LIST_HEAD(attach_queue);
35 /* List if running buses */
36 static LIST_HEAD(buses);
37 /* Software ID counter */
38 static unsigned int next_busnumber;
39 /* buses_mutes locks the two buslists and the next_busnumber.
40  * Don't lock this directly, but use ssb_buses_[un]lock() below. */
41 static DEFINE_MUTEX(buses_mutex);
42
43 /* There are differences in the codeflow, if the bus is
44  * initialized from early boot, as various needed services
45  * are not available early. This is a mechanism to delay
46  * these initializations to after early boot has finished.
47  * It's also used to avoid mutex locking, as that's not
48  * available and needed early. */
49 static bool ssb_is_early_boot = 1;
50
51 static void ssb_buses_lock(void);
52 static void ssb_buses_unlock(void);
53
54
55 #ifdef CONFIG_SSB_PCIHOST
56 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
57 {
58         struct ssb_bus *bus;
59
60         ssb_buses_lock();
61         list_for_each_entry(bus, &buses, list) {
62                 if (bus->bustype == SSB_BUSTYPE_PCI &&
63                     bus->host_pci == pdev)
64                         goto found;
65         }
66         bus = NULL;
67 found:
68         ssb_buses_unlock();
69
70         return bus;
71 }
72 #endif /* CONFIG_SSB_PCIHOST */
73
74 #ifdef CONFIG_SSB_PCMCIAHOST
75 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
76 {
77         struct ssb_bus *bus;
78
79         ssb_buses_lock();
80         list_for_each_entry(bus, &buses, list) {
81                 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
82                     bus->host_pcmcia == pdev)
83                         goto found;
84         }
85         bus = NULL;
86 found:
87         ssb_buses_unlock();
88
89         return bus;
90 }
91 #endif /* CONFIG_SSB_PCMCIAHOST */
92
93 #ifdef CONFIG_SSB_SDIOHOST
94 struct ssb_bus *ssb_sdio_func_to_bus(struct sdio_func *func)
95 {
96         struct ssb_bus *bus;
97
98         ssb_buses_lock();
99         list_for_each_entry(bus, &buses, list) {
100                 if (bus->bustype == SSB_BUSTYPE_SDIO &&
101                     bus->host_sdio == func)
102                         goto found;
103         }
104         bus = NULL;
105 found:
106         ssb_buses_unlock();
107
108         return bus;
109 }
110 #endif /* CONFIG_SSB_SDIOHOST */
111
112 int ssb_for_each_bus_call(unsigned long data,
113                           int (*func)(struct ssb_bus *bus, unsigned long data))
114 {
115         struct ssb_bus *bus;
116         int res;
117
118         ssb_buses_lock();
119         list_for_each_entry(bus, &buses, list) {
120                 res = func(bus, data);
121                 if (res >= 0) {
122                         ssb_buses_unlock();
123                         return res;
124                 }
125         }
126         ssb_buses_unlock();
127
128         return -ENODEV;
129 }
130
131 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
132 {
133         if (dev)
134                 get_device(dev->dev);
135         return dev;
136 }
137
138 static void ssb_device_put(struct ssb_device *dev)
139 {
140         if (dev)
141                 put_device(dev->dev);
142 }
143
144 static int ssb_device_resume(struct device *dev)
145 {
146         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
147         struct ssb_driver *ssb_drv;
148         int err = 0;
149
150         if (dev->driver) {
151                 ssb_drv = drv_to_ssb_drv(dev->driver);
152                 if (ssb_drv && ssb_drv->resume)
153                         err = ssb_drv->resume(ssb_dev);
154                 if (err)
155                         goto out;
156         }
157 out:
158         return err;
159 }
160
161 static int ssb_device_suspend(struct device *dev, pm_message_t state)
162 {
163         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
164         struct ssb_driver *ssb_drv;
165         int err = 0;
166
167         if (dev->driver) {
168                 ssb_drv = drv_to_ssb_drv(dev->driver);
169                 if (ssb_drv && ssb_drv->suspend)
170                         err = ssb_drv->suspend(ssb_dev, state);
171                 if (err)
172                         goto out;
173         }
174 out:
175         return err;
176 }
177
178 int ssb_bus_resume(struct ssb_bus *bus)
179 {
180         int err;
181
182         /* Reset HW state information in memory, so that HW is
183          * completely reinitialized. */
184         bus->mapped_device = NULL;
185 #ifdef CONFIG_SSB_DRIVER_PCICORE
186         bus->pcicore.setup_done = 0;
187 #endif
188
189         err = ssb_bus_powerup(bus, 0);
190         if (err)
191                 return err;
192         err = ssb_pcmcia_hardware_setup(bus);
193         if (err) {
194                 ssb_bus_may_powerdown(bus);
195                 return err;
196         }
197         ssb_chipco_resume(&bus->chipco);
198         ssb_bus_may_powerdown(bus);
199
200         return 0;
201 }
202 EXPORT_SYMBOL(ssb_bus_resume);
203
204 int ssb_bus_suspend(struct ssb_bus *bus)
205 {
206         ssb_chipco_suspend(&bus->chipco);
207         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
208
209         return 0;
210 }
211 EXPORT_SYMBOL(ssb_bus_suspend);
212
213 #ifdef CONFIG_SSB_SPROM
214 /** ssb_devices_freeze - Freeze all devices on the bus.
215  *
216  * After freezing no device driver will be handling a device
217  * on this bus anymore. ssb_devices_thaw() must be called after
218  * a successful freeze to reactivate the devices.
219  *
220  * @bus: The bus.
221  * @ctx: Context structure. Pass this to ssb_devices_thaw().
222  */
223 int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx)
224 {
225         struct ssb_device *sdev;
226         struct ssb_driver *sdrv;
227         unsigned int i;
228
229         memset(ctx, 0, sizeof(*ctx));
230         ctx->bus = bus;
231         SSB_WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen));
232
233         for (i = 0; i < bus->nr_devices; i++) {
234                 sdev = ssb_device_get(&bus->devices[i]);
235
236                 if (!sdev->dev || !sdev->dev->driver ||
237                     !device_is_registered(sdev->dev)) {
238                         ssb_device_put(sdev);
239                         continue;
240                 }
241                 sdrv = drv_to_ssb_drv(sdev->dev->driver);
242                 if (SSB_WARN_ON(!sdrv->remove))
243                         continue;
244                 sdrv->remove(sdev);
245                 ctx->device_frozen[i] = 1;
246         }
247
248         return 0;
249 }
250
251 /** ssb_devices_thaw - Unfreeze all devices on the bus.
252  *
253  * This will re-attach the device drivers and re-init the devices.
254  *
255  * @ctx: The context structure from ssb_devices_freeze()
256  */
257 int ssb_devices_thaw(struct ssb_freeze_context *ctx)
258 {
259         struct ssb_bus *bus = ctx->bus;
260         struct ssb_device *sdev;
261         struct ssb_driver *sdrv;
262         unsigned int i;
263         int err, result = 0;
264
265         for (i = 0; i < bus->nr_devices; i++) {
266                 if (!ctx->device_frozen[i])
267                         continue;
268                 sdev = &bus->devices[i];
269
270                 if (SSB_WARN_ON(!sdev->dev || !sdev->dev->driver))
271                         continue;
272                 sdrv = drv_to_ssb_drv(sdev->dev->driver);
273                 if (SSB_WARN_ON(!sdrv || !sdrv->probe))
274                         continue;
275
276                 err = sdrv->probe(sdev, &sdev->id);
277                 if (err) {
278                         ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
279                                    dev_name(sdev->dev));
280                         result = err;
281                 }
282                 ssb_device_put(sdev);
283         }
284
285         return result;
286 }
287 #endif /* CONFIG_SSB_SPROM */
288
289 static void ssb_device_shutdown(struct device *dev)
290 {
291         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
292         struct ssb_driver *ssb_drv;
293
294         if (!dev->driver)
295                 return;
296         ssb_drv = drv_to_ssb_drv(dev->driver);
297         if (ssb_drv && ssb_drv->shutdown)
298                 ssb_drv->shutdown(ssb_dev);
299 }
300
301 static int ssb_device_remove(struct device *dev)
302 {
303         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
304         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
305
306         if (ssb_drv && ssb_drv->remove)
307                 ssb_drv->remove(ssb_dev);
308         ssb_device_put(ssb_dev);
309
310         return 0;
311 }
312
313 static int ssb_device_probe(struct device *dev)
314 {
315         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
316         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
317         int err = 0;
318
319         ssb_device_get(ssb_dev);
320         if (ssb_drv && ssb_drv->probe)
321                 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
322         if (err)
323                 ssb_device_put(ssb_dev);
324
325         return err;
326 }
327
328 static int ssb_match_devid(const struct ssb_device_id *tabid,
329                            const struct ssb_device_id *devid)
330 {
331         if ((tabid->vendor != devid->vendor) &&
332             tabid->vendor != SSB_ANY_VENDOR)
333                 return 0;
334         if ((tabid->coreid != devid->coreid) &&
335             tabid->coreid != SSB_ANY_ID)
336                 return 0;
337         if ((tabid->revision != devid->revision) &&
338             tabid->revision != SSB_ANY_REV)
339                 return 0;
340         return 1;
341 }
342
343 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
344 {
345         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
346         struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
347         const struct ssb_device_id *id;
348
349         for (id = ssb_drv->id_table;
350              id->vendor || id->coreid || id->revision;
351              id++) {
352                 if (ssb_match_devid(id, &ssb_dev->id))
353                         return 1; /* found */
354         }
355
356         return 0;
357 }
358
359 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
360 {
361         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
362
363         if (!dev)
364                 return -ENODEV;
365
366         return add_uevent_var(env,
367                              "MODALIAS=ssb:v%04Xid%04Xrev%02X",
368                              ssb_dev->id.vendor, ssb_dev->id.coreid,
369                              ssb_dev->id.revision);
370 }
371
372 #define ssb_config_attr(attrib, field, format_string) \
373 static ssize_t \
374 attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
375 { \
376         return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
377 }
378
379 ssb_config_attr(core_num, core_index, "%u\n")
380 ssb_config_attr(coreid, id.coreid, "0x%04x\n")
381 ssb_config_attr(vendor, id.vendor, "0x%04x\n")
382 ssb_config_attr(revision, id.revision, "%u\n")
383 ssb_config_attr(irq, irq, "%u\n")
384 static ssize_t
385 name_show(struct device *dev, struct device_attribute *attr, char *buf)
386 {
387         return sprintf(buf, "%s\n",
388                        ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
389 }
390
391 static struct device_attribute ssb_device_attrs[] = {
392         __ATTR_RO(name),
393         __ATTR_RO(core_num),
394         __ATTR_RO(coreid),
395         __ATTR_RO(vendor),
396         __ATTR_RO(revision),
397         __ATTR_RO(irq),
398         __ATTR_NULL,
399 };
400
401 static struct bus_type ssb_bustype = {
402         .name           = "ssb",
403         .match          = ssb_bus_match,
404         .probe          = ssb_device_probe,
405         .remove         = ssb_device_remove,
406         .shutdown       = ssb_device_shutdown,
407         .suspend        = ssb_device_suspend,
408         .resume         = ssb_device_resume,
409         .uevent         = ssb_device_uevent,
410         .dev_attrs      = ssb_device_attrs,
411 };
412
413 static void ssb_buses_lock(void)
414 {
415         /* See the comment at the ssb_is_early_boot definition */
416         if (!ssb_is_early_boot)
417                 mutex_lock(&buses_mutex);
418 }
419
420 static void ssb_buses_unlock(void)
421 {
422         /* See the comment at the ssb_is_early_boot definition */
423         if (!ssb_is_early_boot)
424                 mutex_unlock(&buses_mutex);
425 }
426
427 static void ssb_devices_unregister(struct ssb_bus *bus)
428 {
429         struct ssb_device *sdev;
430         int i;
431
432         for (i = bus->nr_devices - 1; i >= 0; i--) {
433                 sdev = &(bus->devices[i]);
434                 if (sdev->dev)
435                         device_unregister(sdev->dev);
436         }
437
438 #ifdef CONFIG_SSB_EMBEDDED
439         if (bus->bustype == SSB_BUSTYPE_SSB)
440                 platform_device_unregister(bus->watchdog);
441 #endif
442 }
443
444 void ssb_bus_unregister(struct ssb_bus *bus)
445 {
446         int err;
447
448         err = ssb_gpio_unregister(bus);
449         if (err == -EBUSY)
450                 ssb_dprintk(KERN_ERR PFX "Some GPIOs are still in use.\n");
451         else if (err)
452                 ssb_dprintk(KERN_ERR PFX
453                             "Can not unregister GPIO driver: %i\n", err);
454
455         ssb_buses_lock();
456         ssb_devices_unregister(bus);
457         list_del(&bus->list);
458         ssb_buses_unlock();
459
460         ssb_pcmcia_exit(bus);
461         ssb_pci_exit(bus);
462         ssb_iounmap(bus);
463 }
464 EXPORT_SYMBOL(ssb_bus_unregister);
465
466 static void ssb_release_dev(struct device *dev)
467 {
468         struct __ssb_dev_wrapper *devwrap;
469
470         devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
471         kfree(devwrap);
472 }
473
474 static int ssb_devices_register(struct ssb_bus *bus)
475 {
476         struct ssb_device *sdev;
477         struct device *dev;
478         struct __ssb_dev_wrapper *devwrap;
479         int i, err = 0;
480         int dev_idx = 0;
481
482         for (i = 0; i < bus->nr_devices; i++) {
483                 sdev = &(bus->devices[i]);
484
485                 /* We don't register SSB-system devices to the kernel,
486                  * as the drivers for them are built into SSB. */
487                 switch (sdev->id.coreid) {
488                 case SSB_DEV_CHIPCOMMON:
489                 case SSB_DEV_PCI:
490                 case SSB_DEV_PCIE:
491                 case SSB_DEV_PCMCIA:
492                 case SSB_DEV_MIPS:
493                 case SSB_DEV_MIPS_3302:
494                 case SSB_DEV_EXTIF:
495                         continue;
496                 }
497
498                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
499                 if (!devwrap) {
500                         ssb_printk(KERN_ERR PFX
501                                    "Could not allocate device\n");
502                         err = -ENOMEM;
503                         goto error;
504                 }
505                 dev = &devwrap->dev;
506                 devwrap->sdev = sdev;
507
508                 dev->release = ssb_release_dev;
509                 dev->bus = &ssb_bustype;
510                 dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx);
511
512                 switch (bus->bustype) {
513                 case SSB_BUSTYPE_PCI:
514 #ifdef CONFIG_SSB_PCIHOST
515                         sdev->irq = bus->host_pci->irq;
516                         dev->parent = &bus->host_pci->dev;
517                         sdev->dma_dev = dev->parent;
518 #endif
519                         break;
520                 case SSB_BUSTYPE_PCMCIA:
521 #ifdef CONFIG_SSB_PCMCIAHOST
522                         sdev->irq = bus->host_pcmcia->irq;
523                         dev->parent = &bus->host_pcmcia->dev;
524 #endif
525                         break;
526                 case SSB_BUSTYPE_SDIO:
527 #ifdef CONFIG_SSB_SDIOHOST
528                         dev->parent = &bus->host_sdio->dev;
529 #endif
530                         break;
531                 case SSB_BUSTYPE_SSB:
532                         dev->dma_mask = &dev->coherent_dma_mask;
533                         sdev->dma_dev = dev;
534                         break;
535                 }
536
537                 sdev->dev = dev;
538                 err = device_register(dev);
539                 if (err) {
540                         ssb_printk(KERN_ERR PFX
541                                    "Could not register %s\n",
542                                    dev_name(dev));
543                         /* Set dev to NULL to not unregister
544                          * dev on error unwinding. */
545                         sdev->dev = NULL;
546                         kfree(devwrap);
547                         goto error;
548                 }
549                 dev_idx++;
550         }
551
552         return 0;
553 error:
554         /* Unwind the already registered devices. */
555         ssb_devices_unregister(bus);
556         return err;
557 }
558
559 /* Needs ssb_buses_lock() */
560 static int ssb_attach_queued_buses(void)
561 {
562         struct ssb_bus *bus, *n;
563         int err = 0;
564         int drop_them_all = 0;
565
566         list_for_each_entry_safe(bus, n, &attach_queue, list) {
567                 if (drop_them_all) {
568                         list_del(&bus->list);
569                         continue;
570                 }
571                 /* Can't init the PCIcore in ssb_bus_register(), as that
572                  * is too early in boot for embedded systems
573                  * (no udelay() available). So do it here in attach stage.
574                  */
575                 err = ssb_bus_powerup(bus, 0);
576                 if (err)
577                         goto error;
578                 ssb_pcicore_init(&bus->pcicore);
579                 if (bus->bustype == SSB_BUSTYPE_SSB)
580                         ssb_watchdog_register(bus);
581                 ssb_bus_may_powerdown(bus);
582
583                 err = ssb_devices_register(bus);
584 error:
585                 if (err) {
586                         drop_them_all = 1;
587                         list_del(&bus->list);
588                         continue;
589                 }
590                 list_move_tail(&bus->list, &buses);
591         }
592
593         return err;
594 }
595
596 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
597 {
598         struct ssb_bus *bus = dev->bus;
599
600         offset += dev->core_index * SSB_CORE_SIZE;
601         return readb(bus->mmio + offset);
602 }
603
604 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
605 {
606         struct ssb_bus *bus = dev->bus;
607
608         offset += dev->core_index * SSB_CORE_SIZE;
609         return readw(bus->mmio + offset);
610 }
611
612 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
613 {
614         struct ssb_bus *bus = dev->bus;
615
616         offset += dev->core_index * SSB_CORE_SIZE;
617         return readl(bus->mmio + offset);
618 }
619
620 #ifdef CONFIG_SSB_BLOCKIO
621 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
622                                size_t count, u16 offset, u8 reg_width)
623 {
624         struct ssb_bus *bus = dev->bus;
625         void __iomem *addr;
626
627         offset += dev->core_index * SSB_CORE_SIZE;
628         addr = bus->mmio + offset;
629
630         switch (reg_width) {
631         case sizeof(u8): {
632                 u8 *buf = buffer;
633
634                 while (count) {
635                         *buf = __raw_readb(addr);
636                         buf++;
637                         count--;
638                 }
639                 break;
640         }
641         case sizeof(u16): {
642                 __le16 *buf = buffer;
643
644                 SSB_WARN_ON(count & 1);
645                 while (count) {
646                         *buf = (__force __le16)__raw_readw(addr);
647                         buf++;
648                         count -= 2;
649                 }
650                 break;
651         }
652         case sizeof(u32): {
653                 __le32 *buf = buffer;
654
655                 SSB_WARN_ON(count & 3);
656                 while (count) {
657                         *buf = (__force __le32)__raw_readl(addr);
658                         buf++;
659                         count -= 4;
660                 }
661                 break;
662         }
663         default:
664                 SSB_WARN_ON(1);
665         }
666 }
667 #endif /* CONFIG_SSB_BLOCKIO */
668
669 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
670 {
671         struct ssb_bus *bus = dev->bus;
672
673         offset += dev->core_index * SSB_CORE_SIZE;
674         writeb(value, bus->mmio + offset);
675 }
676
677 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
678 {
679         struct ssb_bus *bus = dev->bus;
680
681         offset += dev->core_index * SSB_CORE_SIZE;
682         writew(value, bus->mmio + offset);
683 }
684
685 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
686 {
687         struct ssb_bus *bus = dev->bus;
688
689         offset += dev->core_index * SSB_CORE_SIZE;
690         writel(value, bus->mmio + offset);
691 }
692
693 #ifdef CONFIG_SSB_BLOCKIO
694 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
695                                 size_t count, u16 offset, u8 reg_width)
696 {
697         struct ssb_bus *bus = dev->bus;
698         void __iomem *addr;
699
700         offset += dev->core_index * SSB_CORE_SIZE;
701         addr = bus->mmio + offset;
702
703         switch (reg_width) {
704         case sizeof(u8): {
705                 const u8 *buf = buffer;
706
707                 while (count) {
708                         __raw_writeb(*buf, addr);
709                         buf++;
710                         count--;
711                 }
712                 break;
713         }
714         case sizeof(u16): {
715                 const __le16 *buf = buffer;
716
717                 SSB_WARN_ON(count & 1);
718                 while (count) {
719                         __raw_writew((__force u16)(*buf), addr);
720                         buf++;
721                         count -= 2;
722                 }
723                 break;
724         }
725         case sizeof(u32): {
726                 const __le32 *buf = buffer;
727
728                 SSB_WARN_ON(count & 3);
729                 while (count) {
730                         __raw_writel((__force u32)(*buf), addr);
731                         buf++;
732                         count -= 4;
733                 }
734                 break;
735         }
736         default:
737                 SSB_WARN_ON(1);
738         }
739 }
740 #endif /* CONFIG_SSB_BLOCKIO */
741
742 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
743 static const struct ssb_bus_ops ssb_ssb_ops = {
744         .read8          = ssb_ssb_read8,
745         .read16         = ssb_ssb_read16,
746         .read32         = ssb_ssb_read32,
747         .write8         = ssb_ssb_write8,
748         .write16        = ssb_ssb_write16,
749         .write32        = ssb_ssb_write32,
750 #ifdef CONFIG_SSB_BLOCKIO
751         .block_read     = ssb_ssb_block_read,
752         .block_write    = ssb_ssb_block_write,
753 #endif
754 };
755
756 static int ssb_fetch_invariants(struct ssb_bus *bus,
757                                 ssb_invariants_func_t get_invariants)
758 {
759         struct ssb_init_invariants iv;
760         int err;
761
762         memset(&iv, 0, sizeof(iv));
763         err = get_invariants(bus, &iv);
764         if (err)
765                 goto out;
766         memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
767         memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
768         bus->has_cardbus_slot = iv.has_cardbus_slot;
769 out:
770         return err;
771 }
772
773 static int ssb_bus_register(struct ssb_bus *bus,
774                             ssb_invariants_func_t get_invariants,
775                             unsigned long baseaddr)
776 {
777         int err;
778
779         spin_lock_init(&bus->bar_lock);
780         INIT_LIST_HEAD(&bus->list);
781 #ifdef CONFIG_SSB_EMBEDDED
782         spin_lock_init(&bus->gpio_lock);
783 #endif
784
785         /* Powerup the bus */
786         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
787         if (err)
788                 goto out;
789
790         /* Init SDIO-host device (if any), before the scan */
791         err = ssb_sdio_init(bus);
792         if (err)
793                 goto err_disable_xtal;
794
795         ssb_buses_lock();
796         bus->busnumber = next_busnumber;
797         /* Scan for devices (cores) */
798         err = ssb_bus_scan(bus, baseaddr);
799         if (err)
800                 goto err_sdio_exit;
801
802         /* Init PCI-host device (if any) */
803         err = ssb_pci_init(bus);
804         if (err)
805                 goto err_unmap;
806         /* Init PCMCIA-host device (if any) */
807         err = ssb_pcmcia_init(bus);
808         if (err)
809                 goto err_pci_exit;
810
811         /* Initialize basic system devices (if available) */
812         err = ssb_bus_powerup(bus, 0);
813         if (err)
814                 goto err_pcmcia_exit;
815         ssb_chipcommon_init(&bus->chipco);
816         ssb_extif_init(&bus->extif);
817         ssb_mipscore_init(&bus->mipscore);
818         err = ssb_gpio_init(bus);
819         if (err == -ENOTSUPP)
820                 ssb_dprintk(KERN_DEBUG PFX "GPIO driver not activated\n");
821         else if (err)
822                 ssb_dprintk(KERN_ERR PFX
823                            "Error registering GPIO driver: %i\n", err);
824         err = ssb_fetch_invariants(bus, get_invariants);
825         if (err) {
826                 ssb_bus_may_powerdown(bus);
827                 goto err_pcmcia_exit;
828         }
829         ssb_bus_may_powerdown(bus);
830
831         /* Queue it for attach.
832          * See the comment at the ssb_is_early_boot definition. */
833         list_add_tail(&bus->list, &attach_queue);
834         if (!ssb_is_early_boot) {
835                 /* This is not early boot, so we must attach the bus now */
836                 err = ssb_attach_queued_buses();
837                 if (err)
838                         goto err_dequeue;
839         }
840         next_busnumber++;
841         ssb_buses_unlock();
842
843 out:
844         return err;
845
846 err_dequeue:
847         list_del(&bus->list);
848 err_pcmcia_exit:
849         ssb_pcmcia_exit(bus);
850 err_pci_exit:
851         ssb_pci_exit(bus);
852 err_unmap:
853         ssb_iounmap(bus);
854 err_sdio_exit:
855         ssb_sdio_exit(bus);
856 err_disable_xtal:
857         ssb_buses_unlock();
858         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
859         return err;
860 }
861
862 #ifdef CONFIG_SSB_PCIHOST
863 int ssb_bus_pcibus_register(struct ssb_bus *bus, struct pci_dev *host_pci)
864 {
865         int err;
866
867         bus->bustype = SSB_BUSTYPE_PCI;
868         bus->host_pci = host_pci;
869         bus->ops = &ssb_pci_ops;
870
871         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
872         if (!err) {
873                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
874                            "PCI device %s\n", dev_name(&host_pci->dev));
875         } else {
876                 ssb_printk(KERN_ERR PFX "Failed to register PCI version"
877                            " of SSB with error %d\n", err);
878         }
879
880         return err;
881 }
882 EXPORT_SYMBOL(ssb_bus_pcibus_register);
883 #endif /* CONFIG_SSB_PCIHOST */
884
885 #ifdef CONFIG_SSB_PCMCIAHOST
886 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
887                                struct pcmcia_device *pcmcia_dev,
888                                unsigned long baseaddr)
889 {
890         int err;
891
892         bus->bustype = SSB_BUSTYPE_PCMCIA;
893         bus->host_pcmcia = pcmcia_dev;
894         bus->ops = &ssb_pcmcia_ops;
895
896         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
897         if (!err) {
898                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
899                            "PCMCIA device %s\n", pcmcia_dev->devname);
900         }
901
902         return err;
903 }
904 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
905 #endif /* CONFIG_SSB_PCMCIAHOST */
906
907 #ifdef CONFIG_SSB_SDIOHOST
908 int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
909                              unsigned int quirks)
910 {
911         int err;
912
913         bus->bustype = SSB_BUSTYPE_SDIO;
914         bus->host_sdio = func;
915         bus->ops = &ssb_sdio_ops;
916         bus->quirks = quirks;
917
918         err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
919         if (!err) {
920                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
921                            "SDIO device %s\n", sdio_func_id(func));
922         }
923
924         return err;
925 }
926 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
927 #endif /* CONFIG_SSB_PCMCIAHOST */
928
929 int ssb_bus_ssbbus_register(struct ssb_bus *bus, unsigned long baseaddr,
930                             ssb_invariants_func_t get_invariants)
931 {
932         int err;
933
934         bus->bustype = SSB_BUSTYPE_SSB;
935         bus->ops = &ssb_ssb_ops;
936
937         err = ssb_bus_register(bus, get_invariants, baseaddr);
938         if (!err) {
939                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
940                            "address 0x%08lX\n", baseaddr);
941         }
942
943         return err;
944 }
945
946 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
947 {
948         drv->drv.name = drv->name;
949         drv->drv.bus = &ssb_bustype;
950         drv->drv.owner = owner;
951
952         return driver_register(&drv->drv);
953 }
954 EXPORT_SYMBOL(__ssb_driver_register);
955
956 void ssb_driver_unregister(struct ssb_driver *drv)
957 {
958         driver_unregister(&drv->drv);
959 }
960 EXPORT_SYMBOL(ssb_driver_unregister);
961
962 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
963 {
964         struct ssb_bus *bus = dev->bus;
965         struct ssb_device *ent;
966         int i;
967
968         for (i = 0; i < bus->nr_devices; i++) {
969                 ent = &(bus->devices[i]);
970                 if (ent->id.vendor != dev->id.vendor)
971                         continue;
972                 if (ent->id.coreid != dev->id.coreid)
973                         continue;
974
975                 ent->devtypedata = data;
976         }
977 }
978 EXPORT_SYMBOL(ssb_set_devtypedata);
979
980 static u32 clkfactor_f6_resolve(u32 v)
981 {
982         /* map the magic values */
983         switch (v) {
984         case SSB_CHIPCO_CLK_F6_2:
985                 return 2;
986         case SSB_CHIPCO_CLK_F6_3:
987                 return 3;
988         case SSB_CHIPCO_CLK_F6_4:
989                 return 4;
990         case SSB_CHIPCO_CLK_F6_5:
991                 return 5;
992         case SSB_CHIPCO_CLK_F6_6:
993                 return 6;
994         case SSB_CHIPCO_CLK_F6_7:
995                 return 7;
996         }
997         return 0;
998 }
999
1000 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
1001 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
1002 {
1003         u32 n1, n2, clock, m1, m2, m3, mc;
1004
1005         n1 = (n & SSB_CHIPCO_CLK_N1);
1006         n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
1007
1008         switch (plltype) {
1009         case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
1010                 if (m & SSB_CHIPCO_CLK_T6_MMASK)
1011                         return SSB_CHIPCO_CLK_T6_M1;
1012                 return SSB_CHIPCO_CLK_T6_M0;
1013         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1014         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1015         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1016         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1017                 n1 = clkfactor_f6_resolve(n1);
1018                 n2 += SSB_CHIPCO_CLK_F5_BIAS;
1019                 break;
1020         case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
1021                 n1 += SSB_CHIPCO_CLK_T2_BIAS;
1022                 n2 += SSB_CHIPCO_CLK_T2_BIAS;
1023                 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
1024                 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
1025                 break;
1026         case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
1027                 return 100000000;
1028         default:
1029                 SSB_WARN_ON(1);
1030         }
1031
1032         switch (plltype) {
1033         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1034         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1035                 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
1036                 break;
1037         default:
1038                 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
1039         }
1040         if (!clock)
1041                 return 0;
1042
1043         m1 = (m & SSB_CHIPCO_CLK_M1);
1044         m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
1045         m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
1046         mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
1047
1048         switch (plltype) {
1049         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1050         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1051         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1052         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1053                 m1 = clkfactor_f6_resolve(m1);
1054                 if ((plltype == SSB_PLLTYPE_1) ||
1055                     (plltype == SSB_PLLTYPE_3))
1056                         m2 += SSB_CHIPCO_CLK_F5_BIAS;
1057                 else
1058                         m2 = clkfactor_f6_resolve(m2);
1059                 m3 = clkfactor_f6_resolve(m3);
1060
1061                 switch (mc) {
1062                 case SSB_CHIPCO_CLK_MC_BYPASS:
1063                         return clock;
1064                 case SSB_CHIPCO_CLK_MC_M1:
1065                         return (clock / m1);
1066                 case SSB_CHIPCO_CLK_MC_M1M2:
1067                         return (clock / (m1 * m2));
1068                 case SSB_CHIPCO_CLK_MC_M1M2M3:
1069                         return (clock / (m1 * m2 * m3));
1070                 case SSB_CHIPCO_CLK_MC_M1M3:
1071                         return (clock / (m1 * m3));
1072                 }
1073                 return 0;
1074         case SSB_PLLTYPE_2:
1075                 m1 += SSB_CHIPCO_CLK_T2_BIAS;
1076                 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
1077                 m3 += SSB_CHIPCO_CLK_T2_BIAS;
1078                 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
1079                 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
1080                 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
1081
1082                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
1083                         clock /= m1;
1084                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
1085                         clock /= m2;
1086                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
1087                         clock /= m3;
1088                 return clock;
1089         default:
1090                 SSB_WARN_ON(1);
1091         }
1092         return 0;
1093 }
1094
1095 /* Get the current speed the backplane is running at */
1096 u32 ssb_clockspeed(struct ssb_bus *bus)
1097 {
1098         u32 rate;
1099         u32 plltype;
1100         u32 clkctl_n, clkctl_m;
1101
1102         if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
1103                 return ssb_pmu_get_controlclock(&bus->chipco);
1104
1105         if (ssb_extif_available(&bus->extif))
1106                 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1107                                            &clkctl_n, &clkctl_m);
1108         else if (bus->chipco.dev)
1109                 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1110                                             &clkctl_n, &clkctl_m);
1111         else
1112                 return 0;
1113
1114         if (bus->chip_id == 0x5365) {
1115                 rate = 100000000;
1116         } else {
1117                 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1118                 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1119                         rate /= 2;
1120         }
1121
1122         return rate;
1123 }
1124 EXPORT_SYMBOL(ssb_clockspeed);
1125
1126 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1127 {
1128         u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1129
1130         /* The REJECT bit seems to be different for Backplane rev 2.3 */
1131         switch (rev) {
1132         case SSB_IDLOW_SSBREV_22:
1133         case SSB_IDLOW_SSBREV_24:
1134         case SSB_IDLOW_SSBREV_26:
1135                 return SSB_TMSLOW_REJECT;
1136         case SSB_IDLOW_SSBREV_23:
1137                 return SSB_TMSLOW_REJECT_23;
1138         case SSB_IDLOW_SSBREV_25:     /* TODO - find the proper REJECT bit */
1139         case SSB_IDLOW_SSBREV_27:     /* same here */
1140                 return SSB_TMSLOW_REJECT;       /* this is a guess */
1141         default:
1142                 WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1143         }
1144         return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
1145 }
1146
1147 int ssb_device_is_enabled(struct ssb_device *dev)
1148 {
1149         u32 val;
1150         u32 reject;
1151
1152         reject = ssb_tmslow_reject_bitmask(dev);
1153         val = ssb_read32(dev, SSB_TMSLOW);
1154         val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1155
1156         return (val == SSB_TMSLOW_CLOCK);
1157 }
1158 EXPORT_SYMBOL(ssb_device_is_enabled);
1159
1160 static void ssb_flush_tmslow(struct ssb_device *dev)
1161 {
1162         /* Make _really_ sure the device has finished the TMSLOW
1163          * register write transaction, as we risk running into
1164          * a machine check exception otherwise.
1165          * Do this by reading the register back to commit the
1166          * PCI write and delay an additional usec for the device
1167          * to react to the change. */
1168         ssb_read32(dev, SSB_TMSLOW);
1169         udelay(1);
1170 }
1171
1172 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1173 {
1174         u32 val;
1175
1176         ssb_device_disable(dev, core_specific_flags);
1177         ssb_write32(dev, SSB_TMSLOW,
1178                     SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1179                     SSB_TMSLOW_FGC | core_specific_flags);
1180         ssb_flush_tmslow(dev);
1181
1182         /* Clear SERR if set. This is a hw bug workaround. */
1183         if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1184                 ssb_write32(dev, SSB_TMSHIGH, 0);
1185
1186         val = ssb_read32(dev, SSB_IMSTATE);
1187         if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1188                 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1189                 ssb_write32(dev, SSB_IMSTATE, val);
1190         }
1191
1192         ssb_write32(dev, SSB_TMSLOW,
1193                     SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1194                     core_specific_flags);
1195         ssb_flush_tmslow(dev);
1196
1197         ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1198                     core_specific_flags);
1199         ssb_flush_tmslow(dev);
1200 }
1201 EXPORT_SYMBOL(ssb_device_enable);
1202
1203 /* Wait for bitmask in a register to get set or cleared.
1204  * timeout is in units of ten-microseconds */
1205 static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
1206                          int timeout, int set)
1207 {
1208         int i;
1209         u32 val;
1210
1211         for (i = 0; i < timeout; i++) {
1212                 val = ssb_read32(dev, reg);
1213                 if (set) {
1214                         if ((val & bitmask) == bitmask)
1215                                 return 0;
1216                 } else {
1217                         if (!(val & bitmask))
1218                                 return 0;
1219                 }
1220                 udelay(10);
1221         }
1222         printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1223                             "register %04X to %s.\n",
1224                bitmask, reg, (set ? "set" : "clear"));
1225
1226         return -ETIMEDOUT;
1227 }
1228
1229 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1230 {
1231         u32 reject, val;
1232
1233         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1234                 return;
1235
1236         reject = ssb_tmslow_reject_bitmask(dev);
1237
1238         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
1239                 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1240                 ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
1241                 ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1242
1243                 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1244                         val = ssb_read32(dev, SSB_IMSTATE);
1245                         val |= SSB_IMSTATE_REJECT;
1246                         ssb_write32(dev, SSB_IMSTATE, val);
1247                         ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
1248                                       0);
1249                 }
1250
1251                 ssb_write32(dev, SSB_TMSLOW,
1252                         SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1253                         reject | SSB_TMSLOW_RESET |
1254                         core_specific_flags);
1255                 ssb_flush_tmslow(dev);
1256
1257                 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1258                         val = ssb_read32(dev, SSB_IMSTATE);
1259                         val &= ~SSB_IMSTATE_REJECT;
1260                         ssb_write32(dev, SSB_IMSTATE, val);
1261                 }
1262         }
1263
1264         ssb_write32(dev, SSB_TMSLOW,
1265                     reject | SSB_TMSLOW_RESET |
1266                     core_specific_flags);
1267         ssb_flush_tmslow(dev);
1268 }
1269 EXPORT_SYMBOL(ssb_device_disable);
1270
1271 /* Some chipsets need routing known for PCIe and 64-bit DMA */
1272 static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
1273 {
1274         u16 chip_id = dev->bus->chip_id;
1275
1276         if (dev->id.coreid == SSB_DEV_80211) {
1277                 return (chip_id == 0x4322 || chip_id == 43221 ||
1278                         chip_id == 43231 || chip_id == 43222);
1279         }
1280
1281         return 0;
1282 }
1283
1284 u32 ssb_dma_translation(struct ssb_device *dev)
1285 {
1286         switch (dev->bus->bustype) {
1287         case SSB_BUSTYPE_SSB:
1288                 return 0;
1289         case SSB_BUSTYPE_PCI:
1290                 if (pci_is_pcie(dev->bus->host_pci) &&
1291                     ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
1292                         return SSB_PCIE_DMA_H32;
1293                 } else {
1294                         if (ssb_dma_translation_special_bit(dev))
1295                                 return SSB_PCIE_DMA_H32;
1296                         else
1297                                 return SSB_PCI_DMA;
1298                 }
1299         default:
1300                 __ssb_dma_not_implemented(dev);
1301         }
1302         return 0;
1303 }
1304 EXPORT_SYMBOL(ssb_dma_translation);
1305
1306 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1307 {
1308         struct ssb_chipcommon *cc;
1309         int err = 0;
1310
1311         /* On buses where more than one core may be working
1312          * at a time, we must not powerdown stuff if there are
1313          * still cores that may want to run. */
1314         if (bus->bustype == SSB_BUSTYPE_SSB)
1315                 goto out;
1316
1317         cc = &bus->chipco;
1318
1319         if (!cc->dev)
1320                 goto out;
1321         if (cc->dev->id.revision < 5)
1322                 goto out;
1323
1324         ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1325         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1326         if (err)
1327                 goto error;
1328 out:
1329 #ifdef CONFIG_SSB_DEBUG
1330         bus->powered_up = 0;
1331 #endif
1332         return err;
1333 error:
1334         ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1335         goto out;
1336 }
1337 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1338
1339 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1340 {
1341         int err;
1342         enum ssb_clkmode mode;
1343
1344         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1345         if (err)
1346                 goto error;
1347
1348 #ifdef CONFIG_SSB_DEBUG
1349         bus->powered_up = 1;
1350 #endif
1351
1352         mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1353         ssb_chipco_set_clockmode(&bus->chipco, mode);
1354
1355         return 0;
1356 error:
1357         ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1358         return err;
1359 }
1360 EXPORT_SYMBOL(ssb_bus_powerup);
1361
1362 static void ssb_broadcast_value(struct ssb_device *dev,
1363                                 u32 address, u32 data)
1364 {
1365 #ifdef CONFIG_SSB_DRIVER_PCICORE
1366         /* This is used for both, PCI and ChipCommon core, so be careful. */
1367         BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
1368         BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
1369 #endif
1370
1371         ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
1372         ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
1373         ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
1374         ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
1375 }
1376
1377 void ssb_commit_settings(struct ssb_bus *bus)
1378 {
1379         struct ssb_device *dev;
1380
1381 #ifdef CONFIG_SSB_DRIVER_PCICORE
1382         dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
1383 #else
1384         dev = bus->chipco.dev;
1385 #endif
1386         if (WARN_ON(!dev))
1387                 return;
1388         /* This forces an update of the cached registers. */
1389         ssb_broadcast_value(dev, 0xFD8, 0);
1390 }
1391 EXPORT_SYMBOL(ssb_commit_settings);
1392
1393 u32 ssb_admatch_base(u32 adm)
1394 {
1395         u32 base = 0;
1396
1397         switch (adm & SSB_ADM_TYPE) {
1398         case SSB_ADM_TYPE0:
1399                 base = (adm & SSB_ADM_BASE0);
1400                 break;
1401         case SSB_ADM_TYPE1:
1402                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1403                 base = (adm & SSB_ADM_BASE1);
1404                 break;
1405         case SSB_ADM_TYPE2:
1406                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1407                 base = (adm & SSB_ADM_BASE2);
1408                 break;
1409         default:
1410                 SSB_WARN_ON(1);
1411         }
1412
1413         return base;
1414 }
1415 EXPORT_SYMBOL(ssb_admatch_base);
1416
1417 u32 ssb_admatch_size(u32 adm)
1418 {
1419         u32 size = 0;
1420
1421         switch (adm & SSB_ADM_TYPE) {
1422         case SSB_ADM_TYPE0:
1423                 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1424                 break;
1425         case SSB_ADM_TYPE1:
1426                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1427                 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1428                 break;
1429         case SSB_ADM_TYPE2:
1430                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1431                 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1432                 break;
1433         default:
1434                 SSB_WARN_ON(1);
1435         }
1436         size = (1 << (size + 1));
1437
1438         return size;
1439 }
1440 EXPORT_SYMBOL(ssb_admatch_size);
1441
1442 static int __init ssb_modinit(void)
1443 {
1444         int err;
1445
1446         /* See the comment at the ssb_is_early_boot definition */
1447         ssb_is_early_boot = 0;
1448         err = bus_register(&ssb_bustype);
1449         if (err)
1450                 return err;
1451
1452         /* Maybe we already registered some buses at early boot.
1453          * Check for this and attach them
1454          */
1455         ssb_buses_lock();
1456         err = ssb_attach_queued_buses();
1457         ssb_buses_unlock();
1458         if (err) {
1459                 bus_unregister(&ssb_bustype);
1460                 goto out;
1461         }
1462
1463         err = b43_pci_ssb_bridge_init();
1464         if (err) {
1465                 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1466                            "initialization failed\n");
1467                 /* don't fail SSB init because of this */
1468                 err = 0;
1469         }
1470         err = ssb_gige_init();
1471         if (err) {
1472                 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1473                            "driver initialization failed\n");
1474                 /* don't fail SSB init because of this */
1475                 err = 0;
1476         }
1477 out:
1478         return err;
1479 }
1480 /* ssb must be initialized after PCI but before the ssb drivers.
1481  * That means we must use some initcall between subsys_initcall
1482  * and device_initcall. */
1483 fs_initcall(ssb_modinit);
1484
1485 static void __exit ssb_modexit(void)
1486 {
1487         ssb_gige_exit();
1488         b43_pci_ssb_bridge_exit();
1489         bus_unregister(&ssb_bustype);
1490 }
1491 module_exit(ssb_modexit)