staging: fix comedi build errors
[~shefty/rdma-dev.git] / drivers / staging / comedi / drivers / ni_labpc.c
1 /*
2     comedi/drivers/ni_labpc.c
3     Driver for National Instruments Lab-PC series boards and compatibles
4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
5
6     This program is free software; you can redistribute it and/or modify
7     it under the terms of the GNU General Public License as published by
8     the Free Software Foundation; either version 2 of the License, or
9     (at your option) any later version.
10
11     This program is distributed in the hope that it will be useful,
12     but WITHOUT ANY WARRANTY; without even the implied warranty of
13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14     GNU General Public License for more details.
15
16     You should have received a copy of the GNU General Public License
17     along with this program; if not, write to the Free Software
18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20 ************************************************************************
21 */
22 /*
23 Driver: ni_labpc
24 Description: National Instruments Lab-PC (& compatibles)
25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
28 Status: works
29
30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
31 and analog references will work, the available ranges/arefs will
32 depend on how you have configured the jumpers on your board
33 (see your owner's manual).
34
35 Kernel-level ISA plug-and-play support for the lab-pc-1200
36 boards has not
37 yet been added to the driver, mainly due to the fact that
38 I don't know the device id numbers.  If you have one
39 of these boards,
40 please file a bug report at http://comedi.org/ 
41 so I can get the necessary information from you.
42
43 The 1200 series boards have onboard calibration dacs for correcting
44 analog input/output offsets and gains.  The proper settings for these
45 caldacs are stored on the board's eeprom.  To read the caldac values
46 from the eeprom and store them into a file that can be then be used by
47 comedilib, use the comedi_calibrate program.
48
49 Configuration options - ISA boards:
50   [0] - I/O port base address
51   [1] - IRQ (optional, required for timed or externally triggered conversions)
52   [2] - DMA channel (optional)
53
54 Configuration options - PCI boards:
55   [0] - bus (optional)
56   [1] - slot (optional)
57
58 The Lab-pc+ has quirky chanlist requirements
59 when scanning multiple channels.  Multiple channel scan
60 sequence must start at highest channel, then decrement down to
61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
62 up from channel zero.  Chanlists consisting of all one channel
63 are also legal, and allow you to pace conversions in bursts.
64
65 */
66
67 /*
68
69 NI manuals:
70 341309a (labpc-1200 register manual)
71 340914a (pci-1200)
72 320502b (lab-pc+)
73
74 */
75
76 #undef LABPC_DEBUG
77 /* #define LABPC_DEBUG    enable debugging messages */
78
79 #include <linux/interrupt.h>
80 #include <linux/slab.h>
81 #include <linux/io.h>
82 #include "../comedidev.h"
83
84 #include <linux/delay.h>
85 #include <asm/dma.h>
86
87 #include "8253.h"
88 #include "8255.h"
89 #include "mite.h"
90 #include "comedi_fc.h"
91 #include "ni_labpc.h"
92
93 #define DRV_NAME "ni_labpc"
94
95 /* size of io region used by board */
96 #define LABPC_SIZE           32
97 /* 2 MHz master clock */
98 #define LABPC_TIMER_BASE            500
99
100 /* Registers for the lab-pc+ */
101
102 /* write-only registers */
103 #define COMMAND1_REG    0x0
104 #define   ADC_GAIN_MASK (0x7 << 4)
105 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
106 /* enables multi channel scans */
107 #define   ADC_SCAN_EN_BIT       0x80
108 #define COMMAND2_REG    0x1
109 /* enable pretriggering (used in conjunction with SWTRIG) */
110 #define   PRETRIG_BIT   0x1
111 /* enable paced conversions on external trigger */
112 #define   HWTRIG_BIT    0x2
113 /* enable paced conversions */
114 #define   SWTRIG_BIT    0x4
115 /* use two cascaded counters for pacing */
116 #define   CASCADE_BIT   0x8
117 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
118 #define COMMAND3_REG    0x2
119 /* enable dma transfers */
120 #define   DMA_EN_BIT    0x1
121 /* enable interrupts for 8255 */
122 #define   DIO_INTR_EN_BIT       0x2
123 /* enable dma terminal count interrupt */
124 #define   DMATC_INTR_EN_BIT     0x4
125 /* enable timer interrupt */
126 #define   TIMER_INTR_EN_BIT     0x8
127 /* enable error interrupt */
128 #define   ERR_INTR_EN_BIT       0x10
129 /* enable fifo not empty interrupt */
130 #define   ADC_FNE_INTR_EN_BIT   0x20
131 #define ADC_CONVERT_REG 0x3
132 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
133 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
134 #define ADC_CLEAR_REG   0x8
135 #define DMATC_CLEAR_REG 0xa
136 #define TIMER_CLEAR_REG 0xc
137 /* 1200 boards only */
138 #define COMMAND6_REG    0xe
139 /* select ground or common-mode reference */
140 #define   ADC_COMMON_BIT        0x1
141 /*  adc unipolar */
142 #define   ADC_UNIP_BIT  0x2
143 /*  dac unipolar */
144 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
145 /* enable fifo half full interrupt */
146 #define   ADC_FHF_INTR_EN_BIT   0x20
147 /* enable interrupt on end of hardware count */
148 #define   A1_INTR_EN_BIT        0x40
149 /* scan up from channel zero instead of down to zero */
150 #define   ADC_SCAN_UP_BIT 0x80
151 #define COMMAND4_REG    0xf
152 /* enables 'interval' scanning */
153 #define   INTERVAL_SCAN_EN_BIT  0x1
154 /* enables external signal on counter b1 output to trigger scan */
155 #define   EXT_SCAN_EN_BIT       0x2
156 /* chooses direction (output or input) for EXTCONV* line */
157 #define   EXT_CONVERT_OUT_BIT   0x4
158 /* chooses differential inputs for adc (in conjunction with board jumper) */
159 #define   ADC_DIFF_BIT  0x8
160 #define   EXT_CONVERT_DISABLE_BIT       0x10
161 /* 1200 boards only, calibration stuff */
162 #define COMMAND5_REG    0x1c
163 /* enable eeprom for write */
164 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
165 /* enable dithering */
166 #define   DITHER_EN_BIT 0x8
167 /* load calibration dac */
168 #define   CALDAC_LOAD_BIT       0x10
169 /* serial clock - rising edge writes, falling edge reads */
170 #define   SCLOCK_BIT    0x20
171 /* serial data bit for writing to eeprom or calibration dacs */
172 #define   SDATA_BIT     0x40
173 /* enable eeprom for read/write */
174 #define   EEPROM_EN_BIT 0x80
175 #define INTERVAL_COUNT_REG      0x1e
176 #define INTERVAL_LOAD_REG       0x1f
177 #define   INTERVAL_LOAD_BITS    0x1
178
179 /* read-only registers */
180 #define STATUS1_REG     0x0
181 /* data is available in fifo */
182 #define   DATA_AVAIL_BIT        0x1
183 /* overrun has occurred */
184 #define   OVERRUN_BIT   0x2
185 /* fifo overflow */
186 #define   OVERFLOW_BIT  0x4
187 /* timer interrupt has occurred */
188 #define   TIMER_BIT     0x8
189 /* dma terminal count has occurred */
190 #define   DMATC_BIT     0x10
191 /* external trigger has occurred */
192 #define   EXT_TRIG_BIT  0x40
193 /* 1200 boards only */
194 #define STATUS2_REG     0x1d
195 /* programmable eeprom serial output */
196 #define   EEPROM_OUT_BIT        0x1
197 /* counter A1 terminal count */
198 #define   A1_TC_BIT     0x2
199 /* fifo not half full */
200 #define   FNHF_BIT      0x4
201 #define ADC_FIFO_REG    0xa
202
203 #define DIO_BASE_REG    0x10
204 #define COUNTER_A_BASE_REG      0x14
205 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
206 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
207 #define   INIT_A0_BITS  0x14
208 /* put hardware conversion counter output in harmless state (a1 mode 0) */
209 #define   INIT_A1_BITS  0x70
210 #define COUNTER_B_BASE_REG      0x18
211
212 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
213 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
214 static irqreturn_t labpc_interrupt(int irq, void *d);
215 static int labpc_drain_fifo(struct comedi_device *dev);
216 #ifdef CONFIG_ISA_DMA_API
217 static void labpc_drain_dma(struct comedi_device *dev);
218 static void handle_isa_dma(struct comedi_device *dev);
219 #endif
220 static void labpc_drain_dregs(struct comedi_device *dev);
221 static int labpc_ai_cmdtest(struct comedi_device *dev,
222                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
223 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
224 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
225                           struct comedi_insn *insn, unsigned int *data);
226 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
227                           struct comedi_insn *insn, unsigned int *data);
228 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
229                           struct comedi_insn *insn, unsigned int *data);
230 static int labpc_calib_read_insn(struct comedi_device *dev,
231                                  struct comedi_subdevice *s,
232                                  struct comedi_insn *insn, unsigned int *data);
233 static int labpc_calib_write_insn(struct comedi_device *dev,
234                                   struct comedi_subdevice *s,
235                                   struct comedi_insn *insn, unsigned int *data);
236 static int labpc_eeprom_read_insn(struct comedi_device *dev,
237                                   struct comedi_subdevice *s,
238                                   struct comedi_insn *insn, unsigned int *data);
239 static int labpc_eeprom_write_insn(struct comedi_device *dev,
240                                    struct comedi_subdevice *s,
241                                    struct comedi_insn *insn,
242                                    unsigned int *data);
243 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
244 #ifdef CONFIG_ISA_DMA_API
245 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
246 #endif
247 #ifdef CONFIG_COMEDI_PCI_DRIVERS
248 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
249 #endif
250 static int labpc_dio_mem_callback(int dir, int port, int data,
251                                   unsigned long arg);
252 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
253                              unsigned int num_bits);
254 static unsigned int labpc_serial_in(struct comedi_device *dev);
255 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
256                                       unsigned int address);
257 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
258 static int labpc_eeprom_write(struct comedi_device *dev,
259                                        unsigned int address,
260                                        unsigned int value);
261 static void write_caldac(struct comedi_device *dev, unsigned int channel,
262                          unsigned int value);
263
264 enum scan_mode {
265         MODE_SINGLE_CHAN,
266         MODE_SINGLE_CHAN_INTERVAL,
267         MODE_MULT_CHAN_UP,
268         MODE_MULT_CHAN_DOWN,
269 };
270
271 /* analog input ranges */
272 #define NUM_LABPC_PLUS_AI_RANGES 16
273 /* indicates unipolar ranges */
274 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
275         0,
276         0,
277         0,
278         0,
279         0,
280         0,
281         0,
282         0,
283         1,
284         1,
285         1,
286         1,
287         1,
288         1,
289         1,
290         1,
291 };
292
293 /* map range index to gain bits */
294 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
295         0x00,
296         0x10,
297         0x20,
298         0x30,
299         0x40,
300         0x50,
301         0x60,
302         0x70,
303         0x00,
304         0x10,
305         0x20,
306         0x30,
307         0x40,
308         0x50,
309         0x60,
310         0x70,
311 };
312
313 static const struct comedi_lrange range_labpc_plus_ai = {
314         NUM_LABPC_PLUS_AI_RANGES,
315         {
316          BIP_RANGE(5),
317          BIP_RANGE(4),
318          BIP_RANGE(2.5),
319          BIP_RANGE(1),
320          BIP_RANGE(0.5),
321          BIP_RANGE(0.25),
322          BIP_RANGE(0.1),
323          BIP_RANGE(0.05),
324          UNI_RANGE(10),
325          UNI_RANGE(8),
326          UNI_RANGE(5),
327          UNI_RANGE(2),
328          UNI_RANGE(1),
329          UNI_RANGE(0.5),
330          UNI_RANGE(0.2),
331          UNI_RANGE(0.1),
332          }
333 };
334
335 #define NUM_LABPC_1200_AI_RANGES 14
336 /* indicates unipolar ranges */
337 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
338         0,
339         0,
340         0,
341         0,
342         0,
343         0,
344         0,
345         1,
346         1,
347         1,
348         1,
349         1,
350         1,
351         1,
352 };
353 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
354
355 /* map range index to gain bits */
356 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
357         0x00,
358         0x20,
359         0x30,
360         0x40,
361         0x50,
362         0x60,
363         0x70,
364         0x00,
365         0x20,
366         0x30,
367         0x40,
368         0x50,
369         0x60,
370         0x70,
371 };
372 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
373
374 const struct comedi_lrange range_labpc_1200_ai = {
375         NUM_LABPC_1200_AI_RANGES,
376         {
377          BIP_RANGE(5),
378          BIP_RANGE(2.5),
379          BIP_RANGE(1),
380          BIP_RANGE(0.5),
381          BIP_RANGE(0.25),
382          BIP_RANGE(0.1),
383          BIP_RANGE(0.05),
384          UNI_RANGE(10),
385          UNI_RANGE(5),
386          UNI_RANGE(2),
387          UNI_RANGE(1),
388          UNI_RANGE(0.5),
389          UNI_RANGE(0.2),
390          UNI_RANGE(0.1),
391          }
392 };
393 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
394
395 /* analog output ranges */
396 #define AO_RANGE_IS_UNIPOLAR 0x1
397 static const struct comedi_lrange range_labpc_ao = {
398         2,
399         {
400          BIP_RANGE(5),
401          UNI_RANGE(10),
402          }
403 };
404
405 /* functions that do inb/outb and readb/writeb so we can use
406  * function pointers to decide which to use */
407 static inline unsigned int labpc_inb(unsigned long address)
408 {
409         return inb(address);
410 }
411
412 static inline void labpc_outb(unsigned int byte, unsigned long address)
413 {
414         outb(byte, address);
415 }
416
417 static inline unsigned int labpc_readb(unsigned long address)
418 {
419         return readb((void *)address);
420 }
421
422 static inline void labpc_writeb(unsigned int byte, unsigned long address)
423 {
424         writeb(byte, (void *)address);
425 }
426
427 static const struct labpc_board_struct labpc_boards[] = {
428         {
429          .name = "lab-pc-1200",
430          .ai_speed = 10000,
431          .bustype = isa_bustype,
432          .register_layout = labpc_1200_layout,
433          .has_ao = 1,
434          .ai_range_table = &range_labpc_1200_ai,
435          .ai_range_code = labpc_1200_ai_gain_bits,
436          .ai_range_is_unipolar = labpc_1200_is_unipolar,
437          .ai_scan_up = 1,
438          .memory_mapped_io = 0,
439          },
440         {
441          .name = "lab-pc-1200ai",
442          .ai_speed = 10000,
443          .bustype = isa_bustype,
444          .register_layout = labpc_1200_layout,
445          .has_ao = 0,
446          .ai_range_table = &range_labpc_1200_ai,
447          .ai_range_code = labpc_1200_ai_gain_bits,
448          .ai_range_is_unipolar = labpc_1200_is_unipolar,
449          .ai_scan_up = 1,
450          .memory_mapped_io = 0,
451          },
452         {
453          .name = "lab-pc+",
454          .ai_speed = 12000,
455          .bustype = isa_bustype,
456          .register_layout = labpc_plus_layout,
457          .has_ao = 1,
458          .ai_range_table = &range_labpc_plus_ai,
459          .ai_range_code = labpc_plus_ai_gain_bits,
460          .ai_range_is_unipolar = labpc_plus_is_unipolar,
461          .ai_scan_up = 0,
462          .memory_mapped_io = 0,
463          },
464 #ifdef CONFIG_COMEDI_PCI_DRIVERS
465         {
466          .name = "pci-1200",
467          .device_id = 0x161,
468          .ai_speed = 10000,
469          .bustype = pci_bustype,
470          .register_layout = labpc_1200_layout,
471          .has_ao = 1,
472          .ai_range_table = &range_labpc_1200_ai,
473          .ai_range_code = labpc_1200_ai_gain_bits,
474          .ai_range_is_unipolar = labpc_1200_is_unipolar,
475          .ai_scan_up = 1,
476          .memory_mapped_io = 1,
477          },
478 /* dummy entry so pci board works when comedi_config is passed driver name */
479         {
480          .name = DRV_NAME,
481          .bustype = pci_bustype,
482          },
483 #endif
484 };
485
486 /*
487  * Useful for shorthand access to the particular board structure
488  */
489 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
490
491 /* size in bytes of dma buffer */
492 static const int dma_buffer_size = 0xff00;
493 /* 2 bytes per sample */
494 static const int sample_size = 2;
495
496 #define devpriv ((struct labpc_private *)dev->private)
497
498 static struct comedi_driver driver_labpc = {
499         .driver_name = DRV_NAME,
500         .module = THIS_MODULE,
501         .attach = labpc_attach,
502         .detach = labpc_common_detach,
503         .num_names = ARRAY_SIZE(labpc_boards),
504         .board_name = &labpc_boards[0].name,
505         .offset = sizeof(struct labpc_board_struct),
506 };
507
508 #ifdef CONFIG_COMEDI_PCI_DRIVERS
509 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
510         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
511         {0}
512 };
513
514 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
515 #endif /* CONFIG_COMEDI_PCI_DRIVERS */
516
517 static inline int labpc_counter_load(struct comedi_device *dev,
518                                      unsigned long base_address,
519                                      unsigned int counter_number,
520                                      unsigned int count, unsigned int mode)
521 {
522         if (thisboard->memory_mapped_io)
523                 return i8254_mm_load((void *)base_address, 0, counter_number,
524                                      count, mode);
525         else
526                 return i8254_load(base_address, 0, counter_number, count, mode);
527 }
528
529 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
530                         unsigned int irq, unsigned int dma_chan)
531 {
532         struct comedi_subdevice *s;
533         int i;
534         unsigned long isr_flags;
535 #ifdef CONFIG_ISA_DMA_API
536         unsigned long dma_flags;
537 #endif
538         short lsb, msb;
539
540         printk(KERN_ERR "comedi%d: ni_labpc: %s, io 0x%lx", dev->minor,
541                                                                 thisboard->name,
542                iobase);
543         if (irq)
544                 printk(", irq %u", irq);
545         if (dma_chan)
546                 printk(", dma %u", dma_chan);
547         printk("\n");
548
549         if (iobase == 0) {
550                 printk(KERN_ERR "io base address is zero!\n");
551                 return -EINVAL;
552         }
553         /*  request io regions for isa boards */
554         if (thisboard->bustype == isa_bustype) {
555                 /* check if io addresses are available */
556                 if (!request_region(iobase, LABPC_SIZE,
557                                     driver_labpc.driver_name)) {
558                         printk(KERN_ERR "I/O port conflict\n");
559                         return -EIO;
560                 }
561         }
562         dev->iobase = iobase;
563
564         if (thisboard->memory_mapped_io) {
565                 devpriv->read_byte = labpc_readb;
566                 devpriv->write_byte = labpc_writeb;
567         } else {
568                 devpriv->read_byte = labpc_inb;
569                 devpriv->write_byte = labpc_outb;
570         }
571         /* initialize board's command registers */
572         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
573         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
574         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
575         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
576         if (thisboard->register_layout == labpc_1200_layout) {
577                 devpriv->write_byte(devpriv->command5_bits,
578                                     dev->iobase + COMMAND5_REG);
579                 devpriv->write_byte(devpriv->command6_bits,
580                                     dev->iobase + COMMAND6_REG);
581         }
582
583         /* grab our IRQ */
584         if (irq) {
585                 isr_flags = 0;
586                 if (thisboard->bustype == pci_bustype
587                     || thisboard->bustype == pcmcia_bustype)
588                         isr_flags |= IRQF_SHARED;
589                 if (request_irq(irq, labpc_interrupt, isr_flags,
590                                 driver_labpc.driver_name, dev)) {
591                         printk(KERN_ERR "unable to allocate irq %u\n", irq);
592                         return -EINVAL;
593                 }
594         }
595         dev->irq = irq;
596
597 #ifdef CONFIG_ISA_DMA_API
598         /* grab dma channel */
599         if (dma_chan > 3) {
600                 printk(KERN_ERR " invalid dma channel %u\n", dma_chan);
601                 return -EINVAL;
602         } else if (dma_chan) {
603                 /* allocate dma buffer */
604                 devpriv->dma_buffer =
605                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
606                 if (devpriv->dma_buffer == NULL) {
607                         printk(KERN_ERR " failed to allocate dma buffer\n");
608                         return -ENOMEM;
609                 }
610                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
611                         printk(KERN_ERR " failed to allocate dma channel %u\n",
612                                dma_chan);
613                         return -EINVAL;
614                 }
615                 devpriv->dma_chan = dma_chan;
616                 dma_flags = claim_dma_lock();
617                 disable_dma(devpriv->dma_chan);
618                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
619                 release_dma_lock(dma_flags);
620         }
621 #endif
622
623         dev->board_name = thisboard->name;
624
625         if (alloc_subdevices(dev, 5) < 0)
626                 return -ENOMEM;
627
628         /* analog input subdevice */
629         s = dev->subdevices + 0;
630         dev->read_subdev = s;
631         s->type = COMEDI_SUBD_AI;
632         s->subdev_flags =
633             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
634         s->n_chan = 8;
635         s->len_chanlist = 8;
636         s->maxdata = (1 << 12) - 1;     /* 12 bit resolution */
637         s->range_table = thisboard->ai_range_table;
638         s->do_cmd = labpc_ai_cmd;
639         s->do_cmdtest = labpc_ai_cmdtest;
640         s->insn_read = labpc_ai_rinsn;
641         s->cancel = labpc_cancel;
642
643         /* analog output */
644         s = dev->subdevices + 1;
645         if (thisboard->has_ao) {
646                 /*
647                  * Could provide command support, except it only has a
648                  * one sample hardware buffer for analog output and no
649                  * underrun flag.
650                  */
651                 s->type = COMEDI_SUBD_AO;
652                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
653                 s->n_chan = NUM_AO_CHAN;
654                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
655                 s->range_table = &range_labpc_ao;
656                 s->insn_read = labpc_ao_rinsn;
657                 s->insn_write = labpc_ao_winsn;
658                 /* initialize analog outputs to a known value */
659                 for (i = 0; i < s->n_chan; i++) {
660                         devpriv->ao_value[i] = s->maxdata / 2;
661                         lsb = devpriv->ao_value[i] & 0xff;
662                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
663                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
664                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
665                 }
666         } else {
667                 s->type = COMEDI_SUBD_UNUSED;
668         }
669
670         /* 8255 dio */
671         s = dev->subdevices + 2;
672         /*  if board uses io memory we have to give a custom callback
673          * function to the 8255 driver */
674         if (thisboard->memory_mapped_io)
675                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
676                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
677         else
678                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
679
680         /*  calibration subdevices for boards that have one */
681         s = dev->subdevices + 3;
682         if (thisboard->register_layout == labpc_1200_layout) {
683                 s->type = COMEDI_SUBD_CALIB;
684                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
685                 s->n_chan = 16;
686                 s->maxdata = 0xff;
687                 s->insn_read = labpc_calib_read_insn;
688                 s->insn_write = labpc_calib_write_insn;
689
690                 for (i = 0; i < s->n_chan; i++)
691                         write_caldac(dev, i, s->maxdata / 2);
692         } else
693                 s->type = COMEDI_SUBD_UNUSED;
694
695         /* EEPROM */
696         s = dev->subdevices + 4;
697         if (thisboard->register_layout == labpc_1200_layout) {
698                 s->type = COMEDI_SUBD_MEMORY;
699                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
700                 s->n_chan = EEPROM_SIZE;
701                 s->maxdata = 0xff;
702                 s->insn_read = labpc_eeprom_read_insn;
703                 s->insn_write = labpc_eeprom_write_insn;
704
705                 for (i = 0; i < EEPROM_SIZE; i++)
706                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
707 #ifdef LABPC_DEBUG
708                 printk(KERN_ERR " eeprom:");
709                 for (i = 0; i < EEPROM_SIZE; i++)
710                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
711                 printk("\n");
712 #endif
713         } else
714                 s->type = COMEDI_SUBD_UNUSED;
715
716         return 0;
717 }
718 EXPORT_SYMBOL_GPL(labpc_common_attach);
719
720 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
721 {
722         unsigned long iobase = 0;
723         unsigned int irq = 0;
724         unsigned int dma_chan = 0;
725 #ifdef CONFIG_COMEDI_PCI_DRIVERS
726         int retval;
727 #endif
728
729         /* allocate and initialize dev->private */
730         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
731                 return -ENOMEM;
732
733         /* get base address, irq etc. based on bustype */
734         switch (thisboard->bustype) {
735         case isa_bustype:
736 #ifdef CONFIG_ISA_DMA_API
737                 iobase = it->options[0];
738                 irq = it->options[1];
739                 dma_chan = it->options[2];
740 #else
741                 printk(KERN_ERR " this driver has not been built with ISA DMA "
742                                                                 "support.\n");
743                 return -EINVAL;
744 #endif
745                 break;
746         case pci_bustype:
747 #ifdef CONFIG_COMEDI_PCI_DRIVERS
748                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
749                 if (retval < 0)
750                         return retval;
751                 retval = mite_setup(devpriv->mite);
752                 if (retval < 0)
753                         return retval;
754                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
755                 irq = mite_irq(devpriv->mite);
756 #else
757                 printk(KERN_ERR " this driver has not been built with PCI "
758                                                                 "support.\n");
759                 return -EINVAL;
760 #endif
761                 break;
762         case pcmcia_bustype:
763                 printk
764                     (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
765                 return -EINVAL;
766                 break;
767         default:
768                 printk(KERN_ERR "bug! couldn't determine board type\n");
769                 return -EINVAL;
770                 break;
771         }
772
773         return labpc_common_attach(dev, iobase, irq, dma_chan);
774 }
775
776 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
777 #ifdef CONFIG_COMEDI_PCI_DRIVERS
778 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
779 {
780         struct mite_struct *mite;
781         int i;
782         for (mite = mite_devices; mite; mite = mite->next) {
783                 if (mite->used)
784                         continue;
785 /* if bus/slot are specified then make sure we have the right bus/slot */
786                 if (bus || slot) {
787                         if (bus != mite->pcidev->bus->number
788                             || slot != PCI_SLOT(mite->pcidev->devfn))
789                                 continue;
790                 }
791                 for (i = 0; i < driver_labpc.num_names; i++) {
792                         if (labpc_boards[i].bustype != pci_bustype)
793                                 continue;
794                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
795                                 devpriv->mite = mite;
796 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
797                                 dev->board_ptr = &labpc_boards[i];
798                                 return 0;
799                         }
800                 }
801         }
802         printk(KERN_ERR "no device found\n");
803         mite_list_devices();
804         return -EIO;
805 }
806 #endif
807
808 int labpc_common_detach(struct comedi_device *dev)
809 {
810         printk(KERN_ERR "comedi%d: ni_labpc: detach\n", dev->minor);
811
812         if (dev->subdevices)
813                 subdev_8255_cleanup(dev, dev->subdevices + 2);
814
815 #ifdef CONFIG_ISA_DMA_API
816         /* only free stuff if it has been allocated by _attach */
817         kfree(devpriv->dma_buffer);
818         if (devpriv->dma_chan)
819                 free_dma(devpriv->dma_chan);
820 #endif
821         if (dev->irq)
822                 free_irq(dev->irq, dev);
823         if (thisboard->bustype == isa_bustype && dev->iobase)
824                 release_region(dev->iobase, LABPC_SIZE);
825 #ifdef CONFIG_COMEDI_PCI_DRIVERS
826         if (devpriv->mite)
827                 mite_unsetup(devpriv->mite);
828 #endif
829
830         return 0;
831 };
832 EXPORT_SYMBOL_GPL(labpc_common_detach);
833
834 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
835 {
836         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
837         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
838         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
839 }
840
841 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
842 {
843         unsigned long flags;
844
845         spin_lock_irqsave(&dev->spinlock, flags);
846         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
847         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
848         spin_unlock_irqrestore(&dev->spinlock, flags);
849
850         devpriv->command3_bits = 0;
851         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
852
853         return 0;
854 }
855
856 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
857 {
858         if (cmd->chanlist_len == 1)
859                 return MODE_SINGLE_CHAN;
860
861         /* chanlist may be NULL during cmdtest. */
862         if (cmd->chanlist == NULL)
863                 return MODE_MULT_CHAN_UP;
864
865         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
866                 return MODE_SINGLE_CHAN_INTERVAL;
867
868         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
869                 return MODE_MULT_CHAN_UP;
870
871         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
872                 return MODE_MULT_CHAN_DOWN;
873
874         printk(KERN_ERR "ni_labpc: bug! this should never happen\n");
875
876         return 0;
877 }
878
879 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
880                                      const struct comedi_cmd *cmd)
881 {
882         int mode, channel, range, aref, i;
883
884         if (cmd->chanlist == NULL)
885                 return 0;
886
887         mode = labpc_ai_scan_mode(cmd);
888
889         if (mode == MODE_SINGLE_CHAN)
890                 return 0;
891
892         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
893                 if (cmd->chanlist_len > 0xff) {
894                         comedi_error(dev,
895                                      "ni_labpc: chanlist too long for single channel interval mode\n");
896                         return 1;
897                 }
898         }
899
900         channel = CR_CHAN(cmd->chanlist[0]);
901         range = CR_RANGE(cmd->chanlist[0]);
902         aref = CR_AREF(cmd->chanlist[0]);
903
904         for (i = 0; i < cmd->chanlist_len; i++) {
905
906                 switch (mode) {
907                 case MODE_SINGLE_CHAN_INTERVAL:
908                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
909                                 comedi_error(dev,
910                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
911                                 return 1;
912                         }
913                         break;
914                 case MODE_MULT_CHAN_UP:
915                         if (CR_CHAN(cmd->chanlist[i]) != i) {
916                                 comedi_error(dev,
917                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
918                                 return 1;
919                         }
920                         break;
921                 case MODE_MULT_CHAN_DOWN:
922                         if (CR_CHAN(cmd->chanlist[i]) !=
923                             cmd->chanlist_len - i - 1) {
924                                 comedi_error(dev,
925                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
926                                 return 1;
927                         }
928                         break;
929                 default:
930                         printk(KERN_ERR "ni_labpc: bug! in chanlist check\n");
931                         return 1;
932                         break;
933                 }
934
935                 if (CR_RANGE(cmd->chanlist[i]) != range) {
936                         comedi_error(dev,
937                                      "entries in chanlist must all have the same range\n");
938                         return 1;
939                 }
940
941                 if (CR_AREF(cmd->chanlist[i]) != aref) {
942                         comedi_error(dev,
943                                      "entries in chanlist must all have the same reference\n");
944                         return 1;
945                 }
946         }
947
948         return 0;
949 }
950
951 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
952 {
953         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
954                 return 1;
955
956         if (cmd->scan_begin_src == TRIG_FOLLOW)
957                 return 1;
958
959         return 0;
960 }
961
962 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
963 {
964         if (cmd->convert_src != TRIG_TIMER)
965                 return 0;
966
967         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
968             cmd->scan_begin_src == TRIG_TIMER)
969                 return cmd->scan_begin_arg;
970
971         return cmd->convert_arg;
972 }
973
974 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
975 {
976         if (cmd->convert_src != TRIG_TIMER)
977                 return;
978
979         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
980             cmd->scan_begin_src == TRIG_TIMER) {
981                 cmd->scan_begin_arg = ns;
982                 if (cmd->convert_arg > cmd->scan_begin_arg)
983                         cmd->convert_arg = cmd->scan_begin_arg;
984         } else
985                 cmd->convert_arg = ns;
986 }
987
988 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
989 {
990         if (cmd->scan_begin_src != TRIG_TIMER)
991                 return 0;
992
993         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
994             cmd->convert_src == TRIG_TIMER)
995                 return 0;
996
997         return cmd->scan_begin_arg;
998 }
999
1000 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
1001 {
1002         if (cmd->scan_begin_src != TRIG_TIMER)
1003                 return;
1004
1005         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
1006             cmd->convert_src == TRIG_TIMER)
1007                 return;
1008
1009         cmd->scan_begin_arg = ns;
1010 }
1011
1012 static int labpc_ai_cmdtest(struct comedi_device *dev,
1013                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
1014 {
1015         int err = 0;
1016         int tmp, tmp2;
1017         int stop_mask;
1018
1019         /* step 1: make sure trigger sources are trivially valid */
1020
1021         tmp = cmd->start_src;
1022         cmd->start_src &= TRIG_NOW | TRIG_EXT;
1023         if (!cmd->start_src || tmp != cmd->start_src)
1024                 err++;
1025
1026         tmp = cmd->scan_begin_src;
1027         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
1028         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1029                 err++;
1030
1031         tmp = cmd->convert_src;
1032         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1033         if (!cmd->convert_src || tmp != cmd->convert_src)
1034                 err++;
1035
1036         tmp = cmd->scan_end_src;
1037         cmd->scan_end_src &= TRIG_COUNT;
1038         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1039                 err++;
1040
1041         tmp = cmd->stop_src;
1042         stop_mask = TRIG_COUNT | TRIG_NONE;
1043         if (thisboard->register_layout == labpc_1200_layout)
1044                 stop_mask |= TRIG_EXT;
1045         cmd->stop_src &= stop_mask;
1046         if (!cmd->stop_src || tmp != cmd->stop_src)
1047                 err++;
1048
1049         if (err)
1050                 return 1;
1051
1052         /* step 2: make sure trigger sources are unique and mutually compatible */
1053
1054         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1055                 err++;
1056         if (cmd->scan_begin_src != TRIG_TIMER &&
1057             cmd->scan_begin_src != TRIG_FOLLOW &&
1058             cmd->scan_begin_src != TRIG_EXT)
1059                 err++;
1060         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
1061                 err++;
1062         if (cmd->stop_src != TRIG_COUNT &&
1063             cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
1064                 err++;
1065
1066         /* can't have external stop and start triggers at once */
1067         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1068                 err++;
1069
1070         if (err)
1071                 return 2;
1072
1073         /* step 3: make sure arguments are trivially compatible */
1074
1075         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1076                 cmd->start_arg = 0;
1077                 err++;
1078         }
1079
1080         if (!cmd->chanlist_len)
1081                 err++;
1082
1083         if (cmd->scan_end_arg != cmd->chanlist_len) {
1084                 cmd->scan_end_arg = cmd->chanlist_len;
1085                 err++;
1086         }
1087
1088         if (cmd->convert_src == TRIG_TIMER) {
1089                 if (cmd->convert_arg < thisboard->ai_speed) {
1090                         cmd->convert_arg = thisboard->ai_speed;
1091                         err++;
1092                 }
1093         }
1094         /* make sure scan timing is not too fast */
1095         if (cmd->scan_begin_src == TRIG_TIMER) {
1096                 if (cmd->convert_src == TRIG_TIMER &&
1097                     cmd->scan_begin_arg <
1098                     cmd->convert_arg * cmd->chanlist_len) {
1099                         cmd->scan_begin_arg =
1100                             cmd->convert_arg * cmd->chanlist_len;
1101                         err++;
1102                 }
1103                 if (cmd->scan_begin_arg <
1104                     thisboard->ai_speed * cmd->chanlist_len) {
1105                         cmd->scan_begin_arg =
1106                             thisboard->ai_speed * cmd->chanlist_len;
1107                         err++;
1108                 }
1109         }
1110         /* stop source */
1111         switch (cmd->stop_src) {
1112         case TRIG_COUNT:
1113                 if (!cmd->stop_arg) {
1114                         cmd->stop_arg = 1;
1115                         err++;
1116                 }
1117                 break;
1118         case TRIG_NONE:
1119                 if (cmd->stop_arg != 0) {
1120                         cmd->stop_arg = 0;
1121                         err++;
1122                 }
1123                 break;
1124                 /*
1125                  * TRIG_EXT doesn't care since it doesn't
1126                  * trigger off a numbered channel
1127                  */
1128         default:
1129                 break;
1130         }
1131
1132         if (err)
1133                 return 3;
1134
1135         /* step 4: fix up any arguments */
1136
1137         tmp = cmd->convert_arg;
1138         tmp2 = cmd->scan_begin_arg;
1139         labpc_adc_timing(dev, cmd);
1140         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1141                 err++;
1142
1143         if (err)
1144                 return 4;
1145
1146         if (labpc_ai_chanlist_invalid(dev, cmd))
1147                 return 5;
1148
1149         return 0;
1150 }
1151
1152 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1153 {
1154         int channel, range, aref;
1155 #ifdef CONFIG_ISA_DMA_API
1156         unsigned long irq_flags;
1157 #endif
1158         int ret;
1159         struct comedi_async *async = s->async;
1160         struct comedi_cmd *cmd = &async->cmd;
1161         enum transfer_type xfer;
1162         unsigned long flags;
1163
1164         if (!dev->irq) {
1165                 comedi_error(dev, "no irq assigned, cannot perform command");
1166                 return -1;
1167         }
1168
1169         range = CR_RANGE(cmd->chanlist[0]);
1170         aref = CR_AREF(cmd->chanlist[0]);
1171
1172         /* make sure board is disabled before setting up acquisition */
1173         spin_lock_irqsave(&dev->spinlock, flags);
1174         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1175         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1176         spin_unlock_irqrestore(&dev->spinlock, flags);
1177
1178         devpriv->command3_bits = 0;
1179         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1180
1181         /*  initialize software conversion count */
1182         if (cmd->stop_src == TRIG_COUNT)
1183                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1184
1185         /*  setup hardware conversion counter */
1186         if (cmd->stop_src == TRIG_EXT) {
1187                 /*
1188                  * load counter a1 with count of 3
1189                  * (pc+ manual says this is minimum allowed) using mode 0
1190                  */
1191                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1192                                          1, 3, 0);
1193                 if (ret < 0) {
1194                         comedi_error(dev, "error loading counter a1");
1195                         return -1;
1196                 }
1197         } else                  /*
1198                                  * otherwise, just put a1 in mode 0
1199                                  * with no count to set its output low
1200                                  */
1201                 devpriv->write_byte(INIT_A1_BITS,
1202                                     dev->iobase + COUNTER_A_CONTROL_REG);
1203
1204 #ifdef CONFIG_ISA_DMA_API
1205         /*  figure out what method we will use to transfer data */
1206         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1207                 /*
1208                  * dma unsafe at RT priority,
1209                  * and too much setup time for TRIG_WAKE_EOS for
1210                  */
1211             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1212             /*  only available on the isa boards */
1213             thisboard->bustype == isa_bustype) {
1214                 xfer = isa_dma_transfer;
1215                 /* pc-plus has no fifo-half full interrupt */
1216         } else
1217 #endif
1218         if (thisboard->register_layout == labpc_1200_layout &&
1219                    /*  wake-end-of-scan should interrupt on fifo not empty */
1220                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1221                    /*  make sure we are taking more than just a few points */
1222                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1223                 xfer = fifo_half_full_transfer;
1224         } else
1225                 xfer = fifo_not_empty_transfer;
1226         devpriv->current_transfer = xfer;
1227
1228         /*  setup command6 register for 1200 boards */
1229         if (thisboard->register_layout == labpc_1200_layout) {
1230                 /*  reference inputs to ground or common? */
1231                 if (aref != AREF_GROUND)
1232                         devpriv->command6_bits |= ADC_COMMON_BIT;
1233                 else
1234                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1235                 /*  bipolar or unipolar range? */
1236                 if (thisboard->ai_range_is_unipolar[range])
1237                         devpriv->command6_bits |= ADC_UNIP_BIT;
1238                 else
1239                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1240                 /*  interrupt on fifo half full? */
1241                 if (xfer == fifo_half_full_transfer)
1242                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1243                 else
1244                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1245                 /*  enable interrupt on counter a1 terminal count? */
1246                 if (cmd->stop_src == TRIG_EXT)
1247                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1248                 else
1249                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1250                 /*  are we scanning up or down through channels? */
1251                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1252                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1253                 else
1254                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1255                 /*  write to register */
1256                 devpriv->write_byte(devpriv->command6_bits,
1257                                     dev->iobase + COMMAND6_REG);
1258         }
1259
1260         /* setup channel list, etc (command1 register) */
1261         devpriv->command1_bits = 0;
1262         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1263                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1264         else
1265                 channel = CR_CHAN(cmd->chanlist[0]);
1266         /* munge channel bits for differential / scan disabled mode */
1267         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1268                 channel *= 2;
1269         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1270         devpriv->command1_bits |= thisboard->ai_range_code[range];
1271         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1272         /* manual says to set scan enable bit on second pass */
1273         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1274             labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1275                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1276                 /* need a brief delay before enabling scan, or scan
1277                  * list will get screwed when you switch
1278                  * between scan up to scan down mode - dunno why */
1279                 udelay(1);
1280                 devpriv->write_byte(devpriv->command1_bits,
1281                                     dev->iobase + COMMAND1_REG);
1282         }
1283         /*  setup any external triggering/pacing (command4 register) */
1284         devpriv->command4_bits = 0;
1285         if (cmd->convert_src != TRIG_EXT)
1286                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1287         /* XXX should discard first scan when using interval scanning
1288          * since manual says it is not synced with scan clock */
1289         if (labpc_use_continuous_mode(cmd) == 0) {
1290                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1291                 if (cmd->scan_begin_src == TRIG_EXT)
1292                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1293         }
1294         /*  single-ended/differential */
1295         if (aref == AREF_DIFF)
1296                 devpriv->command4_bits |= ADC_DIFF_BIT;
1297         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1298
1299         devpriv->write_byte(cmd->chanlist_len,
1300                             dev->iobase + INTERVAL_COUNT_REG);
1301         /*  load count */
1302         devpriv->write_byte(INTERVAL_LOAD_BITS,
1303                             dev->iobase + INTERVAL_LOAD_REG);
1304
1305         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1306                 /*  set up pacing */
1307                 labpc_adc_timing(dev, cmd);
1308                 /*  load counter b0 in mode 3 */
1309                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1310                                          0, devpriv->divisor_b0, 3);
1311                 if (ret < 0) {
1312                         comedi_error(dev, "error loading counter b0");
1313                         return -1;
1314                 }
1315         }
1316         /*  set up conversion pacing */
1317         if (labpc_ai_convert_period(cmd)) {
1318                 /*  load counter a0 in mode 2 */
1319                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1320                                          0, devpriv->divisor_a0, 2);
1321                 if (ret < 0) {
1322                         comedi_error(dev, "error loading counter a0");
1323                         return -1;
1324                 }
1325         } else
1326                 devpriv->write_byte(INIT_A0_BITS,
1327                                     dev->iobase + COUNTER_A_CONTROL_REG);
1328
1329         /*  set up scan pacing */
1330         if (labpc_ai_scan_period(cmd)) {
1331                 /*  load counter b1 in mode 2 */
1332                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1333                                          1, devpriv->divisor_b1, 2);
1334                 if (ret < 0) {
1335                         comedi_error(dev, "error loading counter b1");
1336                         return -1;
1337                 }
1338         }
1339
1340         labpc_clear_adc_fifo(dev);
1341
1342 #ifdef CONFIG_ISA_DMA_API
1343         /*  set up dma transfer */
1344         if (xfer == isa_dma_transfer) {
1345                 irq_flags = claim_dma_lock();
1346                 disable_dma(devpriv->dma_chan);
1347                 /* clear flip-flop to make sure 2-byte registers for
1348                  * count and address get set correctly */
1349                 clear_dma_ff(devpriv->dma_chan);
1350                 set_dma_addr(devpriv->dma_chan,
1351                              virt_to_bus(devpriv->dma_buffer));
1352                 /*  set appropriate size of transfer */
1353                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1354                 if (cmd->stop_src == TRIG_COUNT &&
1355                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1356                         devpriv->dma_transfer_size =
1357                             devpriv->count * sample_size;
1358                 }
1359                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1360                 enable_dma(devpriv->dma_chan);
1361                 release_dma_lock(irq_flags);
1362                 /*  enable board's dma */
1363                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1364         } else
1365                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1366 #endif
1367
1368         /*  enable error interrupts */
1369         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1370         /*  enable fifo not empty interrupt? */
1371         if (xfer == fifo_not_empty_transfer)
1372                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1373         else
1374                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1375         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1376
1377         /*  startup acquisition */
1378
1379         /*  command2 reg */
1380         /*  use 2 cascaded counters for pacing */
1381         spin_lock_irqsave(&dev->spinlock, flags);
1382         devpriv->command2_bits |= CASCADE_BIT;
1383         switch (cmd->start_src) {
1384         case TRIG_EXT:
1385                 devpriv->command2_bits |= HWTRIG_BIT;
1386                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1387                 break;
1388         case TRIG_NOW:
1389                 devpriv->command2_bits |= SWTRIG_BIT;
1390                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1391                 break;
1392         default:
1393                 comedi_error(dev, "bug with start_src");
1394                 return -1;
1395                 break;
1396         }
1397         switch (cmd->stop_src) {
1398         case TRIG_EXT:
1399                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1400                 break;
1401         case TRIG_COUNT:
1402         case TRIG_NONE:
1403                 break;
1404         default:
1405                 comedi_error(dev, "bug with stop_src");
1406                 return -1;
1407         }
1408         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1409         spin_unlock_irqrestore(&dev->spinlock, flags);
1410
1411         return 0;
1412 }
1413
1414 /* interrupt service routine */
1415 static irqreturn_t labpc_interrupt(int irq, void *d)
1416 {
1417         struct comedi_device *dev = d;
1418         struct comedi_subdevice *s = dev->read_subdev;
1419         struct comedi_async *async;
1420         struct comedi_cmd *cmd;
1421
1422         if (dev->attached == 0) {
1423                 comedi_error(dev, "premature interrupt");
1424                 return IRQ_HANDLED;
1425         }
1426
1427         async = s->async;
1428         cmd = &async->cmd;
1429         async->events = 0;
1430
1431         /* read board status */
1432         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1433         if (thisboard->register_layout == labpc_1200_layout)
1434                 devpriv->status2_bits =
1435                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1436
1437         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1438                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1439             && (devpriv->status2_bits & A1_TC_BIT) == 0
1440             && (devpriv->status2_bits & FNHF_BIT)) {
1441                 return IRQ_NONE;
1442         }
1443
1444         if (devpriv->status1_bits & OVERRUN_BIT) {
1445                 /* clear error interrupt */
1446                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1447                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1448                 comedi_event(dev, s);
1449                 comedi_error(dev, "overrun");
1450                 return IRQ_HANDLED;
1451         }
1452
1453 #ifdef CONFIG_ISA_DMA_API
1454         if (devpriv->current_transfer == isa_dma_transfer) {
1455                 /*
1456                  * if a dma terminal count of external stop trigger
1457                  * has occurred
1458                  */
1459                 if (devpriv->status1_bits & DMATC_BIT ||
1460                     (thisboard->register_layout == labpc_1200_layout
1461                      && devpriv->status2_bits & A1_TC_BIT)) {
1462                         handle_isa_dma(dev);
1463                 }
1464         } else
1465 #endif
1466                 labpc_drain_fifo(dev);
1467
1468         if (devpriv->status1_bits & TIMER_BIT) {
1469                 comedi_error(dev, "handled timer interrupt?");
1470                 /*  clear it */
1471                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1472         }
1473
1474         if (devpriv->status1_bits & OVERFLOW_BIT) {
1475                 /*  clear error interrupt */
1476                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1477                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1478                 comedi_event(dev, s);
1479                 comedi_error(dev, "overflow");
1480                 return IRQ_HANDLED;
1481         }
1482         /*  handle external stop trigger */
1483         if (cmd->stop_src == TRIG_EXT) {
1484                 if (devpriv->status2_bits & A1_TC_BIT) {
1485                         labpc_drain_dregs(dev);
1486                         labpc_cancel(dev, s);
1487                         async->events |= COMEDI_CB_EOA;
1488                 }
1489         }
1490
1491         /* TRIG_COUNT end of acquisition */
1492         if (cmd->stop_src == TRIG_COUNT) {
1493                 if (devpriv->count == 0) {
1494                         labpc_cancel(dev, s);
1495                         async->events |= COMEDI_CB_EOA;
1496                 }
1497         }
1498
1499         comedi_event(dev, s);
1500         return IRQ_HANDLED;
1501 }
1502
1503 /* read all available samples from ai fifo */
1504 static int labpc_drain_fifo(struct comedi_device *dev)
1505 {
1506         unsigned int lsb, msb;
1507         short data;
1508         struct comedi_async *async = dev->read_subdev->async;
1509         const int timeout = 10000;
1510         unsigned int i;
1511
1512         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1513
1514         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1515              i++) {
1516                 /*  quit if we have all the data we want */
1517                 if (async->cmd.stop_src == TRIG_COUNT) {
1518                         if (devpriv->count == 0)
1519                                 break;
1520                         devpriv->count--;
1521                 }
1522                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1523                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1524                 data = (msb << 8) | lsb;
1525                 cfc_write_to_buffer(dev->read_subdev, data);
1526                 devpriv->status1_bits =
1527                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1528         }
1529         if (i == timeout) {
1530                 comedi_error(dev, "ai timeout, fifo never empties");
1531                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1532                 return -1;
1533         }
1534
1535         return 0;
1536 }
1537
1538 #ifdef CONFIG_ISA_DMA_API
1539 static void labpc_drain_dma(struct comedi_device *dev)
1540 {
1541         struct comedi_subdevice *s = dev->read_subdev;
1542         struct comedi_async *async = s->async;
1543         int status;
1544         unsigned long flags;
1545         unsigned int max_points, num_points, residue, leftover;
1546         int i;
1547
1548         status = devpriv->status1_bits;
1549
1550         flags = claim_dma_lock();
1551         disable_dma(devpriv->dma_chan);
1552         /* clear flip-flop to make sure 2-byte registers for
1553          * count and address get set correctly */
1554         clear_dma_ff(devpriv->dma_chan);
1555
1556         /*  figure out how many points to read */
1557         max_points = devpriv->dma_transfer_size / sample_size;
1558         /* residue is the number of points left to be done on the dma
1559          * transfer.  It should always be zero at this point unless
1560          * the stop_src is set to external triggering.
1561          */
1562         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1563         num_points = max_points - residue;
1564         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1565                 num_points = devpriv->count;
1566
1567         /*  figure out how many points will be stored next time */
1568         leftover = 0;
1569         if (async->cmd.stop_src != TRIG_COUNT) {
1570                 leftover = devpriv->dma_transfer_size / sample_size;
1571         } else if (devpriv->count > num_points) {
1572                 leftover = devpriv->count - num_points;
1573                 if (leftover > max_points)
1574                         leftover = max_points;
1575         }
1576
1577         /* write data to comedi buffer */
1578         for (i = 0; i < num_points; i++)
1579                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1580
1581         if (async->cmd.stop_src == TRIG_COUNT)
1582                 devpriv->count -= num_points;
1583
1584         /*  set address and count for next transfer */
1585         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1586         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1587         release_dma_lock(flags);
1588
1589         async->events |= COMEDI_CB_BLOCK;
1590 }
1591
1592 static void handle_isa_dma(struct comedi_device *dev)
1593 {
1594         labpc_drain_dma(dev);
1595
1596         enable_dma(devpriv->dma_chan);
1597
1598         /*  clear dma tc interrupt */
1599         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1600 }
1601 #endif
1602
1603 /* makes sure all data acquired by board is transferred to comedi (used
1604  * when acquisition is terminated by stop_src == TRIG_EXT). */
1605 static void labpc_drain_dregs(struct comedi_device *dev)
1606 {
1607 #ifdef CONFIG_ISA_DMA_API
1608         if (devpriv->current_transfer == isa_dma_transfer)
1609                 labpc_drain_dma(dev);
1610 #endif
1611
1612         labpc_drain_fifo(dev);
1613 }
1614
1615 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1616                           struct comedi_insn *insn, unsigned int *data)
1617 {
1618         int i, n;
1619         int chan, range;
1620         int lsb, msb;
1621         int timeout = 1000;
1622         unsigned long flags;
1623
1624         /*  disable timed conversions */
1625         spin_lock_irqsave(&dev->spinlock, flags);
1626         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1627         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1628         spin_unlock_irqrestore(&dev->spinlock, flags);
1629
1630         /*  disable interrupt generation and dma */
1631         devpriv->command3_bits = 0;
1632         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1633
1634         /* set gain and channel */
1635         devpriv->command1_bits = 0;
1636         chan = CR_CHAN(insn->chanspec);
1637         range = CR_RANGE(insn->chanspec);
1638         devpriv->command1_bits |= thisboard->ai_range_code[range];
1639         /* munge channel bits for differential/scan disabled mode */
1640         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1641                 chan *= 2;
1642         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1643         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1644
1645         /* setup command6 register for 1200 boards */
1646         if (thisboard->register_layout == labpc_1200_layout) {
1647                 /*  reference inputs to ground or common? */
1648                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1649                         devpriv->command6_bits |= ADC_COMMON_BIT;
1650                 else
1651                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1652                 /* bipolar or unipolar range? */
1653                 if (thisboard->ai_range_is_unipolar[range])
1654                         devpriv->command6_bits |= ADC_UNIP_BIT;
1655                 else
1656                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1657                 /* don't interrupt on fifo half full */
1658                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1659                 /* don't enable interrupt on counter a1 terminal count? */
1660                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1661                 /* write to register */
1662                 devpriv->write_byte(devpriv->command6_bits,
1663                                     dev->iobase + COMMAND6_REG);
1664         }
1665         /* setup command4 register */
1666         devpriv->command4_bits = 0;
1667         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1668         /* single-ended/differential */
1669         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1670                 devpriv->command4_bits |= ADC_DIFF_BIT;
1671         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1672
1673         /*
1674          * initialize pacer counter output to make sure it doesn't
1675          * cause any problems
1676          */
1677         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1678
1679         labpc_clear_adc_fifo(dev);
1680
1681         for (n = 0; n < insn->n; n++) {
1682                 /* trigger conversion */
1683                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1684
1685                 for (i = 0; i < timeout; i++) {
1686                         if (devpriv->read_byte(dev->iobase +
1687                                                STATUS1_REG) & DATA_AVAIL_BIT)
1688                                 break;
1689                         udelay(1);
1690                 }
1691                 if (i == timeout) {
1692                         comedi_error(dev, "timeout");
1693                         return -ETIME;
1694                 }
1695                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1696                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1697                 data[n] = (msb << 8) | lsb;
1698         }
1699
1700         return n;
1701 }
1702
1703 /* analog output insn */
1704 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1705                           struct comedi_insn *insn, unsigned int *data)
1706 {
1707         int channel, range;
1708         unsigned long flags;
1709         int lsb, msb;
1710
1711         channel = CR_CHAN(insn->chanspec);
1712
1713         /* turn off pacing of analog output channel */
1714         /* note: hardware bug in daqcard-1200 means pacing cannot
1715          * be independently enabled/disabled for its the two channels */
1716         spin_lock_irqsave(&dev->spinlock, flags);
1717         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1718         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1719         spin_unlock_irqrestore(&dev->spinlock, flags);
1720
1721         /* set range */
1722         if (thisboard->register_layout == labpc_1200_layout) {
1723                 range = CR_RANGE(insn->chanspec);
1724                 if (range & AO_RANGE_IS_UNIPOLAR)
1725                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1726                 else
1727                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1728                 /*  write to register */
1729                 devpriv->write_byte(devpriv->command6_bits,
1730                                     dev->iobase + COMMAND6_REG);
1731         }
1732         /* send data */
1733         lsb = data[0] & 0xff;
1734         msb = (data[0] >> 8) & 0xff;
1735         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1736         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1737
1738         /* remember value for readback */
1739         devpriv->ao_value[channel] = data[0];
1740
1741         return 1;
1742 }
1743
1744 /* analog output readback insn */
1745 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1746                           struct comedi_insn *insn, unsigned int *data)
1747 {
1748         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1749
1750         return 1;
1751 }
1752
1753 static int labpc_calib_read_insn(struct comedi_device *dev,
1754                                  struct comedi_subdevice *s,
1755                                  struct comedi_insn *insn, unsigned int *data)
1756 {
1757         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1758
1759         return 1;
1760 }
1761
1762 static int labpc_calib_write_insn(struct comedi_device *dev,
1763                                   struct comedi_subdevice *s,
1764                                   struct comedi_insn *insn, unsigned int *data)
1765 {
1766         int channel = CR_CHAN(insn->chanspec);
1767
1768         write_caldac(dev, channel, data[0]);
1769         return 1;
1770 }
1771
1772 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1773                                   struct comedi_subdevice *s,
1774                                   struct comedi_insn *insn, unsigned int *data)
1775 {
1776         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1777
1778         return 1;
1779 }
1780
1781 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1782                                    struct comedi_subdevice *s,
1783                                    struct comedi_insn *insn, unsigned int *data)
1784 {
1785         int channel = CR_CHAN(insn->chanspec);
1786         int ret;
1787
1788         /*  only allow writes to user area of eeprom */
1789         if (channel < 16 || channel > 127) {
1790                 printk
1791                     ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1792                 return -EINVAL;
1793         }
1794
1795         ret = labpc_eeprom_write(dev, channel, data[0]);
1796         if (ret < 0)
1797                 return ret;
1798
1799         return 1;
1800 }
1801
1802 #ifdef CONFIG_ISA_DMA_API
1803 /* utility function that suggests a dma transfer size in bytes */
1804 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1805 {
1806         unsigned int size;
1807         unsigned int freq;
1808
1809         if (cmd.convert_src == TRIG_TIMER)
1810                 freq = 1000000000 / cmd.convert_arg;
1811         /* return some default value */
1812         else
1813                 freq = 0xffffffff;
1814
1815         /* make buffer fill in no more than 1/3 second */
1816         size = (freq / 3) * sample_size;
1817
1818         /* set a minimum and maximum size allowed */
1819         if (size > dma_buffer_size)
1820                 size = dma_buffer_size - dma_buffer_size % sample_size;
1821         else if (size < sample_size)
1822                 size = sample_size;
1823
1824         return size;
1825 }
1826 #endif
1827
1828 /* figures out what counter values to use based on command */
1829 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1830 {
1831         /* max value for 16 bit counter in mode 2 */
1832         const int max_counter_value = 0x10000;
1833         /* min value for 16 bit counter in mode 2 */
1834         const int min_counter_value = 2;
1835         unsigned int base_period;
1836
1837         /*
1838          * if both convert and scan triggers are TRIG_TIMER, then they
1839          * both rely on counter b0
1840          */
1841         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1842                 /*
1843                  * pick the lowest b0 divisor value we can (for maximum input
1844                  * clock speed on convert and scan counters)
1845                  */
1846                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1847                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1848                 if (devpriv->divisor_b0 < min_counter_value)
1849                         devpriv->divisor_b0 = min_counter_value;
1850                 if (devpriv->divisor_b0 > max_counter_value)
1851                         devpriv->divisor_b0 = max_counter_value;
1852
1853                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1854
1855                 /*  set a0 for conversion frequency and b1 for scan frequency */
1856                 switch (cmd->flags & TRIG_ROUND_MASK) {
1857                 default:
1858                 case TRIG_ROUND_NEAREST:
1859                         devpriv->divisor_a0 =
1860                             (labpc_ai_convert_period(cmd) +
1861                              (base_period / 2)) / base_period;
1862                         devpriv->divisor_b1 =
1863                             (labpc_ai_scan_period(cmd) +
1864                              (base_period / 2)) / base_period;
1865                         break;
1866                 case TRIG_ROUND_UP:
1867                         devpriv->divisor_a0 =
1868                             (labpc_ai_convert_period(cmd) + (base_period -
1869                                                              1)) / base_period;
1870                         devpriv->divisor_b1 =
1871                             (labpc_ai_scan_period(cmd) + (base_period -
1872                                                           1)) / base_period;
1873                         break;
1874                 case TRIG_ROUND_DOWN:
1875                         devpriv->divisor_a0 =
1876                             labpc_ai_convert_period(cmd) / base_period;
1877                         devpriv->divisor_b1 =
1878                             labpc_ai_scan_period(cmd) / base_period;
1879                         break;
1880                 }
1881                 /*  make sure a0 and b1 values are acceptable */
1882                 if (devpriv->divisor_a0 < min_counter_value)
1883                         devpriv->divisor_a0 = min_counter_value;
1884                 if (devpriv->divisor_a0 > max_counter_value)
1885                         devpriv->divisor_a0 = max_counter_value;
1886                 if (devpriv->divisor_b1 < min_counter_value)
1887                         devpriv->divisor_b1 = min_counter_value;
1888                 if (devpriv->divisor_b1 > max_counter_value)
1889                         devpriv->divisor_b1 = max_counter_value;
1890                 /*  write corrected timings to command */
1891                 labpc_set_ai_convert_period(cmd,
1892                                             base_period * devpriv->divisor_a0);
1893                 labpc_set_ai_scan_period(cmd,
1894                                          base_period * devpriv->divisor_b1);
1895                 /*
1896                  * if only one TRIG_TIMER is used, we can employ the generic
1897                  * cascaded timing functions
1898                  */
1899         } else if (labpc_ai_scan_period(cmd)) {
1900                 unsigned int scan_period;
1901
1902                 scan_period = labpc_ai_scan_period(cmd);
1903                 /*
1904                  * calculate cascaded counter values
1905                  * that give desired scan timing
1906                  */
1907                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1908                                                &(devpriv->divisor_b1),
1909                                                &(devpriv->divisor_b0),
1910                                                &scan_period,
1911                                                cmd->flags & TRIG_ROUND_MASK);
1912                 labpc_set_ai_scan_period(cmd, scan_period);
1913         } else if (labpc_ai_convert_period(cmd)) {
1914                 unsigned int convert_period;
1915
1916                 convert_period = labpc_ai_convert_period(cmd);
1917                 /*
1918                  * calculate cascaded counter values
1919                  * that give desired conversion timing
1920                  */
1921                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1922                                                &(devpriv->divisor_a0),
1923                                                &(devpriv->divisor_b0),
1924                                                &convert_period,
1925                                                cmd->flags & TRIG_ROUND_MASK);
1926                 labpc_set_ai_convert_period(cmd, convert_period);
1927         }
1928 }
1929
1930 static int labpc_dio_mem_callback(int dir, int port, int data,
1931                                   unsigned long iobase)
1932 {
1933         if (dir) {
1934                 writeb(data, (void *)(iobase + port));
1935                 return 0;
1936         } else {
1937                 return readb((void *)(iobase + port));
1938         }
1939 }
1940
1941 /* lowlevel write to eeprom/dac */
1942 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1943                              unsigned int value_width)
1944 {
1945         int i;
1946
1947         for (i = 1; i <= value_width; i++) {
1948                 /*  clear serial clock */
1949                 devpriv->command5_bits &= ~SCLOCK_BIT;
1950                 /*  send bits most significant bit first */
1951                 if (value & (1 << (value_width - i)))
1952                         devpriv->command5_bits |= SDATA_BIT;
1953                 else
1954                         devpriv->command5_bits &= ~SDATA_BIT;
1955                 udelay(1);
1956                 devpriv->write_byte(devpriv->command5_bits,
1957                                     dev->iobase + COMMAND5_REG);
1958                 /*  set clock to load bit */
1959                 devpriv->command5_bits |= SCLOCK_BIT;
1960                 udelay(1);
1961                 devpriv->write_byte(devpriv->command5_bits,
1962                                     dev->iobase + COMMAND5_REG);
1963         }
1964 }
1965
1966 /* lowlevel read from eeprom */
1967 static unsigned int labpc_serial_in(struct comedi_device *dev)
1968 {
1969         unsigned int value = 0;
1970         int i;
1971         const int value_width = 8;      /*  number of bits wide values are */
1972
1973         for (i = 1; i <= value_width; i++) {
1974                 /*  set serial clock */
1975                 devpriv->command5_bits |= SCLOCK_BIT;
1976                 udelay(1);
1977                 devpriv->write_byte(devpriv->command5_bits,
1978                                     dev->iobase + COMMAND5_REG);
1979                 /*  clear clock bit */
1980                 devpriv->command5_bits &= ~SCLOCK_BIT;
1981                 udelay(1);
1982                 devpriv->write_byte(devpriv->command5_bits,
1983                                     dev->iobase + COMMAND5_REG);
1984                 /*  read bits most significant bit first */
1985                 udelay(1);
1986                 devpriv->status2_bits =
1987                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1988                 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1989                         value |= 1 << (value_width - i);
1990         }
1991
1992         return value;
1993 }
1994
1995 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1996                                       unsigned int address)
1997 {
1998         unsigned int value;
1999         /*  bits to tell eeprom to expect a read */
2000         const int read_instruction = 0x3;
2001         /*  8 bit write lengths to eeprom */
2002         const int write_length = 8;
2003
2004         /*  enable read/write to eeprom */
2005         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2006         udelay(1);
2007         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2008         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2009         udelay(1);
2010         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2011
2012         /*  send read instruction */
2013         labpc_serial_out(dev, read_instruction, write_length);
2014         /*  send 8 bit address to read from */
2015         labpc_serial_out(dev, address, write_length);
2016         /*  read result */
2017         value = labpc_serial_in(dev);
2018
2019         /*  disable read/write to eeprom */
2020         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2021         udelay(1);
2022         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2023
2024         return value;
2025 }
2026
2027 static int labpc_eeprom_write(struct comedi_device *dev,
2028                                 unsigned int address, unsigned int value)
2029 {
2030         const int write_enable_instruction = 0x6;
2031         const int write_instruction = 0x2;
2032         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2033         const int write_in_progress_bit = 0x1;
2034         const int timeout = 10000;
2035         int i;
2036
2037         /*  make sure there isn't already a write in progress */
2038         for (i = 0; i < timeout; i++) {
2039                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
2040                     0)
2041                         break;
2042         }
2043         if (i == timeout) {
2044                 comedi_error(dev, "eeprom write timed out");
2045                 return -ETIME;
2046         }
2047         /*  update software copy of eeprom */
2048         devpriv->eeprom_data[address] = value;
2049
2050         /*  enable read/write to eeprom */
2051         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2052         udelay(1);
2053         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2054         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2055         udelay(1);
2056         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2057
2058         /*  send write_enable instruction */
2059         labpc_serial_out(dev, write_enable_instruction, write_length);
2060         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2061         udelay(1);
2062         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2063
2064         /*  send write instruction */
2065         devpriv->command5_bits |= EEPROM_EN_BIT;
2066         udelay(1);
2067         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2068         labpc_serial_out(dev, write_instruction, write_length);
2069         /*  send 8 bit address to write to */
2070         labpc_serial_out(dev, address, write_length);
2071         /*  write value */
2072         labpc_serial_out(dev, value, write_length);
2073         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2074         udelay(1);
2075         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2076
2077         /*  disable read/write to eeprom */
2078         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2079         udelay(1);
2080         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2081
2082         return 0;
2083 }
2084
2085 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2086 {
2087         unsigned int value;
2088         const int read_status_instruction = 0x5;
2089         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2090
2091         /*  enable read/write to eeprom */
2092         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2093         udelay(1);
2094         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2095         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2096         udelay(1);
2097         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2098
2099         /*  send read status instruction */
2100         labpc_serial_out(dev, read_status_instruction, write_length);
2101         /*  read result */
2102         value = labpc_serial_in(dev);
2103
2104         /*  disable read/write to eeprom */
2105         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2106         udelay(1);
2107         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2108
2109         return value;
2110 }
2111
2112 /* writes to 8 bit calibration dacs */
2113 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2114                          unsigned int value)
2115 {
2116         if (value == devpriv->caldac[channel])
2117                 return;
2118         devpriv->caldac[channel] = value;
2119
2120         /*  clear caldac load bit and make sure we don't write to eeprom */
2121         devpriv->command5_bits &=
2122             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2123         udelay(1);
2124         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2125
2126         /*  write 4 bit channel */
2127         labpc_serial_out(dev, channel, 4);
2128         /*  write 8 bit caldac value */
2129         labpc_serial_out(dev, value, 8);
2130
2131         /*  set and clear caldac bit to load caldac value */
2132         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2133         udelay(1);
2134         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2135         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2136         udelay(1);
2137         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2138 }
2139
2140 #ifdef CONFIG_COMEDI_PCI_DRIVERS
2141 static int __devinit driver_labpc_pci_probe(struct pci_dev *dev,
2142                                             const struct pci_device_id *ent)
2143 {
2144         return comedi_pci_auto_config(dev, driver_labpc.driver_name);
2145 }
2146
2147 static void __devexit driver_labpc_pci_remove(struct pci_dev *dev)
2148 {
2149         comedi_pci_auto_unconfig(dev);
2150 }
2151
2152 static struct pci_driver driver_labpc_pci_driver = {
2153         .id_table = labpc_pci_table,
2154         .probe = &driver_labpc_pci_probe,
2155         .remove = __devexit_p(&driver_labpc_pci_remove)
2156 };
2157
2158 static int __init driver_labpc_init_module(void)
2159 {
2160         int retval;
2161
2162         retval = comedi_driver_register(&driver_labpc);
2163         if (retval < 0)
2164                 return retval;
2165
2166         driver_labpc_pci_driver.name = (char *)driver_labpc.driver_name;
2167         return pci_register_driver(&driver_labpc_pci_driver);
2168 }
2169
2170 static void __exit driver_labpc_cleanup_module(void)
2171 {
2172         pci_unregister_driver(&driver_labpc_pci_driver);
2173         comedi_driver_unregister(&driver_labpc);
2174 }
2175
2176 module_init(driver_labpc_init_module);
2177 module_exit(driver_labpc_cleanup_module);
2178 #else
2179 static int __init driver_labpc_init_module(void)
2180 {
2181         return comedi_driver_register(&driver_labpc);
2182 }
2183
2184 static void __exit driver_labpc_cleanup_module(void)
2185 {
2186         comedi_driver_unregister(&driver_labpc);
2187 }
2188
2189 module_init(driver_labpc_init_module);
2190 module_exit(driver_labpc_cleanup_module);
2191 #endif
2192
2193
2194 MODULE_AUTHOR("Comedi http://www.comedi.org");
2195 MODULE_DESCRIPTION("Comedi low-level driver");
2196 MODULE_LICENSE("GPL");