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USB: EHCI: Move definition of EHCI_STATS to ehci.h
[~shefty/rdma-dev.git] / drivers / usb / host / ehci-hcd.c
1 /*
2  * Enhanced Host Controller Interface (EHCI) driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * Copyright (c) 2000-2004 by David Brownell
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License as published by the
10  * Free Software Foundation; either version 2 of the License, or (at your
11  * option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/vmalloc.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/hrtimer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/usb/hcd.h>
38 #include <linux/moduleparam.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/debugfs.h>
41 #include <linux/slab.h>
42
43 #include <asm/byteorder.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/unaligned.h>
47
48 #if defined(CONFIG_PPC_PS3)
49 #include <asm/firmware.h>
50 #endif
51
52 /*-------------------------------------------------------------------------*/
53
54 /*
55  * EHCI hc_driver implementation ... experimental, incomplete.
56  * Based on the final 1.0 register interface specification.
57  *
58  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
59  * First was PCMCIA, like ISA; then CardBus, which is PCI.
60  * Next comes "CardBay", using USB 2.0 signals.
61  *
62  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
63  * Special thanks to Intel and VIA for providing host controllers to
64  * test this driver on, and Cypress (including In-System Design) for
65  * providing early devices for those host controllers to talk to!
66  */
67
68 #define DRIVER_AUTHOR "David Brownell"
69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
70
71 static const char       hcd_name [] = "ehci_hcd";
72
73
74 #undef VERBOSE_DEBUG
75 #undef EHCI_URB_TRACE
76
77 /* magic numbers that can affect system performance */
78 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
79 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
80 #define EHCI_TUNE_RL_TT         0
81 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
82 #define EHCI_TUNE_MULT_TT       1
83 /*
84  * Some drivers think it's safe to schedule isochronous transfers more than
85  * 256 ms into the future (partly as a result of an old bug in the scheduling
86  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
87  * length of 512 frames instead of 256.
88  */
89 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
90
91 /* Initial IRQ latency:  faster than hw default */
92 static int log2_irq_thresh = 0;         // 0 to 6
93 module_param (log2_irq_thresh, int, S_IRUGO);
94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
95
96 /* initial park setting:  slower than hw default */
97 static unsigned park = 0;
98 module_param (park, uint, S_IRUGO);
99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
100
101 /* for flakey hardware, ignore overcurrent indicators */
102 static bool ignore_oc = 0;
103 module_param (ignore_oc, bool, S_IRUGO);
104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
105
106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
107
108 /*-------------------------------------------------------------------------*/
109
110 #include "ehci.h"
111 #include "pci-quirks.h"
112
113 /*
114  * The MosChip MCS9990 controller updates its microframe counter
115  * a little before the frame counter, and occasionally we will read
116  * the invalid intermediate value.  Avoid problems by checking the
117  * microframe number (the low-order 3 bits); if they are 0 then
118  * re-read the register to get the correct value.
119  */
120 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
121 {
122         unsigned uf;
123
124         uf = ehci_readl(ehci, &ehci->regs->frame_index);
125         if (unlikely((uf & 7) == 0))
126                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
127         return uf;
128 }
129
130 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
131 {
132         if (ehci->frame_index_bug)
133                 return ehci_moschip_read_frame_index(ehci);
134         return ehci_readl(ehci, &ehci->regs->frame_index);
135 }
136
137 #include "ehci-dbg.c"
138
139 /*-------------------------------------------------------------------------*/
140
141 /*
142  * handshake - spin reading hc until handshake completes or fails
143  * @ptr: address of hc register to be read
144  * @mask: bits to look at in result of read
145  * @done: value of those bits when handshake succeeds
146  * @usec: timeout in microseconds
147  *
148  * Returns negative errno, or zero on success
149  *
150  * Success happens when the "mask" bits have the specified value (hardware
151  * handshake done).  There are two failure modes:  "usec" have passed (major
152  * hardware flakeout), or the register reads as all-ones (hardware removed).
153  *
154  * That last failure should_only happen in cases like physical cardbus eject
155  * before driver shutdown. But it also seems to be caused by bugs in cardbus
156  * bridge shutdown:  shutting down the bridge before the devices using it.
157  */
158 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
159                       u32 mask, u32 done, int usec)
160 {
161         u32     result;
162
163         do {
164                 result = ehci_readl(ehci, ptr);
165                 if (result == ~(u32)0)          /* card removed */
166                         return -ENODEV;
167                 result &= mask;
168                 if (result == done)
169                         return 0;
170                 udelay (1);
171                 usec--;
172         } while (usec > 0);
173         return -ETIMEDOUT;
174 }
175
176 /* check TDI/ARC silicon is in host mode */
177 static int tdi_in_host_mode (struct ehci_hcd *ehci)
178 {
179         u32             tmp;
180
181         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
182         return (tmp & 3) == USBMODE_CM_HC;
183 }
184
185 /*
186  * Force HC to halt state from unknown (EHCI spec section 2.3).
187  * Must be called with interrupts enabled and the lock not held.
188  */
189 static int ehci_halt (struct ehci_hcd *ehci)
190 {
191         u32     temp;
192
193         spin_lock_irq(&ehci->lock);
194
195         /* disable any irqs left enabled by previous code */
196         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
197
198         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
199                 spin_unlock_irq(&ehci->lock);
200                 return 0;
201         }
202
203         /*
204          * This routine gets called during probe before ehci->command
205          * has been initialized, so we can't rely on its value.
206          */
207         ehci->command &= ~CMD_RUN;
208         temp = ehci_readl(ehci, &ehci->regs->command);
209         temp &= ~(CMD_RUN | CMD_IAAD);
210         ehci_writel(ehci, temp, &ehci->regs->command);
211
212         spin_unlock_irq(&ehci->lock);
213         synchronize_irq(ehci_to_hcd(ehci)->irq);
214
215         return handshake(ehci, &ehci->regs->status,
216                           STS_HALT, STS_HALT, 16 * 125);
217 }
218
219 /* put TDI/ARC silicon into EHCI mode */
220 static void tdi_reset (struct ehci_hcd *ehci)
221 {
222         u32             tmp;
223
224         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
225         tmp |= USBMODE_CM_HC;
226         /* The default byte access to MMR space is LE after
227          * controller reset. Set the required endian mode
228          * for transfer buffers to match the host microprocessor
229          */
230         if (ehci_big_endian_mmio(ehci))
231                 tmp |= USBMODE_BE;
232         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
233 }
234
235 /*
236  * Reset a non-running (STS_HALT == 1) controller.
237  * Must be called with interrupts enabled and the lock not held.
238  */
239 static int ehci_reset (struct ehci_hcd *ehci)
240 {
241         int     retval;
242         u32     command = ehci_readl(ehci, &ehci->regs->command);
243
244         /* If the EHCI debug controller is active, special care must be
245          * taken before and after a host controller reset */
246         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
247                 ehci->debug = NULL;
248
249         command |= CMD_RESET;
250         dbg_cmd (ehci, "reset", command);
251         ehci_writel(ehci, command, &ehci->regs->command);
252         ehci->rh_state = EHCI_RH_HALTED;
253         ehci->next_statechange = jiffies;
254         retval = handshake (ehci, &ehci->regs->command,
255                             CMD_RESET, 0, 250 * 1000);
256
257         if (ehci->has_hostpc) {
258                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
259                                 &ehci->regs->usbmode_ex);
260                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
261         }
262         if (retval)
263                 return retval;
264
265         if (ehci_is_TDI(ehci))
266                 tdi_reset (ehci);
267
268         if (ehci->debug)
269                 dbgp_external_startup(ehci_to_hcd(ehci));
270
271         ehci->port_c_suspend = ehci->suspended_ports =
272                         ehci->resuming_ports = 0;
273         return retval;
274 }
275
276 /*
277  * Idle the controller (turn off the schedules).
278  * Must be called with interrupts enabled and the lock not held.
279  */
280 static void ehci_quiesce (struct ehci_hcd *ehci)
281 {
282         u32     temp;
283
284         if (ehci->rh_state != EHCI_RH_RUNNING)
285                 return;
286
287         /* wait for any schedule enables/disables to take effect */
288         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
289         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
290
291         /* then disable anything that's still active */
292         spin_lock_irq(&ehci->lock);
293         ehci->command &= ~(CMD_ASE | CMD_PSE);
294         ehci_writel(ehci, ehci->command, &ehci->regs->command);
295         spin_unlock_irq(&ehci->lock);
296
297         /* hardware can take 16 microframes to turn off ... */
298         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
299 }
300
301 /*-------------------------------------------------------------------------*/
302
303 static void end_unlink_async(struct ehci_hcd *ehci);
304 static void unlink_empty_async(struct ehci_hcd *ehci);
305 static void ehci_work(struct ehci_hcd *ehci);
306 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
307 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
308
309 #include "ehci-timer.c"
310 #include "ehci-hub.c"
311 #include "ehci-mem.c"
312 #include "ehci-q.c"
313 #include "ehci-sched.c"
314 #include "ehci-sysfs.c"
315
316 /*-------------------------------------------------------------------------*/
317
318 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
319  * The firmware seems to think that powering off is a wakeup event!
320  * This routine turns off remote wakeup and everything else, on all ports.
321  */
322 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
323 {
324         int     port = HCS_N_PORTS(ehci->hcs_params);
325
326         while (port--)
327                 ehci_writel(ehci, PORT_RWC_BITS,
328                                 &ehci->regs->port_status[port]);
329 }
330
331 /*
332  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
333  * Must be called with interrupts enabled and the lock not held.
334  */
335 static void ehci_silence_controller(struct ehci_hcd *ehci)
336 {
337         ehci_halt(ehci);
338
339         spin_lock_irq(&ehci->lock);
340         ehci->rh_state = EHCI_RH_HALTED;
341         ehci_turn_off_all_ports(ehci);
342
343         /* make BIOS/etc use companion controller during reboot */
344         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
345
346         /* unblock posted writes */
347         ehci_readl(ehci, &ehci->regs->configured_flag);
348         spin_unlock_irq(&ehci->lock);
349 }
350
351 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
352  * This forcibly disables dma and IRQs, helping kexec and other cases
353  * where the next system software may expect clean state.
354  */
355 static void ehci_shutdown(struct usb_hcd *hcd)
356 {
357         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
358
359         spin_lock_irq(&ehci->lock);
360         ehci->shutdown = true;
361         ehci->rh_state = EHCI_RH_STOPPING;
362         ehci->enabled_hrtimer_events = 0;
363         spin_unlock_irq(&ehci->lock);
364
365         ehci_silence_controller(ehci);
366
367         hrtimer_cancel(&ehci->hrtimer);
368 }
369
370 /*-------------------------------------------------------------------------*/
371
372 /*
373  * ehci_work is called from some interrupts, timers, and so on.
374  * it calls driver completion functions, after dropping ehci->lock.
375  */
376 static void ehci_work (struct ehci_hcd *ehci)
377 {
378         /* another CPU may drop ehci->lock during a schedule scan while
379          * it reports urb completions.  this flag guards against bogus
380          * attempts at re-entrant schedule scanning.
381          */
382         if (ehci->scanning) {
383                 ehci->need_rescan = true;
384                 return;
385         }
386         ehci->scanning = true;
387
388  rescan:
389         ehci->need_rescan = false;
390         if (ehci->async_count)
391                 scan_async(ehci);
392         if (ehci->intr_count > 0)
393                 scan_intr(ehci);
394         if (ehci->isoc_count > 0)
395                 scan_isoc(ehci);
396         if (ehci->need_rescan)
397                 goto rescan;
398         ehci->scanning = false;
399
400         /* the IO watchdog guards against hardware or driver bugs that
401          * misplace IRQs, and should let us run completely without IRQs.
402          * such lossage has been observed on both VT6202 and VT8235.
403          */
404         turn_on_io_watchdog(ehci);
405 }
406
407 /*
408  * Called when the ehci_hcd module is removed.
409  */
410 static void ehci_stop (struct usb_hcd *hcd)
411 {
412         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
413
414         ehci_dbg (ehci, "stop\n");
415
416         /* no more interrupts ... */
417
418         spin_lock_irq(&ehci->lock);
419         ehci->enabled_hrtimer_events = 0;
420         spin_unlock_irq(&ehci->lock);
421
422         ehci_quiesce(ehci);
423         ehci_silence_controller(ehci);
424         ehci_reset (ehci);
425
426         hrtimer_cancel(&ehci->hrtimer);
427         remove_sysfs_files(ehci);
428         remove_debug_files (ehci);
429
430         /* root hub is shut down separately (first, when possible) */
431         spin_lock_irq (&ehci->lock);
432         end_free_itds(ehci);
433         spin_unlock_irq (&ehci->lock);
434         ehci_mem_cleanup (ehci);
435
436         if (ehci->amd_pll_fix == 1)
437                 usb_amd_dev_put();
438
439 #ifdef  EHCI_STATS
440         ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
441                 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
442                 ehci->stats.lost_iaa);
443         ehci_dbg (ehci, "complete %ld unlink %ld\n",
444                 ehci->stats.complete, ehci->stats.unlink);
445 #endif
446
447         dbg_status (ehci, "ehci_stop completed",
448                     ehci_readl(ehci, &ehci->regs->status));
449 }
450
451 /* one-time init, only for memory state */
452 static int ehci_init(struct usb_hcd *hcd)
453 {
454         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
455         u32                     temp;
456         int                     retval;
457         u32                     hcc_params;
458         struct ehci_qh_hw       *hw;
459
460         spin_lock_init(&ehci->lock);
461
462         /*
463          * keep io watchdog by default, those good HCDs could turn off it later
464          */
465         ehci->need_io_watchdog = 1;
466
467         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
468         ehci->hrtimer.function = ehci_hrtimer_func;
469         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
470
471         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
472
473         /*
474          * by default set standard 80% (== 100 usec/uframe) max periodic
475          * bandwidth as required by USB 2.0
476          */
477         ehci->uframe_periodic_max = 100;
478
479         /*
480          * hw default: 1K periodic list heads, one per frame.
481          * periodic_size can shrink by USBCMD update if hcc_params allows.
482          */
483         ehci->periodic_size = DEFAULT_I_TDPS;
484         INIT_LIST_HEAD(&ehci->intr_qh_list);
485         INIT_LIST_HEAD(&ehci->cached_itd_list);
486         INIT_LIST_HEAD(&ehci->cached_sitd_list);
487
488         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
489                 /* periodic schedule size can be smaller than default */
490                 switch (EHCI_TUNE_FLS) {
491                 case 0: ehci->periodic_size = 1024; break;
492                 case 1: ehci->periodic_size = 512; break;
493                 case 2: ehci->periodic_size = 256; break;
494                 default:        BUG();
495                 }
496         }
497         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
498                 return retval;
499
500         /* controllers may cache some of the periodic schedule ... */
501         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
502                 ehci->i_thresh = 0;
503         else                                    // N microframes cached
504                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
505
506         /*
507          * dedicate a qh for the async ring head, since we couldn't unlink
508          * a 'real' qh without stopping the async schedule [4.8].  use it
509          * as the 'reclamation list head' too.
510          * its dummy is used in hw_alt_next of many tds, to prevent the qh
511          * from automatically advancing to the next td after short reads.
512          */
513         ehci->async->qh_next.qh = NULL;
514         hw = ehci->async->hw;
515         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
516         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
517 #if defined(CONFIG_PPC_PS3)
518         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
519 #endif
520         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
521         hw->hw_qtd_next = EHCI_LIST_END(ehci);
522         ehci->async->qh_state = QH_STATE_LINKED;
523         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
524
525         /* clear interrupt enables, set irq latency */
526         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
527                 log2_irq_thresh = 0;
528         temp = 1 << (16 + log2_irq_thresh);
529         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
530                 ehci->has_ppcd = 1;
531                 ehci_dbg(ehci, "enable per-port change event\n");
532                 temp |= CMD_PPCEE;
533         }
534         if (HCC_CANPARK(hcc_params)) {
535                 /* HW default park == 3, on hardware that supports it (like
536                  * NVidia and ALI silicon), maximizes throughput on the async
537                  * schedule by avoiding QH fetches between transfers.
538                  *
539                  * With fast usb storage devices and NForce2, "park" seems to
540                  * make problems:  throughput reduction (!), data errors...
541                  */
542                 if (park) {
543                         park = min(park, (unsigned) 3);
544                         temp |= CMD_PARK;
545                         temp |= park << 8;
546                 }
547                 ehci_dbg(ehci, "park %d\n", park);
548         }
549         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
550                 /* periodic schedule size can be smaller than default */
551                 temp &= ~(3 << 2);
552                 temp |= (EHCI_TUNE_FLS << 2);
553         }
554         ehci->command = temp;
555
556         /* Accept arbitrarily long scatter-gather lists */
557         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
558                 hcd->self.sg_tablesize = ~0;
559         return 0;
560 }
561
562 /* start HC running; it's halted, ehci_init() has been run (once) */
563 static int ehci_run (struct usb_hcd *hcd)
564 {
565         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
566         u32                     temp;
567         u32                     hcc_params;
568
569         hcd->uses_new_polling = 1;
570
571         /* EHCI spec section 4.1 */
572
573         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
574         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
575
576         /*
577          * hcc_params controls whether ehci->regs->segment must (!!!)
578          * be used; it constrains QH/ITD/SITD and QTD locations.
579          * pci_pool consistent memory always uses segment zero.
580          * streaming mappings for I/O buffers, like pci_map_single(),
581          * can return segments above 4GB, if the device allows.
582          *
583          * NOTE:  the dma mask is visible through dma_supported(), so
584          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
585          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
586          * host side drivers though.
587          */
588         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
589         if (HCC_64BIT_ADDR(hcc_params)) {
590                 ehci_writel(ehci, 0, &ehci->regs->segment);
591 #if 0
592 // this is deeply broken on almost all architectures
593                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
594                         ehci_info(ehci, "enabled 64bit DMA\n");
595 #endif
596         }
597
598
599         // Philips, Intel, and maybe others need CMD_RUN before the
600         // root hub will detect new devices (why?); NEC doesn't
601         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
602         ehci->command |= CMD_RUN;
603         ehci_writel(ehci, ehci->command, &ehci->regs->command);
604         dbg_cmd (ehci, "init", ehci->command);
605
606         /*
607          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
608          * are explicitly handed to companion controller(s), so no TT is
609          * involved with the root hub.  (Except where one is integrated,
610          * and there's no companion controller unless maybe for USB OTG.)
611          *
612          * Turning on the CF flag will transfer ownership of all ports
613          * from the companions to the EHCI controller.  If any of the
614          * companions are in the middle of a port reset at the time, it
615          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
616          * guarantees that no resets are in progress.  After we set CF,
617          * a short delay lets the hardware catch up; new resets shouldn't
618          * be started before the port switching actions could complete.
619          */
620         down_write(&ehci_cf_port_reset_rwsem);
621         ehci->rh_state = EHCI_RH_RUNNING;
622         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
623         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
624         msleep(5);
625         up_write(&ehci_cf_port_reset_rwsem);
626         ehci->last_periodic_enable = ktime_get_real();
627
628         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
629         ehci_info (ehci,
630                 "USB %x.%x started, EHCI %x.%02x%s\n",
631                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
632                 temp >> 8, temp & 0xff,
633                 ignore_oc ? ", overcurrent ignored" : "");
634
635         ehci_writel(ehci, INTR_MASK,
636                     &ehci->regs->intr_enable); /* Turn On Interrupts */
637
638         /* GRR this is run-once init(), being done every time the HC starts.
639          * So long as they're part of class devices, we can't do it init()
640          * since the class device isn't created that early.
641          */
642         create_debug_files(ehci);
643         create_sysfs_files(ehci);
644
645         return 0;
646 }
647
648 int ehci_setup(struct usb_hcd *hcd)
649 {
650         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
651         int retval;
652
653         ehci->regs = (void __iomem *)ehci->caps +
654             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
655         dbg_hcs_params(ehci, "reset");
656         dbg_hcc_params(ehci, "reset");
657
658         /* cache this readonly data; minimize chip reads */
659         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
660
661         ehci->sbrn = HCD_USB2;
662
663         /* data structure init */
664         retval = ehci_init(hcd);
665         if (retval)
666                 return retval;
667
668         retval = ehci_halt(ehci);
669         if (retval)
670                 return retval;
671
672         if (ehci_is_TDI(ehci))
673                 tdi_reset(ehci);
674
675         ehci_reset(ehci);
676
677         return 0;
678 }
679 EXPORT_SYMBOL_GPL(ehci_setup);
680
681 /*-------------------------------------------------------------------------*/
682
683 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
684 {
685         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
686         u32                     status, masked_status, pcd_status = 0, cmd;
687         int                     bh;
688
689         spin_lock (&ehci->lock);
690
691         status = ehci_readl(ehci, &ehci->regs->status);
692
693         /* e.g. cardbus physical eject */
694         if (status == ~(u32) 0) {
695                 ehci_dbg (ehci, "device removed\n");
696                 goto dead;
697         }
698
699         /*
700          * We don't use STS_FLR, but some controllers don't like it to
701          * remain on, so mask it out along with the other status bits.
702          */
703         masked_status = status & (INTR_MASK | STS_FLR);
704
705         /* Shared IRQ? */
706         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
707                 spin_unlock(&ehci->lock);
708                 return IRQ_NONE;
709         }
710
711         /* clear (just) interrupts */
712         ehci_writel(ehci, masked_status, &ehci->regs->status);
713         cmd = ehci_readl(ehci, &ehci->regs->command);
714         bh = 0;
715
716 #ifdef  VERBOSE_DEBUG
717         /* unrequested/ignored: Frame List Rollover */
718         dbg_status (ehci, "irq", status);
719 #endif
720
721         /* INT, ERR, and IAA interrupt rates can be throttled */
722
723         /* normal [4.15.1.2] or error [4.15.1.1] completion */
724         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
725                 if (likely ((status & STS_ERR) == 0))
726                         COUNT (ehci->stats.normal);
727                 else
728                         COUNT (ehci->stats.error);
729                 bh = 1;
730         }
731
732         /* complete the unlinking of some qh [4.15.2.3] */
733         if (status & STS_IAA) {
734
735                 /* Turn off the IAA watchdog */
736                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
737
738                 /*
739                  * Mild optimization: Allow another IAAD to reset the
740                  * hrtimer, if one occurs before the next expiration.
741                  * In theory we could always cancel the hrtimer, but
742                  * tests show that about half the time it will be reset
743                  * for some other event anyway.
744                  */
745                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
746                         ++ehci->next_hrtimer_event;
747
748                 /* guard against (alleged) silicon errata */
749                 if (cmd & CMD_IAAD)
750                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
751                 if (ehci->async_iaa) {
752                         COUNT(ehci->stats.iaa);
753                         end_unlink_async(ehci);
754                 } else
755                         ehci_dbg(ehci, "IAA with nothing unlinked?\n");
756         }
757
758         /* remote wakeup [4.3.1] */
759         if (status & STS_PCD) {
760                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
761                 u32             ppcd = 0;
762
763                 /* kick root hub later */
764                 pcd_status = status;
765
766                 /* resume root hub? */
767                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
768                         usb_hcd_resume_root_hub(hcd);
769
770                 /* get per-port change detect bits */
771                 if (ehci->has_ppcd)
772                         ppcd = status >> 16;
773
774                 while (i--) {
775                         int pstatus;
776
777                         /* leverage per-port change bits feature */
778                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
779                                 continue;
780                         pstatus = ehci_readl(ehci,
781                                          &ehci->regs->port_status[i]);
782
783                         if (pstatus & PORT_OWNER)
784                                 continue;
785                         if (!(test_bit(i, &ehci->suspended_ports) &&
786                                         ((pstatus & PORT_RESUME) ||
787                                                 !(pstatus & PORT_SUSPEND)) &&
788                                         (pstatus & PORT_PE) &&
789                                         ehci->reset_done[i] == 0))
790                                 continue;
791
792                         /* start 20 msec resume signaling from this port,
793                          * and make khubd collect PORT_STAT_C_SUSPEND to
794                          * stop that signaling.  Use 5 ms extra for safety,
795                          * like usb_port_resume() does.
796                          */
797                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
798                         set_bit(i, &ehci->resuming_ports);
799                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
800                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
801                 }
802         }
803
804         /* PCI errors [4.15.2.4] */
805         if (unlikely ((status & STS_FATAL) != 0)) {
806                 ehci_err(ehci, "fatal error\n");
807                 dbg_cmd(ehci, "fatal", cmd);
808                 dbg_status(ehci, "fatal", status);
809 dead:
810                 usb_hc_died(hcd);
811
812                 /* Don't let the controller do anything more */
813                 ehci->shutdown = true;
814                 ehci->rh_state = EHCI_RH_STOPPING;
815                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
816                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
817                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
818                 ehci_handle_controller_death(ehci);
819
820                 /* Handle completions when the controller stops */
821                 bh = 0;
822         }
823
824         if (bh)
825                 ehci_work (ehci);
826         spin_unlock (&ehci->lock);
827         if (pcd_status)
828                 usb_hcd_poll_rh_status(hcd);
829         return IRQ_HANDLED;
830 }
831
832 /*-------------------------------------------------------------------------*/
833
834 /*
835  * non-error returns are a promise to giveback() the urb later
836  * we drop ownership so next owner (or urb unlink) can get it
837  *
838  * urb + dev is in hcd.self.controller.urb_list
839  * we're queueing TDs onto software and hardware lists
840  *
841  * hcd-specific init for hcpriv hasn't been done yet
842  *
843  * NOTE:  control, bulk, and interrupt share the same code to append TDs
844  * to a (possibly active) QH, and the same QH scanning code.
845  */
846 static int ehci_urb_enqueue (
847         struct usb_hcd  *hcd,
848         struct urb      *urb,
849         gfp_t           mem_flags
850 ) {
851         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
852         struct list_head        qtd_list;
853
854         INIT_LIST_HEAD (&qtd_list);
855
856         switch (usb_pipetype (urb->pipe)) {
857         case PIPE_CONTROL:
858                 /* qh_completions() code doesn't handle all the fault cases
859                  * in multi-TD control transfers.  Even 1KB is rare anyway.
860                  */
861                 if (urb->transfer_buffer_length > (16 * 1024))
862                         return -EMSGSIZE;
863                 /* FALLTHROUGH */
864         /* case PIPE_BULK: */
865         default:
866                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
867                         return -ENOMEM;
868                 return submit_async(ehci, urb, &qtd_list, mem_flags);
869
870         case PIPE_INTERRUPT:
871                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
872                         return -ENOMEM;
873                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
874
875         case PIPE_ISOCHRONOUS:
876                 if (urb->dev->speed == USB_SPEED_HIGH)
877                         return itd_submit (ehci, urb, mem_flags);
878                 else
879                         return sitd_submit (ehci, urb, mem_flags);
880         }
881 }
882
883 /* remove from hardware lists
884  * completions normally happen asynchronously
885  */
886
887 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
888 {
889         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
890         struct ehci_qh          *qh;
891         unsigned long           flags;
892         int                     rc;
893
894         spin_lock_irqsave (&ehci->lock, flags);
895         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
896         if (rc)
897                 goto done;
898
899         switch (usb_pipetype (urb->pipe)) {
900         // case PIPE_CONTROL:
901         // case PIPE_BULK:
902         default:
903                 qh = (struct ehci_qh *) urb->hcpriv;
904                 if (!qh)
905                         break;
906                 switch (qh->qh_state) {
907                 case QH_STATE_LINKED:
908                 case QH_STATE_COMPLETING:
909                         start_unlink_async(ehci, qh);
910                         break;
911                 case QH_STATE_UNLINK:
912                 case QH_STATE_UNLINK_WAIT:
913                         /* already started */
914                         break;
915                 case QH_STATE_IDLE:
916                         /* QH might be waiting for a Clear-TT-Buffer */
917                         qh_completions(ehci, qh);
918                         break;
919                 }
920                 break;
921
922         case PIPE_INTERRUPT:
923                 qh = (struct ehci_qh *) urb->hcpriv;
924                 if (!qh)
925                         break;
926                 switch (qh->qh_state) {
927                 case QH_STATE_LINKED:
928                 case QH_STATE_COMPLETING:
929                         start_unlink_intr(ehci, qh);
930                         break;
931                 case QH_STATE_IDLE:
932                         qh_completions (ehci, qh);
933                         break;
934                 default:
935                         ehci_dbg (ehci, "bogus qh %p state %d\n",
936                                         qh, qh->qh_state);
937                         goto done;
938                 }
939                 break;
940
941         case PIPE_ISOCHRONOUS:
942                 // itd or sitd ...
943
944                 // wait till next completion, do it then.
945                 // completion irqs can wait up to 1024 msec,
946                 break;
947         }
948 done:
949         spin_unlock_irqrestore (&ehci->lock, flags);
950         return rc;
951 }
952
953 /*-------------------------------------------------------------------------*/
954
955 // bulk qh holds the data toggle
956
957 static void
958 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
959 {
960         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
961         unsigned long           flags;
962         struct ehci_qh          *qh, *tmp;
963
964         /* ASSERT:  any requests/urbs are being unlinked */
965         /* ASSERT:  nobody can be submitting urbs for this any more */
966
967 rescan:
968         spin_lock_irqsave (&ehci->lock, flags);
969         qh = ep->hcpriv;
970         if (!qh)
971                 goto done;
972
973         /* endpoints can be iso streams.  for now, we don't
974          * accelerate iso completions ... so spin a while.
975          */
976         if (qh->hw == NULL) {
977                 struct ehci_iso_stream  *stream = ep->hcpriv;
978
979                 if (!list_empty(&stream->td_list))
980                         goto idle_timeout;
981
982                 /* BUG_ON(!list_empty(&stream->free_list)); */
983                 kfree(stream);
984                 goto done;
985         }
986
987         if (ehci->rh_state < EHCI_RH_RUNNING)
988                 qh->qh_state = QH_STATE_IDLE;
989         switch (qh->qh_state) {
990         case QH_STATE_LINKED:
991         case QH_STATE_COMPLETING:
992                 for (tmp = ehci->async->qh_next.qh;
993                                 tmp && tmp != qh;
994                                 tmp = tmp->qh_next.qh)
995                         continue;
996                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
997                  * may already be unlinked.
998                  */
999                 if (tmp)
1000                         start_unlink_async(ehci, qh);
1001                 /* FALL THROUGH */
1002         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1003         case QH_STATE_UNLINK_WAIT:
1004 idle_timeout:
1005                 spin_unlock_irqrestore (&ehci->lock, flags);
1006                 schedule_timeout_uninterruptible(1);
1007                 goto rescan;
1008         case QH_STATE_IDLE:             /* fully unlinked */
1009                 if (qh->clearing_tt)
1010                         goto idle_timeout;
1011                 if (list_empty (&qh->qtd_list)) {
1012                         qh_destroy(ehci, qh);
1013                         break;
1014                 }
1015                 /* else FALL THROUGH */
1016         default:
1017                 /* caller was supposed to have unlinked any requests;
1018                  * that's not our job.  just leak this memory.
1019                  */
1020                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1021                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1022                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1023                 break;
1024         }
1025  done:
1026         ep->hcpriv = NULL;
1027         spin_unlock_irqrestore (&ehci->lock, flags);
1028 }
1029
1030 static void
1031 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1032 {
1033         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1034         struct ehci_qh          *qh;
1035         int                     eptype = usb_endpoint_type(&ep->desc);
1036         int                     epnum = usb_endpoint_num(&ep->desc);
1037         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1038         unsigned long           flags;
1039
1040         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1041                 return;
1042
1043         spin_lock_irqsave(&ehci->lock, flags);
1044         qh = ep->hcpriv;
1045
1046         /* For Bulk and Interrupt endpoints we maintain the toggle state
1047          * in the hardware; the toggle bits in udev aren't used at all.
1048          * When an endpoint is reset by usb_clear_halt() we must reset
1049          * the toggle bit in the QH.
1050          */
1051         if (qh) {
1052                 usb_settoggle(qh->dev, epnum, is_out, 0);
1053                 if (!list_empty(&qh->qtd_list)) {
1054                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1055                 } else if (qh->qh_state == QH_STATE_LINKED ||
1056                                 qh->qh_state == QH_STATE_COMPLETING) {
1057
1058                         /* The toggle value in the QH can't be updated
1059                          * while the QH is active.  Unlink it now;
1060                          * re-linking will call qh_refresh().
1061                          */
1062                         if (eptype == USB_ENDPOINT_XFER_BULK)
1063                                 start_unlink_async(ehci, qh);
1064                         else
1065                                 start_unlink_intr(ehci, qh);
1066                 }
1067         }
1068         spin_unlock_irqrestore(&ehci->lock, flags);
1069 }
1070
1071 static int ehci_get_frame (struct usb_hcd *hcd)
1072 {
1073         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1074         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1075 }
1076
1077 /*-------------------------------------------------------------------------*/
1078
1079 #ifdef  CONFIG_PM
1080
1081 /* suspend/resume, section 4.3 */
1082
1083 /* These routines handle the generic parts of controller suspend/resume */
1084
1085 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1086 {
1087         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1088
1089         if (time_before(jiffies, ehci->next_statechange))
1090                 msleep(10);
1091
1092         /*
1093          * Root hub was already suspended.  Disable IRQ emission and
1094          * mark HW unaccessible.  The PM and USB cores make sure that
1095          * the root hub is either suspended or stopped.
1096          */
1097         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1098
1099         spin_lock_irq(&ehci->lock);
1100         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1101         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1102
1103         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1104         spin_unlock_irq(&ehci->lock);
1105
1106         return 0;
1107 }
1108 EXPORT_SYMBOL_GPL(ehci_suspend);
1109
1110 /* Returns 0 if power was preserved, 1 if power was lost */
1111 int ehci_resume(struct usb_hcd *hcd, bool hibernated)
1112 {
1113         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1114
1115         if (time_before(jiffies, ehci->next_statechange))
1116                 msleep(100);
1117
1118         /* Mark hardware accessible again as we are back to full power by now */
1119         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1120
1121         if (ehci->shutdown)
1122                 return 0;               /* Controller is dead */
1123
1124         /*
1125          * If CF is still set and we aren't resuming from hibernation
1126          * then we maintained suspend power.
1127          * Just undo the effect of ehci_suspend().
1128          */
1129         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1130                         !hibernated) {
1131                 int     mask = INTR_MASK;
1132
1133                 ehci_prepare_ports_for_controller_resume(ehci);
1134
1135                 spin_lock_irq(&ehci->lock);
1136                 if (ehci->shutdown)
1137                         goto skip;
1138
1139                 if (!hcd->self.root_hub->do_remote_wakeup)
1140                         mask &= ~STS_PCD;
1141                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1142                 ehci_readl(ehci, &ehci->regs->intr_enable);
1143  skip:
1144                 spin_unlock_irq(&ehci->lock);
1145                 return 0;
1146         }
1147
1148         /*
1149          * Else reset, to cope with power loss or resume from hibernation
1150          * having let the firmware kick in during reboot.
1151          */
1152         usb_root_hub_lost_power(hcd->self.root_hub);
1153         (void) ehci_halt(ehci);
1154         (void) ehci_reset(ehci);
1155
1156         spin_lock_irq(&ehci->lock);
1157         if (ehci->shutdown)
1158                 goto skip;
1159
1160         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1161         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1162         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1163
1164         ehci->rh_state = EHCI_RH_SUSPENDED;
1165         spin_unlock_irq(&ehci->lock);
1166
1167         return 1;
1168 }
1169 EXPORT_SYMBOL_GPL(ehci_resume);
1170
1171 #endif
1172
1173 /*-------------------------------------------------------------------------*/
1174
1175 /*
1176  * Generic structure: This gets copied for platform drivers so that
1177  * individual entries can be overridden as needed.
1178  */
1179
1180 static const struct hc_driver ehci_hc_driver = {
1181         .description =          hcd_name,
1182         .product_desc =         "EHCI Host Controller",
1183         .hcd_priv_size =        sizeof(struct ehci_hcd),
1184
1185         /*
1186          * generic hardware linkage
1187          */
1188         .irq =                  ehci_irq,
1189         .flags =                HCD_MEMORY | HCD_USB2,
1190
1191         /*
1192          * basic lifecycle operations
1193          */
1194         .reset =                ehci_setup,
1195         .start =                ehci_run,
1196         .stop =                 ehci_stop,
1197         .shutdown =             ehci_shutdown,
1198
1199         /*
1200          * managing i/o requests and associated device resources
1201          */
1202         .urb_enqueue =          ehci_urb_enqueue,
1203         .urb_dequeue =          ehci_urb_dequeue,
1204         .endpoint_disable =     ehci_endpoint_disable,
1205         .endpoint_reset =       ehci_endpoint_reset,
1206         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1207
1208         /*
1209          * scheduling support
1210          */
1211         .get_frame_number =     ehci_get_frame,
1212
1213         /*
1214          * root hub support
1215          */
1216         .hub_status_data =      ehci_hub_status_data,
1217         .hub_control =          ehci_hub_control,
1218         .bus_suspend =          ehci_bus_suspend,
1219         .bus_resume =           ehci_bus_resume,
1220         .relinquish_port =      ehci_relinquish_port,
1221         .port_handed_over =     ehci_port_handed_over,
1222 };
1223
1224 void ehci_init_driver(struct hc_driver *drv,
1225                 const struct ehci_driver_overrides *over)
1226 {
1227         /* Copy the generic table to drv and then apply the overrides */
1228         *drv = ehci_hc_driver;
1229
1230         if (over) {
1231                 drv->hcd_priv_size += over->extra_priv_size;
1232                 if (over->reset)
1233                         drv->reset = over->reset;
1234         }
1235 }
1236 EXPORT_SYMBOL_GPL(ehci_init_driver);
1237
1238 /*-------------------------------------------------------------------------*/
1239
1240 MODULE_DESCRIPTION(DRIVER_DESC);
1241 MODULE_AUTHOR (DRIVER_AUTHOR);
1242 MODULE_LICENSE ("GPL");
1243
1244 #ifdef CONFIG_USB_EHCI_FSL
1245 #include "ehci-fsl.c"
1246 #define PLATFORM_DRIVER         ehci_fsl_driver
1247 #endif
1248
1249 #ifdef CONFIG_USB_EHCI_MXC
1250 #include "ehci-mxc.c"
1251 #define PLATFORM_DRIVER         ehci_mxc_driver
1252 #endif
1253
1254 #ifdef CONFIG_USB_EHCI_SH
1255 #include "ehci-sh.c"
1256 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1257 #endif
1258
1259 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1260 #include "ehci-omap.c"
1261 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1262 #endif
1263
1264 #ifdef CONFIG_PPC_PS3
1265 #include "ehci-ps3.c"
1266 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1267 #endif
1268
1269 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1270 #include "ehci-ppc-of.c"
1271 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1272 #endif
1273
1274 #ifdef CONFIG_XPS_USB_HCD_XILINX
1275 #include "ehci-xilinx-of.c"
1276 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1277 #endif
1278
1279 #ifdef CONFIG_PLAT_ORION
1280 #include "ehci-orion.c"
1281 #define PLATFORM_DRIVER         ehci_orion_driver
1282 #endif
1283
1284 #ifdef CONFIG_USB_W90X900_EHCI
1285 #include "ehci-w90x900.c"
1286 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1287 #endif
1288
1289 #ifdef CONFIG_ARCH_AT91
1290 #include "ehci-atmel.c"
1291 #define PLATFORM_DRIVER         ehci_atmel_driver
1292 #endif
1293
1294 #ifdef CONFIG_USB_OCTEON_EHCI
1295 #include "ehci-octeon.c"
1296 #define PLATFORM_DRIVER         ehci_octeon_driver
1297 #endif
1298
1299 #ifdef CONFIG_ARCH_VT8500
1300 #include "ehci-vt8500.c"
1301 #define PLATFORM_DRIVER         vt8500_ehci_driver
1302 #endif
1303
1304 #ifdef CONFIG_PLAT_SPEAR
1305 #include "ehci-spear.c"
1306 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1307 #endif
1308
1309 #ifdef CONFIG_USB_EHCI_MSM
1310 #include "ehci-msm.c"
1311 #define PLATFORM_DRIVER         ehci_msm_driver
1312 #endif
1313
1314 #ifdef CONFIG_TILE_USB
1315 #include "ehci-tilegx.c"
1316 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1317 #endif
1318
1319 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1320 #include "ehci-pmcmsp.c"
1321 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1322 #endif
1323
1324 #ifdef CONFIG_USB_EHCI_TEGRA
1325 #include "ehci-tegra.c"
1326 #define PLATFORM_DRIVER         tegra_ehci_driver
1327 #endif
1328
1329 #ifdef CONFIG_USB_EHCI_S5P
1330 #include "ehci-s5p.c"
1331 #define PLATFORM_DRIVER         s5p_ehci_driver
1332 #endif
1333
1334 #ifdef CONFIG_SPARC_LEON
1335 #include "ehci-grlib.c"
1336 #define PLATFORM_DRIVER         ehci_grlib_driver
1337 #endif
1338
1339 #ifdef CONFIG_USB_EHCI_MV
1340 #include "ehci-mv.c"
1341 #define        PLATFORM_DRIVER         ehci_mv_driver
1342 #endif
1343
1344 #ifdef CONFIG_MIPS_SEAD3
1345 #include "ehci-sead3.c"
1346 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1347 #endif
1348
1349 #if !IS_ENABLED(CONFIG_USB_EHCI_PCI) && \
1350         !IS_ENABLED(CONFIG_USB_EHCI_HCD_PLATFORM) && \
1351         !defined(CONFIG_USB_CHIPIDEA_HOST) && \
1352         !defined(PLATFORM_DRIVER) && \
1353         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1354         !defined(OF_PLATFORM_DRIVER) && \
1355         !defined(XILINX_OF_PLATFORM_DRIVER)
1356 #error "missing bus glue for ehci-hcd"
1357 #endif
1358
1359 static int __init ehci_hcd_init(void)
1360 {
1361         int retval = 0;
1362
1363         if (usb_disabled())
1364                 return -ENODEV;
1365
1366         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1367         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1368         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1369                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1370                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1371                                 " before uhci_hcd and ohci_hcd, not after\n");
1372
1373         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1374                  hcd_name,
1375                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1376                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1377
1378 #ifdef DEBUG
1379         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1380         if (!ehci_debug_root) {
1381                 retval = -ENOENT;
1382                 goto err_debug;
1383         }
1384 #endif
1385
1386 #ifdef PLATFORM_DRIVER
1387         retval = platform_driver_register(&PLATFORM_DRIVER);
1388         if (retval < 0)
1389                 goto clean0;
1390 #endif
1391
1392 #ifdef PS3_SYSTEM_BUS_DRIVER
1393         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1394         if (retval < 0)
1395                 goto clean2;
1396 #endif
1397
1398 #ifdef OF_PLATFORM_DRIVER
1399         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1400         if (retval < 0)
1401                 goto clean3;
1402 #endif
1403
1404 #ifdef XILINX_OF_PLATFORM_DRIVER
1405         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1406         if (retval < 0)
1407                 goto clean4;
1408 #endif
1409         return retval;
1410
1411 #ifdef XILINX_OF_PLATFORM_DRIVER
1412         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1413 clean4:
1414 #endif
1415 #ifdef OF_PLATFORM_DRIVER
1416         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1417 clean3:
1418 #endif
1419 #ifdef PS3_SYSTEM_BUS_DRIVER
1420         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1421 clean2:
1422 #endif
1423 #ifdef PLATFORM_DRIVER
1424         platform_driver_unregister(&PLATFORM_DRIVER);
1425 clean0:
1426 #endif
1427 #ifdef DEBUG
1428         debugfs_remove(ehci_debug_root);
1429         ehci_debug_root = NULL;
1430 err_debug:
1431 #endif
1432         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1433         return retval;
1434 }
1435 module_init(ehci_hcd_init);
1436
1437 static void __exit ehci_hcd_cleanup(void)
1438 {
1439 #ifdef XILINX_OF_PLATFORM_DRIVER
1440         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1441 #endif
1442 #ifdef OF_PLATFORM_DRIVER
1443         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1444 #endif
1445 #ifdef PLATFORM_DRIVER
1446         platform_driver_unregister(&PLATFORM_DRIVER);
1447 #endif
1448 #ifdef PS3_SYSTEM_BUS_DRIVER
1449         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1450 #endif
1451 #ifdef DEBUG
1452         debugfs_remove(ehci_debug_root);
1453 #endif
1454         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1455 }
1456 module_exit(ehci_hcd_cleanup);