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[~shefty/rdma-dev.git] / drivers / video / via / lcd.c
1 /*
2  * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
3  * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
4
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public
7  * License as published by the Free Software Foundation;
8  * either version 2, or (at your option) any later version.
9
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
12  * the implied warranty of MERCHANTABILITY or FITNESS FOR
13  * A PARTICULAR PURPOSE.See the GNU General Public License
14  * for more details.
15
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc.,
19  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20  */
21 #include <linux/via-core.h>
22 #include <linux/via_i2c.h>
23 #include "global.h"
24
25 #define viafb_compact_res(x, y) (((x)<<16)|(y))
26
27 /* CLE266 Software Power Sequence */
28 /* {Mask}, {Data}, {Delay} */
29 int PowerSequenceOn[3][3] = { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06},
30         {0x19, 0x1FE, 0x01} };
31 int PowerSequenceOff[3][3] = { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00},
32         {0xD2, 0x19, 0x01} };
33
34 static struct _lcd_scaling_factor lcd_scaling_factor = {
35         /* LCD Horizontal Scaling Factor Register */
36         {LCD_HOR_SCALING_FACTOR_REG_NUM,
37          {{CR9F, 0, 1}, {CR77, 0, 7}, {CR79, 4, 5} } },
38         /* LCD Vertical Scaling Factor Register */
39         {LCD_VER_SCALING_FACTOR_REG_NUM,
40          {{CR79, 3, 3}, {CR78, 0, 7}, {CR79, 6, 7} } }
41 };
42 static struct _lcd_scaling_factor lcd_scaling_factor_CLE = {
43         /* LCD Horizontal Scaling Factor Register */
44         {LCD_HOR_SCALING_FACTOR_REG_NUM_CLE, {{CR77, 0, 7}, {CR79, 4, 5} } },
45         /* LCD Vertical Scaling Factor Register */
46         {LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } }
47 };
48
49 static int check_lvds_chip(int device_id_subaddr, int device_id);
50 static bool lvds_identify_integratedlvds(void);
51 static void fp_id_to_vindex(int panel_id);
52 static int lvds_register_read(int index);
53 static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
54                       int panel_vres);
55 static void via_pitch_alignment_patch_lcd(
56         struct lvds_setting_information *plvds_setting_info,
57                                    struct lvds_chip_information
58                                    *plvds_chip_info);
59 static void lcd_patch_skew_dvp0(struct lvds_setting_information
60                          *plvds_setting_info,
61                          struct lvds_chip_information *plvds_chip_info);
62 static void lcd_patch_skew_dvp1(struct lvds_setting_information
63                          *plvds_setting_info,
64                          struct lvds_chip_information *plvds_chip_info);
65 static void lcd_patch_skew(struct lvds_setting_information
66         *plvds_setting_info, struct lvds_chip_information *plvds_chip_info);
67
68 static void integrated_lvds_disable(struct lvds_setting_information
69                              *plvds_setting_info,
70                              struct lvds_chip_information *plvds_chip_info);
71 static void integrated_lvds_enable(struct lvds_setting_information
72                             *plvds_setting_info,
73                             struct lvds_chip_information *plvds_chip_info);
74 static void lcd_powersequence_off(void);
75 static void lcd_powersequence_on(void);
76 static void fill_lcd_format(void);
77 static void check_diport_of_integrated_lvds(
78         struct lvds_chip_information *plvds_chip_info,
79                                      struct lvds_setting_information
80                                      *plvds_setting_info);
81 static struct display_timing lcd_centering_timging(struct display_timing
82                                             mode_crt_reg,
83                                            struct display_timing panel_crt_reg);
84
85 static int check_lvds_chip(int device_id_subaddr, int device_id)
86 {
87         if (lvds_register_read(device_id_subaddr) == device_id)
88                 return OK;
89         else
90                 return FAIL;
91 }
92
93 void viafb_init_lcd_size(void)
94 {
95         DEBUG_MSG(KERN_INFO "viafb_init_lcd_size()\n");
96
97         fp_id_to_vindex(viafb_lcd_panel_id);
98         viaparinfo->lvds_setting_info2->lcd_panel_id =
99                 viaparinfo->lvds_setting_info->lcd_panel_id;
100         viaparinfo->lvds_setting_info2->lcd_panel_hres =
101                 viaparinfo->lvds_setting_info->lcd_panel_hres;
102         viaparinfo->lvds_setting_info2->lcd_panel_vres =
103                 viaparinfo->lvds_setting_info->lcd_panel_vres;
104         viaparinfo->lvds_setting_info2->device_lcd_dualedge =
105             viaparinfo->lvds_setting_info->device_lcd_dualedge;
106         viaparinfo->lvds_setting_info2->LCDDithering =
107                 viaparinfo->lvds_setting_info->LCDDithering;
108 }
109
110 static bool lvds_identify_integratedlvds(void)
111 {
112         if (viafb_display_hardware_layout == HW_LAYOUT_LCD_EXTERNAL_LCD2) {
113                 /* Two dual channel LCD (Internal LVDS + External LVDS): */
114                 /* If we have an external LVDS, such as VT1636, we should
115                    have its chip ID already. */
116                 if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
117                         viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
118                             INTEGRATED_LVDS;
119                         DEBUG_MSG(KERN_INFO "Support two dual channel LVDS! "
120                                   "(Internal LVDS + External LVDS)\n");
121                 } else {
122                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
123                             INTEGRATED_LVDS;
124                         DEBUG_MSG(KERN_INFO "Not found external LVDS, "
125                                   "so can't support two dual channel LVDS!\n");
126                 }
127         } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) {
128                 /* Two single channel LCD (Internal LVDS + Internal LVDS): */
129                 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
130                 INTEGRATED_LVDS;
131                 viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name =
132                         INTEGRATED_LVDS;
133                 DEBUG_MSG(KERN_INFO "Support two single channel LVDS! "
134                           "(Internal LVDS + Internal LVDS)\n");
135         } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) {
136                 /* If we have found external LVDS, just use it,
137                    otherwise, we will use internal LVDS as default. */
138                 if (!viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
139                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
140                             INTEGRATED_LVDS;
141                         DEBUG_MSG(KERN_INFO "Found Integrated LVDS!\n");
142                 }
143         } else {
144                 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
145                         NON_LVDS_TRANSMITTER;
146                 DEBUG_MSG(KERN_INFO "Do not support LVDS!\n");
147                 return false;
148         }
149
150         return true;
151 }
152
153 int viafb_lvds_trasmitter_identify(void)
154 {
155         if (viafb_lvds_identify_vt1636(VIA_PORT_31)) {
156                 viaparinfo->chip_info->lvds_chip_info.i2c_port = VIA_PORT_31;
157                 DEBUG_MSG(KERN_INFO
158                           "Found VIA VT1636 LVDS on port i2c 0x31\n");
159         } else {
160                 if (viafb_lvds_identify_vt1636(VIA_PORT_2C)) {
161                         viaparinfo->chip_info->lvds_chip_info.i2c_port =
162                                 VIA_PORT_2C;
163                         DEBUG_MSG(KERN_INFO
164                                   "Found VIA VT1636 LVDS on port gpio 0x2c\n");
165                 }
166         }
167
168         if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700)
169                 lvds_identify_integratedlvds();
170
171         if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
172                 return true;
173         /* Check for VT1631: */
174         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = VT1631_LVDS;
175         viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
176                 VT1631_LVDS_I2C_ADDR;
177
178         if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID) != FAIL) {
179                 DEBUG_MSG(KERN_INFO "\n VT1631 LVDS ! \n");
180                 DEBUG_MSG(KERN_INFO "\n %2d",
181                           viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
182                 DEBUG_MSG(KERN_INFO "\n %2d",
183                           viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
184                 return OK;
185         }
186
187         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
188                 NON_LVDS_TRANSMITTER;
189         viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
190                 VT1631_LVDS_I2C_ADDR;
191         return FAIL;
192 }
193
194 static void fp_id_to_vindex(int panel_id)
195 {
196         DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n");
197
198         if (panel_id > LCD_PANEL_ID_MAXIMUM)
199                 viafb_lcd_panel_id = panel_id =
200                 viafb_read_reg(VIACR, CR3F) & 0x0F;
201
202         switch (panel_id) {
203         case 0x0:
204                 viaparinfo->lvds_setting_info->lcd_panel_hres = 640;
205                 viaparinfo->lvds_setting_info->lcd_panel_vres = 480;
206                 viaparinfo->lvds_setting_info->lcd_panel_id =
207                         LCD_PANEL_ID0_640X480;
208                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
209                 viaparinfo->lvds_setting_info->LCDDithering = 1;
210                 break;
211         case 0x1:
212                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
213                 viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
214                 viaparinfo->lvds_setting_info->lcd_panel_id =
215                         LCD_PANEL_ID1_800X600;
216                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
217                 viaparinfo->lvds_setting_info->LCDDithering = 1;
218                 break;
219         case 0x2:
220                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
221                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
222                 viaparinfo->lvds_setting_info->lcd_panel_id =
223                         LCD_PANEL_ID2_1024X768;
224                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
225                 viaparinfo->lvds_setting_info->LCDDithering = 1;
226                 break;
227         case 0x3:
228                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
229                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
230                 viaparinfo->lvds_setting_info->lcd_panel_id =
231                         LCD_PANEL_ID3_1280X768;
232                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
233                 viaparinfo->lvds_setting_info->LCDDithering = 1;
234                 break;
235         case 0x4:
236                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
237                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1024;
238                 viaparinfo->lvds_setting_info->lcd_panel_id =
239                         LCD_PANEL_ID4_1280X1024;
240                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
241                 viaparinfo->lvds_setting_info->LCDDithering = 1;
242                 break;
243         case 0x5:
244                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
245                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1050;
246                 viaparinfo->lvds_setting_info->lcd_panel_id =
247                         LCD_PANEL_ID5_1400X1050;
248                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
249                 viaparinfo->lvds_setting_info->LCDDithering = 1;
250                 break;
251         case 0x6:
252                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
253                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1200;
254                 viaparinfo->lvds_setting_info->lcd_panel_id =
255                         LCD_PANEL_ID6_1600X1200;
256                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
257                 viaparinfo->lvds_setting_info->LCDDithering = 1;
258                 break;
259         case 0x8:
260                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
261                 viaparinfo->lvds_setting_info->lcd_panel_vres = 480;
262                 viaparinfo->lvds_setting_info->lcd_panel_id =
263                         LCD_PANEL_IDA_800X480;
264                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
265                 viaparinfo->lvds_setting_info->LCDDithering = 1;
266                 break;
267         case 0x9:
268                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
269                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
270                 viaparinfo->lvds_setting_info->lcd_panel_id =
271                         LCD_PANEL_ID2_1024X768;
272                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
273                 viaparinfo->lvds_setting_info->LCDDithering = 1;
274                 break;
275         case 0xA:
276                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
277                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
278                 viaparinfo->lvds_setting_info->lcd_panel_id =
279                         LCD_PANEL_ID2_1024X768;
280                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
281                 viaparinfo->lvds_setting_info->LCDDithering = 0;
282                 break;
283         case 0xB:
284                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
285                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
286                 viaparinfo->lvds_setting_info->lcd_panel_id =
287                         LCD_PANEL_ID2_1024X768;
288                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
289                 viaparinfo->lvds_setting_info->LCDDithering = 0;
290                 break;
291         case 0xC:
292                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
293                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
294                 viaparinfo->lvds_setting_info->lcd_panel_id =
295                         LCD_PANEL_ID3_1280X768;
296                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
297                 viaparinfo->lvds_setting_info->LCDDithering = 0;
298                 break;
299         case 0xD:
300                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
301                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1024;
302                 viaparinfo->lvds_setting_info->lcd_panel_id =
303                         LCD_PANEL_ID4_1280X1024;
304                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
305                 viaparinfo->lvds_setting_info->LCDDithering = 0;
306                 break;
307         case 0xE:
308                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1400;
309                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1050;
310                 viaparinfo->lvds_setting_info->lcd_panel_id =
311                         LCD_PANEL_ID5_1400X1050;
312                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
313                 viaparinfo->lvds_setting_info->LCDDithering = 0;
314                 break;
315         case 0xF:
316                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1600;
317                 viaparinfo->lvds_setting_info->lcd_panel_vres = 1200;
318                 viaparinfo->lvds_setting_info->lcd_panel_id =
319                         LCD_PANEL_ID6_1600X1200;
320                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
321                 viaparinfo->lvds_setting_info->LCDDithering = 0;
322                 break;
323         case 0x10:
324                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1366;
325                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
326                 viaparinfo->lvds_setting_info->lcd_panel_id =
327                         LCD_PANEL_ID7_1366X768;
328                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
329                 viaparinfo->lvds_setting_info->LCDDithering = 0;
330                 break;
331         case 0x11:
332                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1024;
333                 viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
334                 viaparinfo->lvds_setting_info->lcd_panel_id =
335                         LCD_PANEL_ID8_1024X600;
336                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
337                 viaparinfo->lvds_setting_info->LCDDithering = 1;
338                 break;
339         case 0x12:
340                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
341                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
342                 viaparinfo->lvds_setting_info->lcd_panel_id =
343                         LCD_PANEL_ID3_1280X768;
344                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
345                 viaparinfo->lvds_setting_info->LCDDithering = 1;
346                 break;
347         case 0x13:
348                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
349                 viaparinfo->lvds_setting_info->lcd_panel_vres = 800;
350                 viaparinfo->lvds_setting_info->lcd_panel_id =
351                         LCD_PANEL_ID9_1280X800;
352                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
353                 viaparinfo->lvds_setting_info->LCDDithering = 1;
354                 break;
355         case 0x14:
356                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1360;
357                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
358                 viaparinfo->lvds_setting_info->lcd_panel_id =
359                         LCD_PANEL_IDB_1360X768;
360                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
361                 viaparinfo->lvds_setting_info->LCDDithering = 0;
362                 break;
363         case 0x15:
364                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1280;
365                 viaparinfo->lvds_setting_info->lcd_panel_vres = 768;
366                 viaparinfo->lvds_setting_info->lcd_panel_id =
367                         LCD_PANEL_ID3_1280X768;
368                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 1;
369                 viaparinfo->lvds_setting_info->LCDDithering = 0;
370                 break;
371         case 0x16:
372                 viaparinfo->lvds_setting_info->lcd_panel_hres = 480;
373                 viaparinfo->lvds_setting_info->lcd_panel_vres = 640;
374                 viaparinfo->lvds_setting_info->lcd_panel_id =
375                         LCD_PANEL_IDC_480X640;
376                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
377                 viaparinfo->lvds_setting_info->LCDDithering = 1;
378                 break;
379         case 0x17:
380                 /* OLPC XO-1.5 panel */
381                 viaparinfo->lvds_setting_info->lcd_panel_hres = 1200;
382                 viaparinfo->lvds_setting_info->lcd_panel_vres = 900;
383                 viaparinfo->lvds_setting_info->lcd_panel_id =
384                         LCD_PANEL_IDD_1200X900;
385                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
386                 viaparinfo->lvds_setting_info->LCDDithering = 0;
387                 break;
388         default:
389                 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
390                 viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
391                 viaparinfo->lvds_setting_info->lcd_panel_id =
392                         LCD_PANEL_ID1_800X600;
393                 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
394                 viaparinfo->lvds_setting_info->LCDDithering = 1;
395         }
396 }
397
398 static int lvds_register_read(int index)
399 {
400         u8 data;
401
402         viafb_i2c_readbyte(VIA_PORT_2C,
403                         (u8) viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr,
404                         (u8) index, &data);
405         return data;
406 }
407
408 static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
409                       int panel_vres)
410 {
411         int reg_value = 0;
412         int viafb_load_reg_num;
413         struct io_register *reg = NULL;
414
415         DEBUG_MSG(KERN_INFO "load_lcd_scaling()!!\n");
416
417         /* LCD Scaling Enable */
418         viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2);
419
420         /* Check if expansion for horizontal */
421         if (set_hres < panel_hres) {
422                 /* Load Horizontal Scaling Factor */
423                 switch (viaparinfo->chip_info->gfx_chip_name) {
424                 case UNICHROME_CLE266:
425                 case UNICHROME_K400:
426                         reg_value =
427                             CLE266_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
428                         viafb_load_reg_num =
429                             lcd_scaling_factor_CLE.lcd_hor_scaling_factor.
430                             reg_num;
431                         reg = lcd_scaling_factor_CLE.lcd_hor_scaling_factor.reg;
432                         viafb_load_reg(reg_value,
433                                 viafb_load_reg_num, reg, VIACR);
434                         break;
435                 case UNICHROME_K800:
436                 case UNICHROME_PM800:
437                 case UNICHROME_CN700:
438                 case UNICHROME_CX700:
439                 case UNICHROME_K8M890:
440                 case UNICHROME_P4M890:
441                 case UNICHROME_P4M900:
442                 case UNICHROME_CN750:
443                 case UNICHROME_VX800:
444                 case UNICHROME_VX855:
445                         reg_value =
446                             K800_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
447                         /* Horizontal scaling enabled */
448                         viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6);
449                         viafb_load_reg_num =
450                             lcd_scaling_factor.lcd_hor_scaling_factor.reg_num;
451                         reg = lcd_scaling_factor.lcd_hor_scaling_factor.reg;
452                         viafb_load_reg(reg_value,
453                                 viafb_load_reg_num, reg, VIACR);
454                         break;
455                 }
456
457                 DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d", reg_value);
458         } else {
459                 /* Horizontal scaling disabled */
460                 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7);
461         }
462
463         /* Check if expansion for vertical */
464         if (set_vres < panel_vres) {
465                 /* Load Vertical Scaling Factor */
466                 switch (viaparinfo->chip_info->gfx_chip_name) {
467                 case UNICHROME_CLE266:
468                 case UNICHROME_K400:
469                         reg_value =
470                             CLE266_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
471                         viafb_load_reg_num =
472                             lcd_scaling_factor_CLE.lcd_ver_scaling_factor.
473                             reg_num;
474                         reg = lcd_scaling_factor_CLE.lcd_ver_scaling_factor.reg;
475                         viafb_load_reg(reg_value,
476                                 viafb_load_reg_num, reg, VIACR);
477                         break;
478                 case UNICHROME_K800:
479                 case UNICHROME_PM800:
480                 case UNICHROME_CN700:
481                 case UNICHROME_CX700:
482                 case UNICHROME_K8M890:
483                 case UNICHROME_P4M890:
484                 case UNICHROME_P4M900:
485                 case UNICHROME_CN750:
486                 case UNICHROME_VX800:
487                 case UNICHROME_VX855:
488                         reg_value =
489                             K800_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
490                         /* Vertical scaling enabled */
491                         viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3);
492                         viafb_load_reg_num =
493                             lcd_scaling_factor.lcd_ver_scaling_factor.reg_num;
494                         reg = lcd_scaling_factor.lcd_ver_scaling_factor.reg;
495                         viafb_load_reg(reg_value,
496                                 viafb_load_reg_num, reg, VIACR);
497                         break;
498                 }
499
500                 DEBUG_MSG(KERN_INFO "Vertical Scaling value = %d", reg_value);
501         } else {
502                 /* Vertical scaling disabled */
503                 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3);
504         }
505 }
506
507 static void via_pitch_alignment_patch_lcd(
508         struct lvds_setting_information *plvds_setting_info,
509                                    struct lvds_chip_information
510                                    *plvds_chip_info)
511 {
512         unsigned char cr13, cr35, cr65, cr66, cr67;
513         unsigned long dwScreenPitch = 0;
514         unsigned long dwPitch;
515
516         dwPitch = plvds_setting_info->h_active * (plvds_setting_info->bpp >> 3);
517         if (dwPitch & 0x1F) {
518                 dwScreenPitch = ((dwPitch + 31) & ~31) >> 3;
519                 if (plvds_setting_info->iga_path == IGA2) {
520                         if (plvds_setting_info->bpp > 8) {
521                                 cr66 = (unsigned char)(dwScreenPitch & 0xFF);
522                                 viafb_write_reg(CR66, VIACR, cr66);
523                                 cr67 = viafb_read_reg(VIACR, CR67) & 0xFC;
524                                 cr67 |=
525                                     (unsigned
526                                      char)((dwScreenPitch & 0x300) >> 8);
527                                 viafb_write_reg(CR67, VIACR, cr67);
528                         }
529
530                         /* Fetch Count */
531                         cr67 = viafb_read_reg(VIACR, CR67) & 0xF3;
532                         cr67 |= (unsigned char)((dwScreenPitch & 0x600) >> 7);
533                         viafb_write_reg(CR67, VIACR, cr67);
534                         cr65 = (unsigned char)((dwScreenPitch >> 1) & 0xFF);
535                         cr65 += 2;
536                         viafb_write_reg(CR65, VIACR, cr65);
537                 } else {
538                         if (plvds_setting_info->bpp > 8) {
539                                 cr13 = (unsigned char)(dwScreenPitch & 0xFF);
540                                 viafb_write_reg(CR13, VIACR, cr13);
541                                 cr35 = viafb_read_reg(VIACR, CR35) & 0x1F;
542                                 cr35 |=
543                                     (unsigned
544                                      char)((dwScreenPitch & 0x700) >> 3);
545                                 viafb_write_reg(CR35, VIACR, cr35);
546                         }
547                 }
548         }
549 }
550 static void lcd_patch_skew_dvp0(struct lvds_setting_information
551                          *plvds_setting_info,
552                          struct lvds_chip_information *plvds_chip_info)
553 {
554         if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) {
555                 switch (viaparinfo->chip_info->gfx_chip_name) {
556                 case UNICHROME_P4M900:
557                         viafb_vt1636_patch_skew_on_vt3364(plvds_setting_info,
558                                                     plvds_chip_info);
559                         break;
560                 case UNICHROME_P4M890:
561                         viafb_vt1636_patch_skew_on_vt3327(plvds_setting_info,
562                                                     plvds_chip_info);
563                         break;
564                 }
565         }
566 }
567 static void lcd_patch_skew_dvp1(struct lvds_setting_information
568                          *plvds_setting_info,
569                          struct lvds_chip_information *plvds_chip_info)
570 {
571         if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) {
572                 switch (viaparinfo->chip_info->gfx_chip_name) {
573                 case UNICHROME_CX700:
574                         viafb_vt1636_patch_skew_on_vt3324(plvds_setting_info,
575                                                     plvds_chip_info);
576                         break;
577                 }
578         }
579 }
580 static void lcd_patch_skew(struct lvds_setting_information
581         *plvds_setting_info, struct lvds_chip_information *plvds_chip_info)
582 {
583         DEBUG_MSG(KERN_INFO "lcd_patch_skew\n");
584         switch (plvds_chip_info->output_interface) {
585         case INTERFACE_DVP0:
586                 lcd_patch_skew_dvp0(plvds_setting_info, plvds_chip_info);
587                 break;
588         case INTERFACE_DVP1:
589                 lcd_patch_skew_dvp1(plvds_setting_info, plvds_chip_info);
590                 break;
591         case INTERFACE_DFP_LOW:
592                 if (UNICHROME_P4M900 == viaparinfo->chip_info->gfx_chip_name) {
593                         viafb_write_reg_mask(CR99, VIACR, 0x08,
594                                        BIT0 + BIT1 + BIT2 + BIT3);
595                 }
596                 break;
597         }
598 }
599
600 /* LCD Set Mode */
601 void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
602                   struct lvds_setting_information *plvds_setting_info,
603                   struct lvds_chip_information *plvds_chip_info)
604 {
605         int set_iga = plvds_setting_info->iga_path;
606         int mode_bpp = plvds_setting_info->bpp;
607         int set_hres = plvds_setting_info->h_active;
608         int set_vres = plvds_setting_info->v_active;
609         int panel_hres = plvds_setting_info->lcd_panel_hres;
610         int panel_vres = plvds_setting_info->lcd_panel_vres;
611         u32 pll_D_N;
612         struct display_timing mode_crt_reg, panel_crt_reg;
613         struct crt_mode_table *panel_crt_table = NULL;
614         struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres,
615                 panel_vres);
616
617         DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n");
618         /* Get mode table */
619         mode_crt_reg = mode_crt_table->crtc;
620         /* Get panel table Pointer */
621         panel_crt_table = vmode_tbl->crtc;
622         panel_crt_reg = panel_crt_table->crtc;
623         DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n");
624         if (VT1636_LVDS == plvds_chip_info->lvds_chip_name)
625                 viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info);
626         plvds_setting_info->vclk = panel_crt_table->clk;
627         if (set_iga == IGA1) {
628                 /* IGA1 doesn't have LCD scaling, so set it as centering. */
629                 viafb_load_crtc_timing(lcd_centering_timging
630                                  (mode_crt_reg, panel_crt_reg), IGA1);
631         } else {
632                 /* Expansion */
633                 if (plvds_setting_info->display_method == LCD_EXPANDSION
634                         && (set_hres < panel_hres || set_vres < panel_vres)) {
635                         /* expansion timing IGA2 loaded panel set timing*/
636                         viafb_load_crtc_timing(panel_crt_reg, IGA2);
637                         DEBUG_MSG(KERN_INFO "viafb_load_crtc_timing!!\n");
638                         load_lcd_scaling(set_hres, set_vres, panel_hres,
639                                          panel_vres);
640                         DEBUG_MSG(KERN_INFO "load_lcd_scaling!!\n");
641                 } else {        /* Centering */
642                         /* centering timing IGA2 always loaded panel
643                            and mode releative timing */
644                         viafb_load_crtc_timing(lcd_centering_timging
645                                          (mode_crt_reg, panel_crt_reg), IGA2);
646                         viafb_write_reg_mask(CR79, VIACR, 0x00,
647                                 BIT0 + BIT1 + BIT2);
648                         /* LCD scaling disabled */
649                 }
650         }
651
652         /* Fetch count for IGA2 only */
653         viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga);
654
655         if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
656                 && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400))
657                 viafb_load_FIFO_reg(set_iga, set_hres, set_vres);
658
659         fill_lcd_format();
660
661         pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk);
662         DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N);
663         viafb_set_vclock(pll_D_N, set_iga);
664
665         viafb_set_output_path(DEVICE_LCD, set_iga,
666                 plvds_chip_info->output_interface);
667         lcd_patch_skew(plvds_setting_info, plvds_chip_info);
668
669         /* If K8M800, enable LCD Prefetch Mode. */
670         if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800)
671             || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name))
672                 viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0);
673
674         /* Patch for non 32bit alignment mode */
675         via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info);
676 }
677
678 static void integrated_lvds_disable(struct lvds_setting_information
679                              *plvds_setting_info,
680                              struct lvds_chip_information *plvds_chip_info)
681 {
682         bool turn_off_first_powersequence = false;
683         bool turn_off_second_powersequence = false;
684         if (INTERFACE_LVDS0LVDS1 == plvds_chip_info->output_interface)
685                 turn_off_first_powersequence = true;
686         if (INTERFACE_LVDS0 == plvds_chip_info->output_interface)
687                 turn_off_first_powersequence = true;
688         if (INTERFACE_LVDS1 == plvds_chip_info->output_interface)
689                 turn_off_second_powersequence = true;
690         if (turn_off_second_powersequence) {
691                 /* Use second power sequence control: */
692
693                 /* Turn off power sequence. */
694                 viafb_write_reg_mask(CRD4, VIACR, 0, BIT1);
695
696                 /* Turn off back light. */
697                 viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7);
698         }
699         if (turn_off_first_powersequence) {
700                 /* Use first power sequence control: */
701
702                 /* Turn off power sequence. */
703                 viafb_write_reg_mask(CR6A, VIACR, 0, BIT3);
704
705                 /* Turn off back light. */
706                 viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7);
707         }
708
709         /* Turn DFP High/Low Pad off. */
710         viafb_write_reg_mask(SR2A, VIASR, 0, BIT0 + BIT1 + BIT2 + BIT3);
711
712         /* Power off LVDS channel. */
713         switch (plvds_chip_info->output_interface) {
714         case INTERFACE_LVDS0:
715                 {
716                         viafb_write_reg_mask(CRD2, VIACR, 0x80, BIT7);
717                         break;
718                 }
719
720         case INTERFACE_LVDS1:
721                 {
722                         viafb_write_reg_mask(CRD2, VIACR, 0x40, BIT6);
723                         break;
724                 }
725
726         case INTERFACE_LVDS0LVDS1:
727                 {
728                         viafb_write_reg_mask(CRD2, VIACR, 0xC0, BIT6 + BIT7);
729                         break;
730                 }
731         }
732 }
733
734 static void integrated_lvds_enable(struct lvds_setting_information
735                             *plvds_setting_info,
736                             struct lvds_chip_information *plvds_chip_info)
737 {
738         DEBUG_MSG(KERN_INFO "integrated_lvds_enable, out_interface:%d\n",
739                   plvds_chip_info->output_interface);
740         if (plvds_setting_info->lcd_mode == LCD_SPWG)
741                 viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT0 + BIT1);
742         else
743                 viafb_write_reg_mask(CRD2, VIACR, 0x03, BIT0 + BIT1);
744
745         switch (plvds_chip_info->output_interface) {
746         case INTERFACE_LVDS0LVDS1:
747         case INTERFACE_LVDS0:
748                 /* Use first power sequence control: */
749                 /* Use hardware control power sequence. */
750                 viafb_write_reg_mask(CR91, VIACR, 0, BIT0);
751                 /* Turn on back light. */
752                 viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7);
753                 /* Turn on hardware power sequence. */
754                 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
755                 break;
756         case INTERFACE_LVDS1:
757                 /* Use second power sequence control: */
758                 /* Use hardware control power sequence. */
759                 viafb_write_reg_mask(CRD3, VIACR, 0, BIT0);
760                 /* Turn on back light. */
761                 viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7);
762                 /* Turn on hardware power sequence. */
763                 viafb_write_reg_mask(CRD4, VIACR, 0x02, BIT1);
764                 break;
765         }
766
767         /* Turn DFP High/Low pad on. */
768         viafb_write_reg_mask(SR2A, VIASR, 0x0F, BIT0 + BIT1 + BIT2 + BIT3);
769
770         /* Power on LVDS channel. */
771         switch (plvds_chip_info->output_interface) {
772         case INTERFACE_LVDS0:
773                 {
774                         viafb_write_reg_mask(CRD2, VIACR, 0, BIT7);
775                         break;
776                 }
777
778         case INTERFACE_LVDS1:
779                 {
780                         viafb_write_reg_mask(CRD2, VIACR, 0, BIT6);
781                         break;
782                 }
783
784         case INTERFACE_LVDS0LVDS1:
785                 {
786                         viafb_write_reg_mask(CRD2, VIACR, 0, BIT6 + BIT7);
787                         break;
788                 }
789         }
790 }
791
792 void viafb_lcd_disable(void)
793 {
794
795         if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
796                 lcd_powersequence_off();
797                 /* DI1 pad off */
798                 viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30);
799         } else if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
800                 if (viafb_LCD2_ON
801                     && (INTEGRATED_LVDS ==
802                         viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name))
803                         integrated_lvds_disable(viaparinfo->lvds_setting_info,
804                                 &viaparinfo->chip_info->lvds_chip_info2);
805                 if (INTEGRATED_LVDS ==
806                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
807                         integrated_lvds_disable(viaparinfo->lvds_setting_info,
808                                 &viaparinfo->chip_info->lvds_chip_info);
809                 if (VT1636_LVDS == viaparinfo->chip_info->
810                         lvds_chip_info.lvds_chip_name)
811                         viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info,
812                                 &viaparinfo->chip_info->lvds_chip_info);
813         } else if (VT1636_LVDS ==
814         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
815                 viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info,
816                                     &viaparinfo->chip_info->lvds_chip_info);
817         } else {
818                 /* DFP-HL pad off          */
819                 viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0F);
820                 /* Backlight off           */
821                 viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20);
822                 /* 24 bit DI data paht off */
823                 viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80);
824                 /* Simultaneout disabled   */
825                 viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08);
826         }
827
828         /* Disable expansion bit   */
829         viafb_write_reg_mask(CR79, VIACR, 0x00, 0x01);
830         /* CRT path set to IGA1    */
831         viafb_write_reg_mask(SR16, VIASR, 0x00, 0x40);
832         /* Simultaneout disabled   */
833         viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08);
834         /* IGA2 path disabled      */
835         viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x80);
836
837 }
838
839 void viafb_lcd_enable(void)
840 {
841         if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
842                 /* DI1 pad on */
843                 viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
844                 lcd_powersequence_on();
845         } else if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) {
846                 if (viafb_LCD2_ON && (INTEGRATED_LVDS ==
847                         viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name))
848                         integrated_lvds_enable(viaparinfo->lvds_setting_info2, \
849                                 &viaparinfo->chip_info->lvds_chip_info2);
850                 if (INTEGRATED_LVDS ==
851                         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name)
852                         integrated_lvds_enable(viaparinfo->lvds_setting_info,
853                                 &viaparinfo->chip_info->lvds_chip_info);
854                 if (VT1636_LVDS == viaparinfo->chip_info->
855                         lvds_chip_info.lvds_chip_name)
856                         viafb_enable_lvds_vt1636(viaparinfo->
857                         lvds_setting_info, &viaparinfo->chip_info->
858                         lvds_chip_info);
859         } else if (VT1636_LVDS ==
860         viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) {
861                 viafb_enable_lvds_vt1636(viaparinfo->lvds_setting_info,
862                                    &viaparinfo->chip_info->lvds_chip_info);
863         } else {
864                 /* DFP-HL pad on           */
865                 viafb_write_reg_mask(SR2A, VIASR, 0x0F, 0x0F);
866                 /* Backlight on            */
867                 viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20);
868                 /* 24 bit DI data paht on  */
869                 viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80);
870
871                 /* Set data source selection bit by iga path */
872                 if (viaparinfo->lvds_setting_info->iga_path == IGA1) {
873                         /* DFP-H set to IGA1       */
874                         viafb_write_reg_mask(CR97, VIACR, 0x00, 0x10);
875                         /* DFP-L set to IGA1       */
876                         viafb_write_reg_mask(CR99, VIACR, 0x00, 0x10);
877                 } else {
878                         /* DFP-H set to IGA2       */
879                         viafb_write_reg_mask(CR97, VIACR, 0x10, 0x10);
880                         /* DFP-L set to IGA2       */
881                         viafb_write_reg_mask(CR99, VIACR, 0x10, 0x10);
882                 }
883                 /* LCD enabled             */
884                 viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48);
885         }
886
887         if (viaparinfo->lvds_setting_info->iga_path == IGA1) {
888                 /* CRT path set to IGA2    */
889                 viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40);
890                 /* IGA2 path disabled      */
891                 viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x80);
892                 /* IGA2 path enabled       */
893         } else {                /* IGA2 */
894                 viafb_write_reg_mask(CR6A, VIACR, 0x80, 0x80);
895         }
896
897 }
898
899 static void lcd_powersequence_off(void)
900 {
901         int i, mask, data;
902
903         /* Software control power sequence */
904         viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);
905
906         for (i = 0; i < 3; i++) {
907                 mask = PowerSequenceOff[0][i];
908                 data = PowerSequenceOff[1][i] & mask;
909                 viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);
910                 udelay(PowerSequenceOff[2][i]);
911         }
912
913         /* Disable LCD */
914         viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x08);
915 }
916
917 static void lcd_powersequence_on(void)
918 {
919         int i, mask, data;
920
921         /* Software control power sequence */
922         viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11);
923
924         /* Enable LCD */
925         viafb_write_reg_mask(CR6A, VIACR, 0x08, 0x08);
926
927         for (i = 0; i < 3; i++) {
928                 mask = PowerSequenceOn[0][i];
929                 data = PowerSequenceOn[1][i] & mask;
930                 viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask);
931                 udelay(PowerSequenceOn[2][i]);
932         }
933
934         udelay(1);
935 }
936
937 static void fill_lcd_format(void)
938 {
939         u8 bdithering = 0, bdual = 0;
940
941         if (viaparinfo->lvds_setting_info->device_lcd_dualedge)
942                 bdual = BIT4;
943         if (viaparinfo->lvds_setting_info->LCDDithering)
944                 bdithering = BIT0;
945         /* Dual & Dithering */
946         viafb_write_reg_mask(CR88, VIACR, (bdithering | bdual), BIT4 + BIT0);
947 }
948
949 static void check_diport_of_integrated_lvds(
950         struct lvds_chip_information *plvds_chip_info,
951                                      struct lvds_setting_information
952                                      *plvds_setting_info)
953 {
954         /* Determine LCD DI Port by hardware layout. */
955         switch (viafb_display_hardware_layout) {
956         case HW_LAYOUT_LCD_ONLY:
957                 {
958                         if (plvds_setting_info->device_lcd_dualedge) {
959                                 plvds_chip_info->output_interface =
960                                     INTERFACE_LVDS0LVDS1;
961                         } else {
962                                 plvds_chip_info->output_interface =
963                                     INTERFACE_LVDS0;
964                         }
965
966                         break;
967                 }
968
969         case HW_LAYOUT_DVI_ONLY:
970                 {
971                         plvds_chip_info->output_interface = INTERFACE_NONE;
972                         break;
973                 }
974
975         case HW_LAYOUT_LCD1_LCD2:
976         case HW_LAYOUT_LCD_EXTERNAL_LCD2:
977                 {
978                         plvds_chip_info->output_interface =
979                             INTERFACE_LVDS0LVDS1;
980                         break;
981                 }
982
983         case HW_LAYOUT_LCD_DVI:
984                 {
985                         plvds_chip_info->output_interface = INTERFACE_LVDS1;
986                         break;
987                 }
988
989         default:
990                 {
991                         plvds_chip_info->output_interface = INTERFACE_LVDS1;
992                         break;
993                 }
994         }
995
996         DEBUG_MSG(KERN_INFO
997                   "Display Hardware Layout: 0x%x, LCD DI Port: 0x%x\n",
998                   viafb_display_hardware_layout,
999                   plvds_chip_info->output_interface);
1000 }
1001
1002 void viafb_init_lvds_output_interface(struct lvds_chip_information
1003                                 *plvds_chip_info,
1004                                 struct lvds_setting_information
1005                                 *plvds_setting_info)
1006 {
1007         if (INTERFACE_NONE != plvds_chip_info->output_interface) {
1008                 /*Do nothing, lcd port is specified by module parameter */
1009                 return;
1010         }
1011
1012         switch (plvds_chip_info->lvds_chip_name) {
1013
1014         case VT1636_LVDS:
1015                 switch (viaparinfo->chip_info->gfx_chip_name) {
1016                 case UNICHROME_CX700:
1017                         plvds_chip_info->output_interface = INTERFACE_DVP1;
1018                         break;
1019                 case UNICHROME_CN700:
1020                         plvds_chip_info->output_interface = INTERFACE_DFP_LOW;
1021                         break;
1022                 default:
1023                         plvds_chip_info->output_interface = INTERFACE_DVP0;
1024                         break;
1025                 }
1026                 break;
1027
1028         case INTEGRATED_LVDS:
1029                 check_diport_of_integrated_lvds(plvds_chip_info,
1030                                                 plvds_setting_info);
1031                 break;
1032
1033         default:
1034                 switch (viaparinfo->chip_info->gfx_chip_name) {
1035                 case UNICHROME_K8M890:
1036                 case UNICHROME_P4M900:
1037                 case UNICHROME_P4M890:
1038                         plvds_chip_info->output_interface = INTERFACE_DFP_LOW;
1039                         break;
1040                 default:
1041                         plvds_chip_info->output_interface = INTERFACE_DFP;
1042                         break;
1043                 }
1044                 break;
1045         }
1046 }
1047
1048 static struct display_timing lcd_centering_timging(struct display_timing
1049                                             mode_crt_reg,
1050                                             struct display_timing panel_crt_reg)
1051 {
1052         struct display_timing crt_reg;
1053
1054         crt_reg.hor_total = panel_crt_reg.hor_total;
1055         crt_reg.hor_addr = mode_crt_reg.hor_addr;
1056         crt_reg.hor_blank_start =
1057             (panel_crt_reg.hor_addr - mode_crt_reg.hor_addr) / 2 +
1058             crt_reg.hor_addr;
1059         crt_reg.hor_blank_end = panel_crt_reg.hor_blank_end;
1060         crt_reg.hor_sync_start =
1061             (panel_crt_reg.hor_sync_start -
1062              panel_crt_reg.hor_blank_start) + crt_reg.hor_blank_start;
1063         crt_reg.hor_sync_end = panel_crt_reg.hor_sync_end;
1064
1065         crt_reg.ver_total = panel_crt_reg.ver_total;
1066         crt_reg.ver_addr = mode_crt_reg.ver_addr;
1067         crt_reg.ver_blank_start =
1068             (panel_crt_reg.ver_addr - mode_crt_reg.ver_addr) / 2 +
1069             crt_reg.ver_addr;
1070         crt_reg.ver_blank_end = panel_crt_reg.ver_blank_end;
1071         crt_reg.ver_sync_start =
1072             (panel_crt_reg.ver_sync_start -
1073              panel_crt_reg.ver_blank_start) + crt_reg.ver_blank_start;
1074         crt_reg.ver_sync_end = panel_crt_reg.ver_sync_end;
1075
1076         return crt_reg;
1077 }
1078
1079 bool viafb_lcd_get_mobile_state(bool *mobile)
1080 {
1081         unsigned char *romptr, *tableptr;
1082         u8 core_base;
1083         unsigned char *biosptr;
1084         /* Rom address */
1085         u32 romaddr = 0x000C0000;
1086         u16 start_pattern = 0;
1087
1088         biosptr = ioremap(romaddr, 0x10000);
1089
1090         memcpy(&start_pattern, biosptr, 2);
1091         /* Compare pattern */
1092         if (start_pattern == 0xAA55) {
1093                 /* Get the start of Table */
1094                 /* 0x1B means BIOS offset position */
1095                 romptr = biosptr + 0x1B;
1096                 tableptr = biosptr + *((u16 *) romptr);
1097
1098                 /* Get the start of biosver structure */
1099                 /* 18 means BIOS version position. */
1100                 romptr = tableptr + 18;
1101                 romptr = biosptr + *((u16 *) romptr);
1102
1103                 /* The offset should be 44, but the
1104                    actual image is less three char. */
1105                 /* pRom += 44; */
1106                 romptr += 41;
1107
1108                 core_base = *romptr++;
1109
1110                 if (core_base & 0x8)
1111                         *mobile = false;
1112                 else
1113                         *mobile = true;
1114                 /* release memory */
1115                 iounmap(biosptr);
1116
1117                 return true;
1118         } else {
1119                 iounmap(biosptr);
1120                 return false;
1121         }
1122 }