Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[~shefty/rdma-dev.git] / arch / arm / mach-exynos / common.c

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index b6ac6ee658c068fb8ee28f64894bff7421d87a51..647c8434610c724820f86b387d4b5afe8753d293 100644 (file)
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -19,6 +19,7 @@
 #include <linux/serial_core.h>
 
 #include <asm/proc-fns.h>
 #include <linux/serial_core.h>
 
 #include <asm/proc-fns.h>

+#include <asm/exception.h>

 #include <asm/hardware/cache-l2x0.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach/map.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach/map.h>


@@ -43,8 +44,6 @@
 
 #include "common.h"
 
 
 #include "common.h"
 

-unsigned int gic_bank_offset __read_mostly;
-

 static const char name_exynos4210[] = "EXYNOS4210";
 static const char name_exynos4212[] = "EXYNOS4212";
 static const char name_exynos4412[] = "EXYNOS4412";
 static const char name_exynos4210[] = "EXYNOS4210";
 static const char name_exynos4212[] = "EXYNOS4212";
 static const char name_exynos4412[] = "EXYNOS4412";


@@ -386,27 +385,14 @@ static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
        }
 }
 
        }
 }
 

-static void exynos4_gic_irq_fix_base(struct irq_data *d)
-{
-       struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
-
-       gic_data->cpu_base = S5P_VA_GIC_CPU +
-                           (gic_bank_offset * smp_processor_id());
-
-       gic_data->dist_base = S5P_VA_GIC_DIST +
-                           (gic_bank_offset * smp_processor_id());
-}
-

 void __init exynos4_init_irq(void)
 {
        int irq;
 void __init exynos4_init_irq(void)
 {
        int irq;

+       unsigned int gic_bank_offset;

 
        gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
 
 
        gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
 

-       gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
-       gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
-       gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
-       gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
+       gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);

 
        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
 
 
        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {