Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[~shefty/rdma-dev.git] / arch / arm / mach-exynos / mach-exynos5-dt.c
index 929de766d4906cdb8856da45baf47301528fb3ae..f038c8cadca484e1831cd3277394bd8565ab88c1 100644 (file)
 #include <linux/of_fdt.h>
 #include <linux/serial_core.h>
 #include <linux/memblock.h>
-#include <linux/of_fdt.h>
+#include <linux/io.h>
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
 #include <mach/map.h>
+#include <mach/regs-pmu.h>
 
 #include <plat/cpu.h>
 #include <plat/regs-serial.h>
@@ -124,6 +125,28 @@ static void __init exynos5_dt_map_io(void)
 
 static void __init exynos5_dt_machine_init(void)
 {
+       struct device_node *i2c_np;
+       const char *i2c_compat = "samsung,s3c2440-i2c";
+       unsigned int tmp;
+
+       /*
+        * Exynos5's legacy i2c controller and new high speed i2c
+        * controller have muxed interrupt sources. By default the
+        * interrupts for 4-channel HS-I2C controller are enabled.
+        * If node for first four channels of legacy i2c controller
+        * are available then re-configure the interrupts via the
+        * system register.
+        */
+       for_each_compatible_node(i2c_np, NULL, i2c_compat) {
+               if (of_device_is_available(i2c_np)) {
+                       if (of_alias_get_id(i2c_np, "i2c") < 4) {
+                               tmp = readl(EXYNOS5_SYS_I2C_CFG);
+                               writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
+                                               EXYNOS5_SYS_I2C_CFG);
+                       }
+               }
+       }
+
        if (of_machine_is_compatible("samsung,exynos5250"))
                of_platform_populate(NULL, of_default_bus_match_table,
                                     exynos5250_auxdata_lookup, NULL);