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Merge branch 'for-upstream' of git://openrisc.net/jonas/linux
[~shefty/rdma-dev.git]
/
arch
/
openrisc
/
kernel
/
entry.S
diff --git
a/arch/openrisc/kernel/entry.S
b/arch/openrisc/kernel/entry.S
index
54afd0a
..
d8a455e
100644
(file)
--- a/
arch/openrisc/kernel/entry.S
+++ b/
arch/openrisc/kernel/entry.S
@@
-201,12
+201,17
@@
EXCEPTION_ENTRY(_bus_fault_handler)
l.nop
/* ---[ 0x300: Data Page Fault exception ]------------------------------- */
l.nop
/* ---[ 0x300: Data Page Fault exception ]------------------------------- */
+EXCEPTION_ENTRY(_dtlb_miss_page_fault_handler)
+ l.and r5,r5,r0
+ l.j 1f
+ l.nop
EXCEPTION_ENTRY(_data_page_fault_handler)
/* set up parameters for do_page_fault */
EXCEPTION_ENTRY(_data_page_fault_handler)
/* set up parameters for do_page_fault */
+ l.ori r5,r0,0x300 // exception vector
+1:
l.addi r3,r1,0 // pt_regs
/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
l.addi r3,r1,0 // pt_regs
/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
- l.ori r5,r0,0x300 // exception vector
/*
* __PHX__: TODO
/*
* __PHX__: TODO
@@
-276,12
+281,17
@@
EXCEPTION_ENTRY(_data_page_fault_handler)
l.nop
/* ---[ 0x400: Insn Page Fault exception ]------------------------------- */
l.nop
/* ---[ 0x400: Insn Page Fault exception ]------------------------------- */
+EXCEPTION_ENTRY(_itlb_miss_page_fault_handler)
+ l.and r5,r5,r0
+ l.j 1f
+ l.nop
EXCEPTION_ENTRY(_insn_page_fault_handler)
/* set up parameters for do_page_fault */
EXCEPTION_ENTRY(_insn_page_fault_handler)
/* set up parameters for do_page_fault */
+ l.ori r5,r0,0x400 // exception vector
+1:
l.addi r3,r1,0 // pt_regs
/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
l.addi r3,r1,0 // pt_regs
/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
- l.ori r5,r0,0x400 // exception vector
l.ori r6,r0,0x0 // !write access
/* call fault.c handler in or32/mm/fault.c */
l.ori r6,r0,0x0 // !write access
/* call fault.c handler in or32/mm/fault.c */
@@
-1040,7
+1050,7
@@
ENTRY(_switch)
* we are expected to have set up the arg to schedule_tail already,
* hence we do so here unconditionally:
*/
* we are expected to have set up the arg to schedule_tail already,
* hence we do so here unconditionally:
*/
- l.lwz r3,TI_
STACK(r3)
/* Load 'prev' as schedule_tail arg */
+ l.lwz r3,TI_
TASK(r3)
/* Load 'prev' as schedule_tail arg */
l.jr r9
l.nop
l.jr r9
l.nop