Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
authorLinus Torvalds <torvalds@linux-foundation.org>
Sat, 30 Oct 2010 15:26:25 +0000 (08:26 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Sat, 30 Oct 2010 15:26:25 +0000 (08:26 -0700)
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)
  ARM: memblock: setup lowmem mappings using memblock
  ARM: memblock: move meminfo into find_limits directly
  ARM: memblock: convert free_highpages() to use memblock
  ARM: move freeing of highmem pages out of mem_init()
  ARM: memblock: convert memory detail printing to use memblock
  ARM: memblock: use memblock to free memory into arm_bootmem_init()
  ARM: memblock: use memblock when initializing memory allocators
  ARM: ensure membank array is always sorted
  ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
  ARM: 6464/2: fix spinlock recursion in adjust_pte()
  ARM: fix memblock breakage
  ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type
  ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt
  ARM: 6449/1: Fix for compiler warning of uninitialized variable.
  ARM: 6445/1: fixup TCM memory types
  ARM: imx: Add wake functionality to GPIO
  ARM: mx5: Add gpio-keys to mx51 babbage board
  ARM: imx: Add gpio-keys to plat-mxc
  mx31_3ds: Fix spi registration
  mx31_3ds: Fix the logic for detecting the debug board
  ...

1  2 
arch/arm/Kconfig
arch/arm/mach-s3c64xx/Kconfig
arch/arm/mach-shmobile/board-ap4evb.c
arch/arm/plat-s3c24xx/gpiolib.c
arch/sh/boards/mach-ap325rxa/setup.c
arch/sh/boards/mach-ecovec24/setup.c
arch/sh/boards/mach-kfr2r09/setup.c
arch/sh/boards/mach-migor/setup.c
arch/sh/boards/mach-se/7724/setup.c

diff --combined arch/arm/Kconfig
index b527bf5701c9126e4bca98abb56dc8b3ac0bea74,c0d6bdae263a1984be3e8f5797f74fd472ace346..a19a5266d5fc989327d2f5e82b8068e13462a5b8
@@@ -1,3 -1,10 +1,3 @@@
 -#
 -# For a description of the syntax of this configuration file,
 -# see Documentation/kbuild/kconfig-language.txt.
 -#
 -
 -mainmenu "Linux Kernel Configuration"
 -
  config ARM
        bool
        default y
@@@ -720,9 -727,11 +720,11 @@@ config ARCH_S5PC10
  config ARCH_S5PV210
        bool "Samsung S5PV210/S5PC110"
        select CPU_V7
+       select ARCH_SPARSEMEM_ENABLE
        select GENERIC_GPIO
        select HAVE_CLK
        select ARM_L1_CACHE_SHIFT_6
+       select ARCH_HAS_CPUFREQ
        select ARCH_USES_GETTIMEOFFSET
        select HAVE_S3C2410_I2C
        select HAVE_S3C_RTC
  config ARCH_S5PV310
        bool "Samsung S5PV310/S5PC210"
        select CPU_V7
+       select ARCH_SPARSEMEM_ENABLE
        select GENERIC_GPIO
        select HAVE_CLK
        select GENERIC_CLOCKEVENTS
+       select HAVE_S3C_RTC
+       select HAVE_S3C2410_I2C
+       select HAVE_S3C2410_WATCHDOG
        help
          Samsung S5PV310 series based systems
  
@@@ -1662,6 -1675,12 +1668,12 @@@ if ARCH_HAS_CPUFRE
  
  source "drivers/cpufreq/Kconfig"
  
+ config CPU_FREQ_IMX
+       tristate "CPUfreq driver for i.MX CPUs"
+       depends on ARCH_MXC && CPU_FREQ
+       help
+         This enables the CPUfreq driver for i.MX CPUs.
  config CPU_FREQ_SA1100
        bool
  
index 546db5cb8929e11c4cdec689bc4b8700ad44562b,fe1fd3007ae44fab51ca8cf6b3960ad364d67efb..1ca7bdc6485c44aaffd773a97f524f3a8131c972
@@@ -98,12 -98,33 +98,33 @@@ config MACH_ANW641
        help
          Machine support for the A&W6410
  
+ config MACH_MINI6410
+       bool "MINI6410"
+       select CPU_S3C6410
+       select S3C_DEV_HSMMC
+       select S3C_DEV_HSMMC1
+       select S3C64XX_SETUP_SDHCI
+       select S3C_DEV_USB_HOST
+       select S3C_DEV_NAND
+       select S3C_DEV_FB
+       select S3C64XX_SETUP_FB_24BPP
+       select SAMSUNG_DEV_ADC
+       select SAMSUNG_DEV_TS
+       help
+         Machine support for the FriendlyARM MINI6410
  config MACH_REAL6410
        bool "REAL6410"
        select CPU_S3C6410
        select S3C_DEV_HSMMC
        select S3C_DEV_HSMMC1
        select S3C64XX_SETUP_SDHCI
+       select S3C_DEV_FB
+       select S3C64XX_SETUP_FB_24BPP
+       select S3C_DEV_NAND
+       select SAMSUNG_DEV_ADC
+       select SAMSUNG_DEV_TS
+       select S3C_DEV_USB_HOST
        help
          Machine support for the CoreWind REAL6410
  
@@@ -185,7 -206,6 +206,7 @@@ config SMDK6410_WM1192_EV
        select REGULATOR_WM831X
        select S3C24XX_GPIO_EXTRA64
        select MFD_WM831X
 +      select MFD_WM831X_I2C
        help
          The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
          daughtercard for the Samsung SMDK6410 reference platform.
index 22a2b44ddb7bf14218d70db85ea732938fa09d54,f5d55efda386cd19ca3c4c315ae1725f1dc2a6d6..46ca4d4abf910aad98652306a7d41bfa7ccdcfe8
@@@ -30,7 -30,6 +30,6 @@@
  #include <linux/mtd/mtd.h>
  #include <linux/mtd/partitions.h>
  #include <linux/mtd/physmap.h>
- #include <linux/mmc/host.h>
  #include <linux/mmc/sh_mmcif.h>
  #include <linux/i2c.h>
  #include <linux/i2c/tsc2007.h>
  #include <linux/input/sh_keysc.h>
  #include <linux/usb/r8a66597.h>
  
+ #include <media/sh_mobile_ceu.h>
+ #include <media/sh_mobile_csi2.h>
+ #include <media/soc_camera.h>
  #include <sound/sh_fsi.h>
  
  #include <video/sh_mobile_hdmi.h>
@@@ -235,22 -238,10 +238,22 @@@ static struct platform_device smc911x_d
        },
  };
  
 +/*
 + * The card detect pin of the top SD/MMC slot (CN7) is active low and is
 + * connected to GPIO A22 of SH7372 (GPIO_PORT41).
 + */
 +static int slot_cn7_get_cd(struct platform_device *pdev)
 +{
 +      if (gpio_is_valid(GPIO_PORT41))
 +              return !gpio_get_value(GPIO_PORT41);
 +      else
 +              return -ENXIO;
 +}
 +
  /* SH_MMCIF */
  static struct resource sh_mmcif_resources[] = {
        [0] = {
-               .name   = "SH_MMCIF",
+               .name   = "MMCIF",
                .start  = 0xE6BD0000,
                .end    = 0xE6BD00FF,
                .flags  = IORESOURCE_MEM,
@@@ -273,7 -264,6 +276,7 @@@ static struct sh_mmcif_plat_data sh_mmc
        .caps           = MMC_CAP_4_BIT_DATA |
                          MMC_CAP_8_BIT_DATA |
                          MMC_CAP_NEEDS_POLL,
 +      .get_cd         = slot_cn7_get_cd,
  };
  
  static struct platform_device sh_mmcif_device = {
@@@ -323,8 -313,6 +326,8 @@@ static struct sh_mobile_sdhi_info sdhi1
        .dma_slave_rx   = SHDMA_SLAVE_SDHI1_RX,
        .tmio_ocr_mask  = MMC_VDD_165_195,
        .tmio_flags     = TMIO_MMC_WRPROTECT_DISABLE,
 +      .tmio_caps      = MMC_CAP_NEEDS_POLL,
 +      .get_cd         = slot_cn7_get_cd,
  };
  
  static struct resource sdhi1_resources[] = {
@@@ -390,10 -378,40 +393,40 @@@ static struct platform_device usb1_host
        .resource       = usb1_host_resources,
  };
  
+ const static struct fb_videomode ap4evb_lcdc_modes[] = {
+       {
+ #ifdef CONFIG_AP4EVB_QHD
+               .name           = "R63302(QHD)",
+               .xres           = 544,
+               .yres           = 961,
+               .left_margin    = 72,
+               .right_margin   = 600,
+               .hsync_len      = 16,
+               .upper_margin   = 8,
+               .lower_margin   = 8,
+               .vsync_len      = 2,
+               .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+ #else
+               .name           = "WVGA Panel",
+               .xres           = 800,
+               .yres           = 480,
+               .left_margin    = 220,
+               .right_margin   = 110,
+               .hsync_len      = 70,
+               .upper_margin   = 20,
+               .lower_margin   = 5,
+               .vsync_len      = 5,
+               .sync           = 0,
+ #endif
+       },
+ };
  static struct sh_mobile_lcdc_info lcdc_info = {
        .ch[0] = {
                .chan = LCDC_CHAN_MAINLCD,
                .bpp = 16,
+               .lcd_cfg = ap4evb_lcdc_modes,
+               .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
        }
  };
  
@@@ -532,27 -550,6 +565,6 @@@ static struct platform_device *qhd_devi
  
  /* FSI */
  #define IRQ_FSI               evt2irq(0x1840)
- #define FSIACKCR      0xE6150018
- static void fsiackcr_init(struct clk *clk)
- {
-       u32 status = __raw_readl(clk->enable_reg);
-       /* use external clock */
-       status &= ~0x000000ff;
-       status |= 0x00000080;
-       __raw_writel(status, clk->enable_reg);
- }
- static struct clk_ops fsiackcr_clk_ops = {
-       .init = fsiackcr_init,
- };
- static struct clk fsiackcr_clk = {
-       .ops            = &fsiackcr_clk_ops,
-       .enable_reg     = (void __iomem *)FSIACKCR,
-       .rate           = 0, /* unknown */
- };
  static struct sh_fsi_platform_info fsi_info = {
        .porta_flags = SH_FSI_BRS_INV |
                       SH_FSI_OUT_SLAVE_MODE |
@@@ -592,26 -589,6 +604,6 @@@ static struct sh_mobile_lcdc_info sh_mo
                .interface_type = RGB24,
                .clock_divider = 1,
                .flags = LCDC_FLAGS_DWPOL,
-               .lcd_cfg = {
-                       .name = "HDMI",
-                       /* So far only 720p is supported */
-                       .xres = 1280,
-                       .yres = 720,
-                       /*
-                        * If left and right margins are not multiples of 8,
-                        * LDHAJR will be adjusted accordingly by the LCDC
-                        * driver. Until we start using EDID, these values
-                        * might have to be adjusted for different monitors.
-                        */
-                       .left_margin = 200,
-                       .right_margin = 88,
-                       .hsync_len = 48,
-                       .upper_margin = 20,
-                       .lower_margin = 5,
-                       .vsync_len = 5,
-                       .pixclock = 13468,
-                       .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
-               },
        }
  };
  
@@@ -623,7 -600,7 +615,7 @@@ static struct resource lcdc1_resources[
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = intcs_evt2irq(0x17a0),
+               .start  = intcs_evt2irq(0x1780),
                .flags  = IORESOURCE_IRQ,
        },
  };
@@@ -704,6 -681,95 +696,95 @@@ static struct platform_device leds_devi
        },
  };
  
+ static struct i2c_board_info imx074_info = {
+       I2C_BOARD_INFO("imx074", 0x1a),
+ };
+ struct soc_camera_link imx074_link = {
+       .bus_id         = 0,
+       .board_info     = &imx074_info,
+       .i2c_adapter_id = 0,
+       .module_name    = "imx074",
+ };
+ static struct platform_device ap4evb_camera = {
+       .name   = "soc-camera-pdrv",
+       .id     = 0,
+       .dev    = {
+               .platform_data = &imx074_link,
+       },
+ };
+ static struct sh_csi2_client_config csi2_clients[] = {
+       {
+               .phy            = SH_CSI2_PHY_MAIN,
+               .lanes          = 3,
+               .channel        = 0,
+               .pdev           = &ap4evb_camera,
+       },
+ };
+ static struct sh_csi2_pdata csi2_info = {
+       .type           = SH_CSI2C,
+       .clients        = csi2_clients,
+       .num_clients    = ARRAY_SIZE(csi2_clients),
+       .flags          = SH_CSI2_ECC | SH_CSI2_CRC,
+ };
+ static struct resource csi2_resources[] = {
+       [0] = {
+               .name   = "CSI2",
+               .start  = 0xffc90000,
+               .end    = 0xffc90fff,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = intcs_evt2irq(0x17a0),
+               .flags  = IORESOURCE_IRQ,
+       },
+ };
+ static struct platform_device csi2_device = {
+       .name   = "sh-mobile-csi2",
+       .id     = 0,
+       .num_resources  = ARRAY_SIZE(csi2_resources),
+       .resource       = csi2_resources,
+       .dev    = {
+               .platform_data = &csi2_info,
+       },
+ };
+ static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
+       .flags = SH_CEU_FLAG_USE_8BIT_BUS,
+       .csi2_dev = &csi2_device.dev,
+ };
+ static struct resource ceu_resources[] = {
+       [0] = {
+               .name   = "CEU",
+               .start  = 0xfe910000,
+               .end    = 0xfe91009f,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = intcs_evt2irq(0x880),
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               /* place holder for contiguous memory */
+       },
+ };
+ static struct platform_device ceu_device = {
+       .name           = "sh_mobile_ceu",
+       .id             = 0, /* "ceu0" clock */
+       .num_resources  = ARRAY_SIZE(ceu_resources),
+       .resource       = ceu_resources,
+       .dev    = {
+               .platform_data  = &sh_mobile_ceu_info,
+       },
+ };
  static struct platform_device *ap4evb_devices[] __initdata = {
        &leds_device,
        &nor_flash_device,
        &lcdc1_device,
        &lcdc_device,
        &hdmi_device,
+       &csi2_device,
+       &ceu_device,
+       &ap4evb_camera,
  };
  
  static int __init hdmi_init_pm_clock(void)
                goto out;
        }
  
-       ret = clk_set_parent(&pllc2_clk, &dv_clki_div2_clk);
+       ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
        if (ret < 0) {
-               pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, pllc2_clk.usecount);
+               pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
                goto out;
        }
  
-       pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&pllc2_clk));
+       pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  
-       rate = clk_round_rate(&pllc2_clk, 594000000);
+       rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
        if (rate < 0) {
                pr_err("Cannot get suitable rate: %ld\n", rate);
                ret = rate;
                goto out;
        }
  
-       ret = clk_set_rate(&pllc2_clk, rate);
+       ret = clk_set_rate(&sh7372_pllc2_clk, rate);
        if (ret < 0) {
                pr_err("Cannot set rate %ld: %d\n", rate, ret);
                goto out;
  
        pr_debug("PLLC2 set frequency %lu\n", rate);
  
-       ret = clk_set_parent(hdmi_ick, &pllc2_clk);
+       ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
        if (ret < 0) {
                pr_err("Cannot set HDMI parent: %d\n", ret);
                goto out;
@@@ -767,11 -836,51 +851,51 @@@ out
  
  device_initcall(hdmi_init_pm_clock);
  
+ #define FSIACK_DUMMY_RATE 48000
+ static int __init fsi_init_pm_clock(void)
+ {
+       struct clk *fsia_ick;
+       int ret;
+       /*
+        * FSIACK is connected to AK4642,
+        * and the rate is depend on playing sound rate.
+        * So, set dummy rate (= 48k) here
+        */
+       ret = clk_set_rate(&sh7372_fsiack_clk, FSIACK_DUMMY_RATE);
+       if (ret < 0) {
+               pr_err("Cannot set FSIACK dummy rate: %d\n", ret);
+               return ret;
+       }
+       fsia_ick = clk_get(&fsi_device.dev, "icka");
+       if (IS_ERR(fsia_ick)) {
+               ret = PTR_ERR(fsia_ick);
+               pr_err("Cannot get FSI ICK: %d\n", ret);
+               return ret;
+       }
+       ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
+       if (ret < 0) {
+               pr_err("Cannot set FSI-A parent: %d\n", ret);
+               goto out;
+       }
+       ret = clk_set_rate(fsia_ick, FSIACK_DUMMY_RATE);
+       if (ret < 0)
+               pr_err("Cannot set FSI-A rate: %d\n", ret);
+ out:
+       clk_put(fsia_ick);
+       return ret;
+ }
+ device_initcall(fsi_init_pm_clock);
  /*
   * FIXME !!
   *
   * gpio_no_direction
-  * gpio_pull_up
   * are quick_hack.
   *
   * current gpio frame work doesn't have
@@@ -783,49 -892,37 +907,37 @@@ static void __init gpio_no_direction(u3
        __raw_writeb(0x00, addr);
  }
  
- static void __init gpio_pull_up(u32 addr)
- {
-       u8 data = __raw_readb(addr);
-       data &= 0x0F;
-       data |= 0xC0;
-       __raw_writeb(data, addr);
- }
  /* TouchScreen */
+ #ifdef CONFIG_AP4EVB_QHD
+ # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
+ # define GPIO_TSC_PORT        GPIO_PORT123
+ #else /* WVGA */
+ # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
+ # define GPIO_TSC_PORT        GPIO_PORT40
+ #endif
  #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  #define IRQ7  evt2irq(0x02e0) /* IRQ7A */
  static int ts_get_pendown_state(void)
  {
-       int val1, val2;
+       int val;
  
-       gpio_free(GPIO_FN_IRQ28_123);
-       gpio_free(GPIO_FN_IRQ7_40);
+       gpio_free(GPIO_TSC_IRQ);
  
-       gpio_request(GPIO_PORT123, NULL);
-       gpio_request(GPIO_PORT40, NULL);
+       gpio_request(GPIO_TSC_PORT, NULL);
  
-       gpio_direction_input(GPIO_PORT123);
-       gpio_direction_input(GPIO_PORT40);
+       gpio_direction_input(GPIO_TSC_PORT);
  
-       val1 = gpio_get_value(GPIO_PORT123);
-       val2 = gpio_get_value(GPIO_PORT40);
+       val = gpio_get_value(GPIO_TSC_PORT);
  
-       gpio_request(GPIO_FN_IRQ28_123, NULL);  /* for QHD */
-       gpio_request(GPIO_FN_IRQ7_40, NULL);    /* for WVGA */
+       gpio_request(GPIO_TSC_IRQ, NULL);
  
-       return val1 ^ val2;
+       return !val;
  }
  
- #define PORT40CR      0xE6051028
- #define PORT123CR     0xE605007B
  static int ts_init(void)
  {
-       gpio_request(GPIO_FN_IRQ28_123, NULL);  /* for QHD */
-       gpio_request(GPIO_FN_IRQ7_40, NULL);    /* for WVGA */
-       gpio_pull_up(PORT40CR);
-       gpio_pull_up(PORT123CR);
+       gpio_request(GPIO_TSC_IRQ, NULL);
  
        return 0;
  }
@@@ -963,10 -1060,6 +1075,10 @@@ static void __init ap4evb_init(void
        gpio_no_direction(GPIO_PORT9CR);  /* FSIAOBT needs no direction */
        gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  
 +      /* card detect pin for MMC slot (CN7) */
 +      gpio_request(GPIO_PORT41, NULL);
 +      gpio_direction_input(GPIO_PORT41);
 +
        /* set SPU2 clock to 119.6 MHz */
        clk = clk_get(NULL, "spu_clk");
        if (!IS_ERR(clk)) {
                clk_put(clk);
        }
  
-       /* change parent of FSI A */
-       clk = clk_get(NULL, "fsia_clk");
-       if (!IS_ERR(clk)) {
-               clk_register(&fsiackcr_clk);
-               clk_set_parent(clk, &fsiackcr_clk);
-               clk_put(clk);
-       }
        /*
         * set irq priority, to avoid sound chopping
         * when NFS rootfs is used
                                ARRAY_SIZE(i2c1_devices));
  
  #ifdef CONFIG_AP4EVB_QHD
        /*
-        * QHD
+        * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
+        * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
         */
  
        /* enable KEYSC */
        lcdc_info.ch[0].interface_type          = RGB24;
        lcdc_info.ch[0].clock_divider           = 1;
        lcdc_info.ch[0].flags                   = LCDC_FLAGS_DWPOL;
-       lcdc_info.ch[0].lcd_cfg.name            = "R63302(QHD)";
-       lcdc_info.ch[0].lcd_cfg.xres            = 544;
-       lcdc_info.ch[0].lcd_cfg.yres            = 961;
-       lcdc_info.ch[0].lcd_cfg.left_margin     = 72;
-       lcdc_info.ch[0].lcd_cfg.right_margin    = 600;
-       lcdc_info.ch[0].lcd_cfg.hsync_len       = 16;
-       lcdc_info.ch[0].lcd_cfg.upper_margin    = 8;
-       lcdc_info.ch[0].lcd_cfg.lower_margin    = 8;
-       lcdc_info.ch[0].lcd_cfg.vsync_len       = 2;
-       lcdc_info.ch[0].lcd_cfg.sync            = FB_SYNC_VERT_HIGH_ACT |
-                                                 FB_SYNC_HOR_HIGH_ACT;
        lcdc_info.ch[0].lcd_size_cfg.width      = 44;
        lcdc_info.ch[0].lcd_size_cfg.height     = 79;
  
  
  #else
        /*
-        * WVGA
+        * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
+        * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
         */
        gpio_request(GPIO_FN_LCDD17,   NULL);
        gpio_request(GPIO_FN_LCDD16,   NULL);
        gpio_request(GPIO_FN_LCDD15,   NULL);
        lcdc_info.ch[0].interface_type          = RGB18;
        lcdc_info.ch[0].clock_divider           = 2;
        lcdc_info.ch[0].flags                   = 0;
-       lcdc_info.ch[0].lcd_cfg.name            = "WVGA Panel";
-       lcdc_info.ch[0].lcd_cfg.xres            = 800;
-       lcdc_info.ch[0].lcd_cfg.yres            = 480;
-       lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
-       lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
-       lcdc_info.ch[0].lcd_cfg.hsync_len       = 70;
-       lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
-       lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
-       lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
-       lcdc_info.ch[0].lcd_cfg.sync            = 0;
        lcdc_info.ch[0].lcd_size_cfg.width      = 152;
        lcdc_info.ch[0].lcd_size_cfg.height     = 91;
  
        i2c_register_board_info(0, &tsc_device, 1);
  #endif /* CONFIG_AP4EVB_QHD */
  
+       /* CEU */
+       /*
+        * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
+        * becomes available
+        */
+       /* MIPI-CSI stuff */
+       gpio_request(GPIO_FN_VIO_CKO, NULL);
+       clk = clk_get(NULL, "vck1_clk");
+       if (!IS_ERR(clk)) {
+               clk_set_rate(clk, clk_round_rate(clk, 13000000));
+               clk_enable(clk);
+               clk_put(clk);
+       }
        sh7372_add_standard_devices();
  
        /* HDMI */
@@@ -1116,7 -1201,7 +1220,7 @@@ static void __init ap4evb_timer_init(vo
        shmobile_timer.init();
  
        /* External clock source */
-       clk_set_rate(&dv_clki_clk, 27000000);
+       clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  }
  
  static struct sys_timer ap4evb_timer = {
index ae9d3c2403f052862efccef73e9057392c999ff9,243b6411050d5edfdd587535a65173f9b1343aa7..24c6f5a30596b3d8206ab16d711ab202e5d99ad8
@@@ -74,11 -74,6 +74,6 @@@ static int s3c24xx_gpiolib_bankf_toirq(
        return -EINVAL;
  }
  
- static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
- {
-       return IRQ_EINT8 + offset;
- }
  static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
        .set_config     = s3c_gpio_setcfg_s3c24xx_a,
        .get_config     = s3c_gpio_getcfg_s3c24xx_a,
@@@ -87,8 -82,6 +82,8 @@@
  struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
        .set_config     = s3c_gpio_setcfg_s3c24xx,
        .get_config     = s3c_gpio_getcfg_s3c24xx,
 +      .set_pull       = s3c_gpio_setpull_1up,
 +      .get_pull       = s3c_gpio_getpull_1up,
  };
  
  struct s3c_gpio_chip s3c24xx_gpios[] = {
        [6] = {
                .base   = S3C2410_GPGCON,
                .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .irq_base = IRQ_EINT8,
                .chip   = {
                        .base                   = S3C2410_GPG(0),
                        .owner                  = THIS_MODULE,
                        .label                  = "GPIOG",
                        .ngpio                  = 16,
-                       .to_irq                 = s3c24xx_gpiolib_bankg_toirq,
+                       .to_irq                 = samsung_gpiolib_to_irq,
                },
        }, {
                .base   = S3C2410_GPHCON,
index 881a3a5f56472a0318d58a2e0068cb0a299eebe5,00553233a7c5752c215b2f0239f1b8e39073f536..07ea908c510d08b680704fca70dd4250264a9daf
@@@ -176,6 -176,21 +176,21 @@@ static void ap320_wvga_power_off(void *
        __raw_writew(0, FPGA_LCDREG);
  }
  
+ const static struct fb_videomode ap325rxa_lcdc_modes[] = {
+       {
+               .name = "LB070WV1",
+               .xres = 800,
+               .yres = 480,
+               .left_margin = 32,
+               .right_margin = 160,
+               .hsync_len = 8,
+               .upper_margin = 63,
+               .lower_margin = 80,
+               .vsync_len = 1,
+               .sync = 0, /* hsync and vsync are active low */
+       },
+ };
  static struct sh_mobile_lcdc_info lcdc_info = {
        .clock_source = LCDC_CLK_EXTERNAL,
        .ch[0] = {
                .bpp = 16,
                .interface_type = RGB18,
                .clock_divider = 1,
-               .lcd_cfg = {
-                       .name = "LB070WV1",
-                       .xres = 800,
-                       .yres = 480,
-                       .left_margin = 32,
-                       .right_margin = 160,
-                       .hsync_len = 8,
-                       .upper_margin = 63,
-                       .lower_margin = 80,
-                       .vsync_len = 1,
-                       .sync = 0, /* hsync and vsync are active low */
-               },
+               .lcd_cfg = ap325rxa_lcdc_modes,
+               .num_cfg = ARRAY_SIZE(ap325rxa_lcdc_modes),
                .lcd_size_cfg = { /* 7.0 inch */
                        .width = 152,
                        .height = 91,
@@@ -481,6 -486,7 +486,6 @@@ static struct soc_camera_link ov7725_li
        .power          = ov7725_power,
        .board_info     = &ap325rxa_i2c_camera[0],
        .i2c_adapter_id = 0,
 -      .module_name    = "ov772x",
        .priv           = &ov7725_info,
  };
  
index ddc7e4e4d2a0431ca0ca64a6300a5ab4288f7d03,0161deb770ccbe332b2117d35af5176975f83d3d..2eaeb9e5958575f59f3dd1f8d40b54ae03f5de00
@@@ -231,14 -231,41 +231,41 @@@ static struct platform_device usb1_comm
  };
  
  /* LCDC */
+ const static struct fb_videomode ecovec_lcd_modes[] = {
+       {
+               .name           = "Panel",
+               .xres           = 800,
+               .yres           = 480,
+               .left_margin    = 220,
+               .right_margin   = 110,
+               .hsync_len      = 70,
+               .upper_margin   = 20,
+               .lower_margin   = 5,
+               .vsync_len      = 5,
+               .sync           = 0, /* hsync and vsync are active low */
+       },
+ };
+ const static struct fb_videomode ecovec_dvi_modes[] = {
+       {
+               .name           = "DVI",
+               .xres           = 1280,
+               .yres           = 720,
+               .left_margin    = 220,
+               .right_margin   = 110,
+               .hsync_len      = 40,
+               .upper_margin   = 20,
+               .lower_margin   = 5,
+               .vsync_len      = 5,
+               .sync = 0, /* hsync and vsync are active low */
+       },
+ };
  static struct sh_mobile_lcdc_info lcdc_info = {
        .ch[0] = {
                .interface_type = RGB18,
                .chan = LCDC_CHAN_MAINLCD,
                .bpp = 16,
-               .lcd_cfg = {
-                       .sync = 0, /* hsync and vsync are active low */
-               },
                .lcd_size_cfg = { /* 7.0 inch */
                        .width = 152,
                        .height = 91,
@@@ -620,6 -647,7 +647,6 @@@ static struct soc_camera_link tw9910_li
        .bus_id         = 1,
        .power          = tw9910_power,
        .board_info     = &i2c_camera[0],
 -      .module_name    = "tw9910",
        .priv           = &tw9910_info,
  };
  
@@@ -643,6 -671,7 +670,6 @@@ static struct soc_camera_link mt9t112_l
        .power          = mt9t112_power1,
        .bus_id         = 0,
        .board_info     = &i2c_camera[1],
 -      .module_name    = "mt9t112",
        .priv           = &mt9t112_info1,
  };
  
@@@ -665,6 -694,7 +692,6 @@@ static struct soc_camera_link mt9t112_l
        .power          = mt9t112_power2,
        .bus_id         = 1,
        .board_info     = &i2c_camera[2],
 -      .module_name    = "mt9t112",
        .priv           = &mt9t112_info2,
  };
  
@@@ -790,6 -820,7 +817,6 @@@ static struct sh_vou_pdata sh_vou_pdat
        .flags          = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
        .board_info     = &ak8813,
        .i2c_adap       = 0,
 -      .module_name    = "ak881x",
  };
  
  static struct resource sh_vou_resources[] = {
@@@ -1075,33 -1106,18 +1102,18 @@@ static int __init arch_setup(void
        if (gpio_get_value(GPIO_PTE6)) {
                /* DVI */
                lcdc_info.clock_source                  = LCDC_CLK_EXTERNAL;
-               lcdc_info.ch[0].clock_divider           = 1,
-               lcdc_info.ch[0].lcd_cfg.name            = "DVI";
-               lcdc_info.ch[0].lcd_cfg.xres            = 1280;
-               lcdc_info.ch[0].lcd_cfg.yres            = 720;
-               lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
-               lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
-               lcdc_info.ch[0].lcd_cfg.hsync_len       = 40;
-               lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
-               lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
-               lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
+               lcdc_info.ch[0].clock_divider           = 1;
+               lcdc_info.ch[0].lcd_cfg                 = ecovec_dvi_modes;
+               lcdc_info.ch[0].num_cfg                 = ARRAY_SIZE(ecovec_dvi_modes);
  
                gpio_set_value(GPIO_PTA2, 1);
                gpio_set_value(GPIO_PTU1, 1);
        } else {
                /* Panel */
                lcdc_info.clock_source                  = LCDC_CLK_PERIPHERAL;
-               lcdc_info.ch[0].clock_divider           = 2,
-               lcdc_info.ch[0].lcd_cfg.name            = "Panel";
-               lcdc_info.ch[0].lcd_cfg.xres            = 800;
-               lcdc_info.ch[0].lcd_cfg.yres            = 480;
-               lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
-               lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
-               lcdc_info.ch[0].lcd_cfg.hsync_len       = 70;
-               lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
-               lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
-               lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
+               lcdc_info.ch[0].clock_divider           = 2;
+               lcdc_info.ch[0].lcd_cfg                 = ecovec_lcd_modes;
+               lcdc_info.ch[0].num_cfg                 = ARRAY_SIZE(ecovec_lcd_modes);
  
                gpio_set_value(GPIO_PTR1, 1);
  
index 1742849db6489e9533d646a6a2baf98977bc53d4,87d4b90e368c8fe4650c0a0b529e9bbb058183c4..9b60eaabf8f3d40c508c39589634370e8cbb1811
@@@ -126,6 -126,21 +126,21 @@@ static struct platform_device kfr2r09_s
        },
  };
  
+ const static struct fb_videomode kfr2r09_lcdc_modes[] = {
+       {
+               .name = "TX07D34VM0AAA",
+               .xres = 240,
+               .yres = 400,
+               .left_margin = 0,
+               .right_margin = 16,
+               .hsync_len = 8,
+               .upper_margin = 0,
+               .lower_margin = 1,
+               .vsync_len = 1,
+               .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+       },
+ };
  static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
        .clock_source = LCDC_CLK_BUS,
        .ch[0] = {
                .interface_type = SYS18,
                .clock_divider = 6,
                .flags = LCDC_FLAGS_DWPOL,
-               .lcd_cfg = {
-                       .name = "TX07D34VM0AAA",
-                       .xres = 240,
-                       .yres = 400,
-                       .left_margin = 0,
-                       .right_margin = 16,
-                       .hsync_len = 8,
-                       .upper_margin = 0,
-                       .lower_margin = 1,
-                       .vsync_len = 1,
-                       .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-               },
+               .lcd_cfg = kfr2r09_lcdc_modes,
+               .num_cfg = ARRAY_SIZE(kfr2r09_lcdc_modes),
                .lcd_size_cfg = {
                        .width = 35,
                        .height = 58,
@@@ -333,6 -338,7 +338,6 @@@ static struct soc_camera_link rj54n1_li
        .power          = camera_power,
        .board_info     = &kfr2r09_i2c_camera,
        .i2c_adapter_id = 1,
 -      .module_name    = "rj54n1cb0c",
        .priv           = &rj54n1_priv,
  };
  
index 03af84842559919eb43f16c354e97c82e699cc3a,9204cbb87147c4d173a7bb0caa2bab05c693d803..c8acfec986955046db7b22cf7615f769a3613b07
@@@ -213,51 -213,55 +213,55 @@@ static struct platform_device migor_nan
        }
  };
  
+ const static struct fb_videomode migor_lcd_modes[] = {
+       {
+ #if defined(CONFIG_SH_MIGOR_RTA_WVGA)
+               .name = "LB070WV1",
+               .xres = 800,
+               .yres = 480,
+               .left_margin = 64,
+               .right_margin = 16,
+               .hsync_len = 120,
+               .sync = 0,
+ #elif defined(CONFIG_SH_MIGOR_QVGA)
+               .name = "PH240320T",
+               .xres = 320,
+               .yres = 240,
+               .left_margin = 0,
+               .right_margin = 16,
+               .hsync_len = 8,
+               .sync = FB_SYNC_HOR_HIGH_ACT,
+ #endif
+               .upper_margin = 1,
+               .lower_margin = 17,
+               .vsync_len = 2,
+       },
+ };
  static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
- #ifdef CONFIG_SH_MIGOR_RTA_WVGA
+ #if defined(CONFIG_SH_MIGOR_RTA_WVGA)
        .clock_source = LCDC_CLK_BUS,
        .ch[0] = {
                .chan = LCDC_CHAN_MAINLCD,
                .bpp = 16,
                .interface_type = RGB16,
                .clock_divider = 2,
-               .lcd_cfg = {
-                       .name = "LB070WV1",
-                       .xres = 800,
-                       .yres = 480,
-                       .left_margin = 64,
-                       .right_margin = 16,
-                       .hsync_len = 120,
-                       .upper_margin = 1,
-                       .lower_margin = 17,
-                       .vsync_len = 2,
-                       .sync = 0,
-               },
+               .lcd_cfg = migor_lcd_modes,
+               .num_cfg = ARRAY_SIZE(migor_lcd_modes),
                .lcd_size_cfg = { /* 7.0 inch */
                        .width = 152,
                        .height = 91,
                },
        }
- #endif
- #ifdef CONFIG_SH_MIGOR_QVGA
+ #elif defined(CONFIG_SH_MIGOR_QVGA)
        .clock_source = LCDC_CLK_PERIPHERAL,
        .ch[0] = {
                .chan = LCDC_CHAN_MAINLCD,
                .bpp = 16,
                .interface_type = SYS16A,
                .clock_divider = 10,
-               .lcd_cfg = {
-                       .name = "PH240320T",
-                       .xres = 320,
-                       .yres = 240,
-                       .left_margin = 0,
-                       .right_margin = 16,
-                       .hsync_len = 8,
-                       .upper_margin = 1,
-                       .lower_margin = 17,
-                       .vsync_len = 2,
-                       .sync = FB_SYNC_HOR_HIGH_ACT,
-               },
+               .lcd_cfg = migor_lcd_modes,
+               .num_cfg = ARRAY_SIZE(migor_lcd_modes),
                .lcd_size_cfg = { /* 2.4 inch */
                        .width = 49,
                        .height = 37,
@@@ -450,6 -454,7 +454,6 @@@ static struct soc_camera_link ov7725_li
        .power          = ov7725_power,
        .board_info     = &migor_i2c_camera[0],
        .i2c_adapter_id = 0,
 -      .module_name    = "ov772x",
        .priv           = &ov7725_info,
  };
  
@@@ -462,6 -467,7 +466,6 @@@ static struct soc_camera_link tw9910_li
        .power          = tw9910_power,
        .board_info     = &migor_i2c_camera[1],
        .i2c_adapter_id = 0,
 -      .module_name    = "tw9910",
        .priv           = &tw9910_info,
  };
  
index 8cc1d7295d8509eb27c6fa9e057c0f00609d4b0f,fe208d6c8ed0e39fde505ba67de045dcd0f07f48..c31d228fdfc6257d248c28f0fac88ba274dc52b1
@@@ -144,16 -144,42 +144,42 @@@ static struct platform_device nor_flash
  };
  
  /* LCDC */
+ const static struct fb_videomode lcdc_720p_modes[] = {
+       {
+               .name           = "LB070WV1",
+               .sync           = 0, /* hsync and vsync are active low */
+               .xres           = 1280,
+               .yres           = 720,
+               .left_margin    = 220,
+               .right_margin   = 110,
+               .hsync_len      = 40,
+               .upper_margin   = 20,
+               .lower_margin   = 5,
+               .vsync_len      = 5,
+       },
+ };
+ const static struct fb_videomode lcdc_vga_modes[] = {
+       {
+               .name           = "LB070WV1",
+               .sync           = 0, /* hsync and vsync are active low */
+               .xres           = 640,
+               .yres           = 480,
+               .left_margin    = 105,
+               .right_margin   = 50,
+               .hsync_len      = 96,
+               .upper_margin   = 33,
+               .lower_margin   = 10,
+               .vsync_len      = 2,
+       },
+ };
  static struct sh_mobile_lcdc_info lcdc_info = {
        .clock_source = LCDC_CLK_EXTERNAL,
        .ch[0] = {
                .chan = LCDC_CHAN_MAINLCD,
                .bpp = 16,
                .clock_divider = 1,
-               .lcd_cfg = {
-                       .name = "LB070WV1",
-                       .sync = 0, /* hsync and vsync are active low */
-               },
                .lcd_size_cfg = { /* 7.0 inch */
                        .width = 152,
                        .height = 91,
@@@ -550,6 -576,7 +576,6 @@@ static struct sh_vou_pdata sh_vou_pdat
        .flags          = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
        .board_info     = &ak8813,
        .i2c_adap       = 0,
 -      .module_name    = "ak881x",
  };
  
  static struct resource sh_vou_resources[] = {
@@@ -908,24 -935,12 +934,12 @@@ static int __init devices_setup(void
  
        if (sw & SW41_B) {
                /* 720p */
-               lcdc_info.ch[0].lcd_cfg.xres         = 1280;
-               lcdc_info.ch[0].lcd_cfg.yres         = 720;
-               lcdc_info.ch[0].lcd_cfg.left_margin  = 220;
-               lcdc_info.ch[0].lcd_cfg.right_margin = 110;
-               lcdc_info.ch[0].lcd_cfg.hsync_len    = 40;
-               lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
-               lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
-               lcdc_info.ch[0].lcd_cfg.vsync_len    = 5;
+               lcdc_info.ch[0].lcd_cfg = lcdc_720p_modes;
+               lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_720p_modes);
        } else {
                /* VGA */
-               lcdc_info.ch[0].lcd_cfg.xres         = 640;
-               lcdc_info.ch[0].lcd_cfg.yres         = 480;
-               lcdc_info.ch[0].lcd_cfg.left_margin  = 105;
-               lcdc_info.ch[0].lcd_cfg.right_margin = 50;
-               lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
-               lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
-               lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
-               lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
+               lcdc_info.ch[0].lcd_cfg = lcdc_vga_modes;
+               lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_vga_modes);
        }
  
        if (sw & SW41_A) {