Merge branch 'io-cleanup-for-3.4' of git://sources.calxeda.com/kernel/linux into...
authorOlof Johansson <olof@lixom.net>
Tue, 27 Mar 2012 23:00:49 +0000 (16:00 -0700)
committerOlof Johansson <olof@lixom.net>
Tue, 27 Mar 2012 23:00:49 +0000 (16:00 -0700)
* 'io-cleanup-for-3.4' of git://sources.calxeda.com/kernel/linux:
  ARM: pxa: use common IOMEM definition
  ARM: dma-mapping: convert ARCH_HAS_DMA_SET_COHERENT_MASK to kconfig symbol

arch/arm/boot/dts/tegra-paz00.dts
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-harmony-pinmux.c
arch/arm/mach-tegra/board-paz00.c
arch/arm/mach-tegra/board-paz00.h
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/pcie.c
arch/arm/mach-tegra/usb_phy.c

index 1a1d7023b69b427bda55a11b0dff61e8849e001b..825d2957da0b819a8ac9204df02dff60fee9dbbc 100644 (file)
        };
 
        serial@70006200 {
-               status = "disable";
+               clock-frequency = <216000000>;
        };
 
        serial@70006300 {
-               clock-frequency = <216000000>;
+               status = "disable";
        };
 
        serial@70006400 {
@@ -60,7 +60,7 @@
        sdhci@c8000000 {
                cd-gpios = <&gpio 173 0>; /* gpio PV5 */
                wp-gpios = <&gpio 57 0>;  /* gpio PH1 */
-               power-gpios = <&gpio 155 0>; /* gpio PT3 */
+               power-gpios = <&gpio 169 0>; /* gpio PV1 */
        };
 
        sdhci@c8000200 {
index 373652d76b900b410c7718eb3e27fd15829ecad8..6ae78821fd8edc1bdaba4de2cbe4a54675b08a1c 100644 (file)
@@ -8,8 +8,16 @@ config ARCH_TEGRA_2x_SOC
        select ARM_GIC
        select ARCH_REQUIRE_GPIOLIB
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
-       select USB_ULPI if USB_SUPPORT
+       select USB_ULPI if USB
        select USB_ULPI_VIEWPORT if USB_SUPPORT
+       select ARM_ERRATA_720789
+       select ARM_ERRATA_742230
+       select ARM_ERRATA_751472
+       select ARM_ERRATA_754327
+       select ARM_ERRATA_764369
+       select PL310_ERRATA_727915 if CACHE_L2X0
+       select PL310_ERRATA_769419 if CACHE_L2X0
+       select CPU_FREQ_TABLE if CPU_FREQ
        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -20,9 +28,15 @@ config ARCH_TEGRA_3x_SOC
        select ARM_GIC
        select ARCH_REQUIRE_GPIOLIB
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
-       select USB_ULPI if USB_SUPPORT
+       select USB_ULPI if USB
        select USB_ULPI_VIEWPORT if USB_SUPPORT
        select USE_OF
+       select ARM_ERRATA_743622
+       select ARM_ERRATA_751472
+       select ARM_ERRATA_754322
+       select ARM_ERRATA_764369
+       select PL310_ERRATA_769419 if CACHE_L2X0
+       select CPU_FREQ_TABLE if CPU_FREQ
        help
          Support for NVIDIA Tegra T30 processor family, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
index e120ff54f66377667928e5d2aa26583865782aef..829066fdc2ad60ca85b1de04a2eefe7ec8124856 100644 (file)
@@ -13,7 +13,8 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC)               += tegra2_emc.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)                += pinmux-tegra20-tables.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)                += pinmux-tegra30-tables.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)                += board-dt-tegra30.o
-obj-$(CONFIG_SMP)                       += platsmp.o localtimer.o headsmp.o
+obj-$(CONFIG_SMP)                      += platsmp.o headsmp.o
+obj-$(CONFIG_LOCAL_TIMERS)             += localtimer.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
 obj-$(CONFIG_TEGRA_SYSTEM_DMA)         += dma.o
 obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o
index 465808c8ac0bd3f45ac03d9f0de5ad9ef92480ff..1af85bccc0f165302c3463d818b950298799c01e 100644 (file)
@@ -53,7 +53,7 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
        {TEGRA_PINGROUP_GME,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_GPU,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
-       {TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
@@ -112,10 +112,10 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
        {TEGRA_PINGROUP_SDC,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SDD,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
-       {TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
-       {TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SPDI,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SPDO,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SPIA,  TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
index fcf4f377b1dcf0e99d11fdf62f228a1f05b1dda1..330afdfa24754ae773238f45f855db0407c7dd57 100644 (file)
@@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
                .uartclk        = 216000000,
        }, {
                /* serial port on mini-pcie */
-               .membase        = IO_ADDRESS(TEGRA_UARTD_BASE),
-               .mapbase        = TEGRA_UARTD_BASE,
-               .irq            = INT_UARTD,
+               .membase        = IO_ADDRESS(TEGRA_UARTC_BASE),
+               .mapbase        = TEGRA_UARTC_BASE,
+               .irq            = INT_UARTC,
                .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
                .type           = PORT_TEGRA,
                .iotype         = UPIO_MEM,
@@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline,
 static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
        /* name         parent          rate            enabled */
        { "uarta",      "pll_p",        216000000,      true },
-       { "uartd",      "pll_p",        216000000,      true },
+       { "uartc",      "pll_p",        216000000,      true },
 
        { "pll_p_out4", "pll_p",        24000000,       true },
        { "usbd",       "clk_m",        12000000,       false },
index ffa83f580db6740289fe0ee00ef1a77a1cf8910b..3c9f8da37ea3ce16de68b760bf87223585e15cff 100644 (file)
@@ -22,7 +22,7 @@
 /* SDCARD */
 #define TEGRA_GPIO_SD1_CD              TEGRA_GPIO_PV5
 #define TEGRA_GPIO_SD1_WP              TEGRA_GPIO_PH1
-#define TEGRA_GPIO_SD1_POWER           TEGRA_GPIO_PT3
+#define TEGRA_GPIO_SD1_POWER           TEGRA_GPIO_PV1
 
 /* ULPI */
 #define TEGRA_ULPI_RST                 TEGRA_GPIO_PV0
index 2db20da1d585a98535046fe01e4911c80a108a17..fac449e84d80d9b61f518a836dd4846bf02e72d9 100644 (file)
@@ -95,8 +95,6 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
 void __init tegra20_init_early(void)
 {
-       disable_hlt();  /* idle WFI usage needs to be confirmed */
-
        tegra_init_fuse();
        tegra2_init_clocks();
        tegra_clk_init_from_table(tegra20_clk_init_table);
index af8b634357278b5682955d7eca3f4a3f946e0895..91536996c3f0eb472d2a8ff6f2f82a9c03a2eb2c 100644 (file)
@@ -585,10 +585,10 @@ static void tegra_pcie_setup_translations(void)
        afi_writel(0, AFI_MSI_BAR_SZ);
 }
 
-static void tegra_pcie_enable_controller(void)
+static int tegra_pcie_enable_controller(void)
 {
        u32 val, reg;
-       int i;
+       int i, timeout;
 
        /* Enable slot clock and pulse the reset signals */
        for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) {
@@ -639,8 +639,14 @@ static void tegra_pcie_enable_controller(void)
        pads_writel(0xfa5cfa5c, 0xc8);
 
        /* Wait for the PLL to lock */
+       timeout = 300;
        do {
                val = pads_readl(PADS_PLL_CTL);
+               usleep_range(1000, 1000);
+               if (--timeout == 0) {
+                       pr_err("Tegra PCIe error: timeout waiting for PLL\n");
+                       return -EBUSY;
+               }
        } while (!(val & PADS_PLL_CTL_LOCKDET));
 
        /* turn off IDDQ override */
@@ -671,7 +677,7 @@ static void tegra_pcie_enable_controller(void)
        /* Disable all execptions */
        afi_writel(0, AFI_FPCI_ERROR_MASKS);
 
-       return;
+       return 0;
 }
 
 static void tegra_pcie_xclk_clamp(bool clamp)
@@ -921,7 +927,9 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1)
        if (err)
                return err;
 
-       tegra_pcie_enable_controller();
+       err = tegra_pcie_enable_controller();
+       if (err)
+               return err;
 
        /* setup the AFI address translations */
        tegra_pcie_setup_translations();
index 37576a721aeb7c6b549b7201a9999901f901956f..6091cf3d8e8b23d800b867bdc6c4f130bbfb01cd 100644 (file)
@@ -22,6 +22,7 @@
 #include <linux/delay.h>
 #include <linux/slab.h>
 #include <linux/err.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
@@ -730,6 +731,7 @@ err0:
        kfree(phy);
        return ERR_PTR(err);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_open);
 
 int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
 {
@@ -738,6 +740,7 @@ int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
        else
                return utmi_phy_power_on(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on);
 
 void tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
 {
@@ -746,18 +749,21 @@ void tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
        else
                utmi_phy_power_off(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off);
 
 void tegra_usb_phy_preresume(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_preresume(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_preresume);
 
 void tegra_usb_phy_postresume(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_postresume(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_postresume);
 
 void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
                                 enum tegra_usb_phy_port_speed port_speed)
@@ -765,24 +771,28 @@ void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
        if (!phy_is_ulpi(phy))
                utmi_phy_restore_start(phy, port_speed);
 }
+EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_start);
 
 void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_restore_end(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end);
 
 void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_clk_disable(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_disable);
 
 void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_clk_enable(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_enable);
 
 void tegra_usb_phy_close(struct tegra_usb_phy *phy)
 {
@@ -794,3 +804,4 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy)
        clk_put(phy->pll_u);
        kfree(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_close);