video: exynos_dp: use usleep_range instead of delay
authorJingoo Han <jg1.han@samsung.com>
Wed, 18 Jul 2012 09:50:59 +0000 (18:50 +0900)
committerFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
Tue, 24 Jul 2012 20:56:18 +0000 (20:56 +0000)
This patch replaces udelay and mdelay with usleep_range to remove
the busy loop waiting.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
drivers/video/exynos/exynos_dp_core.c
drivers/video/exynos/exynos_dp_reg.c

index 0f3a64baecc940adff2352e2b840eae8efd45aac..c6c016a506ce4e5799bc2582287ae39efeb787c7 100644 (file)
@@ -47,7 +47,7 @@ static int exynos_dp_detect_hpd(struct exynos_dp_device *dp)
 
        exynos_dp_init_hpd(dp);
 
 
        exynos_dp_init_hpd(dp);
 
-       udelay(200);
+       usleep_range(200, 210);
 
        while (exynos_dp_get_plug_in_status(dp) != 0) {
                timeout_loop++;
 
        while (exynos_dp_get_plug_in_status(dp) != 0) {
                timeout_loop++;
@@ -55,7 +55,7 @@ static int exynos_dp_detect_hpd(struct exynos_dp_device *dp)
                        dev_err(dp->dev, "failed to get hpd plug status\n");
                        return -ETIMEDOUT;
                }
                        dev_err(dp->dev, "failed to get hpd plug status\n");
                        return -ETIMEDOUT;
                }
-               udelay(10);
+               usleep_range(10, 11);
        }
 
        return 0;
        }
 
        return 0;
@@ -486,7 +486,7 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
        u8 pre_emphasis;
        u8 training_lane;
 
        u8 pre_emphasis;
        u8 training_lane;
 
-       udelay(100);
+       usleep_range(100, 101);
 
        exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_LANE0_1_STATUS,
                                6, link_status);
 
        exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_LANE0_1_STATUS,
                                6, link_status);
@@ -571,7 +571,7 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
 
        u8 adjust_request[2];
 
 
        u8 adjust_request[2];
 
-       udelay(400);
+       usleep_range(400, 401);
 
        exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_LANE0_1_STATUS,
                                6, link_status);
 
        exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_LANE0_1_STATUS,
                                6, link_status);
@@ -739,7 +739,7 @@ static int exynos_dp_set_link_train(struct exynos_dp_device *dp,
                if (retval == 0)
                        break;
 
                if (retval == 0)
                        break;
 
-               udelay(100);
+               usleep_range(100, 110);
        }
 
        return retval;
        }
 
        return retval;
@@ -773,7 +773,7 @@ static int exynos_dp_config_video(struct exynos_dp_device *dp,
                        return -ETIMEDOUT;
                }
 
                        return -ETIMEDOUT;
                }
 
-               udelay(1);
+               usleep_range(1, 2);
        }
 
        /* Set to use the register calculated M/N video */
        }
 
        /* Set to use the register calculated M/N video */
@@ -807,7 +807,7 @@ static int exynos_dp_config_video(struct exynos_dp_device *dp,
                        return -ETIMEDOUT;
                }
 
                        return -ETIMEDOUT;
                }
 
-               mdelay(1);
+               usleep_range(1000, 1001);
        }
 
        if (retval != 0)
        }
 
        if (retval != 0)
index 6ce76d56c3a1a2a7d3920d7eebfca34001b64dc7..ce401c83f6388f100cfb24524471f4e9a3651390 100644 (file)
@@ -122,7 +122,7 @@ void exynos_dp_reset(struct exynos_dp_device *dp)
                LS_CLK_DOMAIN_FUNC_EN_N;
        writel(reg, dp->reg_base + EXYNOS_DP_FUNC_EN_2);
 
                LS_CLK_DOMAIN_FUNC_EN_N;
        writel(reg, dp->reg_base + EXYNOS_DP_FUNC_EN_2);
 
-       udelay(20);
+       usleep_range(20, 30);
 
        exynos_dp_lane_swap(dp, 0);
 
 
        exynos_dp_lane_swap(dp, 0);
 
@@ -988,7 +988,7 @@ void exynos_dp_reset_macro(struct exynos_dp_device *dp)
        writel(reg, dp->reg_base + EXYNOS_DP_PHY_TEST);
 
        /* 10 us is the minimum reset time. */
        writel(reg, dp->reg_base + EXYNOS_DP_PHY_TEST);
 
        /* 10 us is the minimum reset time. */
-       udelay(10);
+       usleep_range(10, 20);
 
        reg &= ~MACRO_RST;
        writel(reg, dp->reg_base + EXYNOS_DP_PHY_TEST);
 
        reg &= ~MACRO_RST;
        writel(reg, dp->reg_base + EXYNOS_DP_PHY_TEST);