]> git.openfabrics.org - ~shefty/rdma-dev.git/commitdiff
ARM: Remove mach-bcmring
authorArnd Bergmann <arnd@arndb.de>
Sun, 23 Sep 2012 18:04:40 +0000 (18:04 +0000)
committerArnd Bergmann <arnd@arndb.de>
Fri, 28 Sep 2012 19:40:31 +0000 (21:40 +0200)
Remove mach-bcmring as this is no longer maintained or used.

Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
57 files changed:
MAINTAINERS
arch/arm/Kconfig
arch/arm/Makefile
arch/arm/configs/bcmring_defconfig [deleted file]
arch/arm/mach-bcmring/Kconfig [deleted file]
arch/arm/mach-bcmring/Makefile [deleted file]
arch/arm/mach-bcmring/Makefile.boot [deleted file]
arch/arm/mach-bcmring/arch.c [deleted file]
arch/arm/mach-bcmring/clock.c [deleted file]
arch/arm/mach-bcmring/clock.h [deleted file]
arch/arm/mach-bcmring/core.c [deleted file]
arch/arm/mach-bcmring/core.h [deleted file]
arch/arm/mach-bcmring/csp/Makefile [deleted file]
arch/arm/mach-bcmring/csp/chipc/Makefile [deleted file]
arch/arm/mach-bcmring/csp/chipc/chipcHw.c [deleted file]
arch/arm/mach-bcmring/csp/chipc/chipcHw_init.c [deleted file]
arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c [deleted file]
arch/arm/mach-bcmring/csp/chipc/chipcHw_str.c [deleted file]
arch/arm/mach-bcmring/csp/dmac/Makefile [deleted file]
arch/arm/mach-bcmring/csp/dmac/dmacHw.c [deleted file]
arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c [deleted file]
arch/arm/mach-bcmring/csp/tmr/Makefile [deleted file]
arch/arm/mach-bcmring/csp/tmr/tmrHw.c [deleted file]
arch/arm/mach-bcmring/dma.c [deleted file]
arch/arm/mach-bcmring/dma_device.c [deleted file]
arch/arm/mach-bcmring/include/cfg_global_defines.h [deleted file]
arch/arm/mach-bcmring/include/csp/dmacHw.h [deleted file]
arch/arm/mach-bcmring/include/csp/reg.h [deleted file]
arch/arm/mach-bcmring/include/csp/tmrHw.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/cap.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/cap_inline.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/chipcHw_reg.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/ddrcReg.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/hw_cfg.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/mm_addr.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/mm_io.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/secHw_def.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/secHw_inline.h [deleted file]
arch/arm/mach-bcmring/include/mach/csp/tmrHw_reg.h [deleted file]
arch/arm/mach-bcmring/include/mach/dma.h [deleted file]
arch/arm/mach-bcmring/include/mach/entry-macro.S [deleted file]
arch/arm/mach-bcmring/include/mach/hardware.h [deleted file]
arch/arm/mach-bcmring/include/mach/irqs.h [deleted file]
arch/arm/mach-bcmring/include/mach/memory_settings.h [deleted file]
arch/arm/mach-bcmring/include/mach/reg_nand.h [deleted file]
arch/arm/mach-bcmring/include/mach/reg_umi.h [deleted file]
arch/arm/mach-bcmring/include/mach/timer.h [deleted file]
arch/arm/mach-bcmring/include/mach/timex.h [deleted file]
arch/arm/mach-bcmring/include/mach/uncompress.h [deleted file]
arch/arm/mach-bcmring/irq.c [deleted file]
arch/arm/mach-bcmring/mm.c [deleted file]
arch/arm/mach-bcmring/timer.c [deleted file]

index 94b823f71e944d1f8805815c2b16b5bca437d3b7..c908a8c73b5115f18e3a228986268737f1688e33 100644 (file)
@@ -658,22 +658,6 @@ W: http://www.linux4sam.org
 S:     Supported
 F:     arch/arm/mach-at91/
 
-ARM/BCMRING ARM ARCHITECTURE
-M:     Jiandong Zheng <jdzheng@broadcom.com>
-M:     Scott Branden <sbranden@broadcom.com>
-L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-S:     Maintained
-F:     arch/arm/mach-bcmring
-
-ARM/BCMRING MTD NAND DRIVER
-M:     Jiandong Zheng <jdzheng@broadcom.com>
-M:     Scott Branden <sbranden@broadcom.com>
-L:     linux-mtd@lists.infradead.org
-S:     Maintained
-F:     drivers/mtd/nand/bcm_umi_nand.c
-F:     drivers/mtd/nand/bcm_umi_bch.c
-F:     drivers/mtd/nand/nand_bcm_umi.h
-
 ARM/CALXEDA HIGHBANK ARCHITECTURE
 M:     Rob Herring <rob.herring@calxeda.com>
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
index e91c7cdc6fe5c5ae370fa8be0f3a3c51a0b49beb..ce61f4a6fc4a20b16e1e258012913fbc3fa5948d 100644 (file)
@@ -356,18 +356,6 @@ config ARCH_AT91
          This enables support for systems based on Atmel
          AT91RM9200 and AT91SAM9* processors.
 
-config ARCH_BCMRING
-       bool "Broadcom BCMRING"
-       depends on MMU
-       select CPU_V6
-       select ARM_AMBA
-       select ARM_TIMER_SP804
-       select CLKDEV_LOOKUP
-       select GENERIC_CLOCKEVENTS
-       select ARCH_WANT_OPTIONAL_GPIOLIB
-       help
-         Support for Broadcom's BCMRing platform.
-
 config ARCH_HIGHBANK
        bool "Calxeda Highbank-based"
        select ARCH_WANT_OPTIONAL_GPIOLIB
@@ -1037,8 +1025,6 @@ source "arch/arm/mach-mvebu/Kconfig"
 
 source "arch/arm/mach-at91/Kconfig"
 
-source "arch/arm/mach-bcmring/Kconfig"
-
 source "arch/arm/mach-clps711x/Kconfig"
 
 source "arch/arm/mach-cns3xxx/Kconfig"
index 30eae87ead6d4b245bc6707040645f5182464e90..8383e2ed69065678bc80f4c4eb6e42018816c797 100644 (file)
@@ -136,7 +136,6 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)            := at91
-machine-$(CONFIG_ARCH_BCMRING)         := bcmring
 machine-$(CONFIG_ARCH_CLPS711X)                := clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)         := cns3xxx
 machine-$(CONFIG_ARCH_DAVINCI)         := davinci
diff --git a/arch/arm/configs/bcmring_defconfig b/arch/arm/configs/bcmring_defconfig
deleted file mode 100644 (file)
index 9e6a8fe..0000000
+++ /dev/null
@@ -1,79 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-# CONFIG_HOTPLUG is not set
-# CONFIG_ELF_CORE is not set
-# CONFIG_EPOLL is not set
-# CONFIG_SIGNALFD is not set
-# CONFIG_TIMERFD is not set
-# CONFIG_EVENTFD is not set
-# CONFIG_AIO is not set
-CONFIG_PERF_EVENTS=y
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_SLUB_DEBUG is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_BCMRING=y
-CONFIG_BCM_ZRELADDR=0x8000
-CONFIG_CPU_32v6K=y
-CONFIG_NO_HZ=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_UACCESS_WITH_MEMCPY=y
-CONFIG_ZBOOT_ROM_TEXT=0x0e000000
-CONFIG_ZBOOT_ROM_BSS=0x0ea00000
-CONFIG_ZBOOT_ROM=y
-CONFIG_NET=y
-# CONFIG_WIRELESS is not set
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
-CONFIG_MTD_NAND_BCM_UMI=y
-CONFIG_MTD_NAND_BCM_UMI_HWCS=y
-# CONFIG_MISC_DEVICES is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_CONSOLE_TRANSLATIONS is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=64
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_FILE_LOCKING is not set
-# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-# CONFIG_JFFS2_FS_SECURITY is not set
-# CONFIG_NETWORK_FILESYSTEMS is not set
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_HEADERS_CHECK=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_ARM_UNWIND is not set
diff --git a/arch/arm/mach-bcmring/Kconfig b/arch/arm/mach-bcmring/Kconfig
deleted file mode 100644 (file)
index 9170d16..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-choice
-       prompt "Processor selection in BCMRING family of devices"
-       depends on ARCH_BCMRING
-       default ARCH_BCM11107
-
-config ARCH_FPGA11107
-       bool "FPGA11107"
-
-config ARCH_BCM11107
-       bool "BCM11107"
-endchoice
-
-menu "BCMRING Options"
-       depends on ARCH_BCMRING
-
-config BCM_ZRELADDR
-       hex "Compressed ZREL ADDR"
-
-endmenu
diff --git a/arch/arm/mach-bcmring/Makefile b/arch/arm/mach-bcmring/Makefile
deleted file mode 100644 (file)
index f8d9fce..0000000
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-
-obj-y := arch.o mm.o irq.o clock.o core.o timer.o dma.o
-obj-y += csp/
diff --git a/arch/arm/mach-bcmring/Makefile.boot b/arch/arm/mach-bcmring/Makefile.boot
deleted file mode 100644 (file)
index aef2467..0000000
+++ /dev/null
@@ -1,6 +0,0 @@
-# Address where decompressor will be written and eventually executed.
-#
-# default to SDRAM
-zreladdr-y      += $(CONFIG_BCM_ZRELADDR)
-params_phys-y   := 0x00000800
-
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
deleted file mode 100644 (file)
index 45c97b1..0000000
+++ /dev/null
@@ -1,199 +0,0 @@
-/*****************************************************************************
-* Copyright 2003 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/spinlock.h>
-#include <linux/module.h>
-
-#include <linux/proc_fs.h>
-#include <linux/sysctl.h>
-
-#include <asm/irq.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/mach/time.h>
-#include <asm/pmu.h>
-
-#include <asm/mach/arch.h>
-#include <mach/dma.h>
-#include <mach/hardware.h>
-#include <mach/csp/mm_io.h>
-#include <mach/csp/chipcHw_def.h>
-#include <mach/csp/chipcHw_inline.h>
-
-#include <cfg_global.h>
-
-#include "core.h"
-
-HW_DECLARE_SPINLOCK(arch)
-HW_DECLARE_SPINLOCK(gpio)
-#if defined(CONFIG_DEBUG_SPINLOCK)
-    EXPORT_SYMBOL(bcmring_gpio_reg_lock);
-#endif
-
-/* sysctl */
-static int bcmring_arch_warm_reboot;   /* do a warm reboot on hard reset */
-
-static void bcmring_restart(char mode, const char *cmd)
-{
-       printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
-
-       if (mode == 'h') {
-               /* Reboot configured in proc entry */
-               if (bcmring_arch_warm_reboot) {
-                       printk("warm reset\n");
-                       /* Issue Warm reset (do not reset ethernet switch, keep alive) */
-                       chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
-               } else {
-                       /* Force reset of everything */
-                       printk("force reset\n");
-                       chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-               }
-       } else {
-               /* Force reset of everything */
-               printk("force reset\n");
-               chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-       }
-}
-
-static struct ctl_table_header *bcmring_sysctl_header;
-
-static struct ctl_table bcmring_sysctl_warm_reboot[] = {
-       {
-        .procname = "warm",
-        .data = &bcmring_arch_warm_reboot,
-        .maxlen = sizeof(int),
-        .mode = 0644,
-        .proc_handler = proc_dointvec},
-       {}
-};
-
-static struct ctl_table bcmring_sysctl_reboot[] = {
-       {
-        .procname = "reboot",
-        .mode = 0555,
-        .child = bcmring_sysctl_warm_reboot},
-       {}
-};
-
-static struct resource nand_resource[] = {
-       [0] = {
-               .start = MM_ADDR_IO_NAND,
-               .end = MM_ADDR_IO_NAND + 0x1000 - 1,
-               .flags = IORESOURCE_MEM,
-       },
-};
-
-static struct platform_device nand_device = {
-       .name = "bcm-nand",
-       .id = -1,
-       .resource = nand_resource,
-       .num_resources  = ARRAY_SIZE(nand_resource),
-};
-
-static struct resource pmu_resource = {
-       .start  = IRQ_PMUIRQ,
-       .end    = IRQ_PMUIRQ,
-       .flags  = IORESOURCE_IRQ,
-};
-
-static struct platform_device pmu_device = {
-       .name           = "arm-pmu",
-       .id             = ARM_PMU_DEVICE_CPU,
-       .resource       = &pmu_resource,
-       .num_resources  = 1,
-};
-
-
-static struct platform_device *devices[] __initdata = {
-       &nand_device,
-       &pmu_device,
-};
-
-/****************************************************************************
-*
-*   Called from the customize_machine function in arch/arm/kernel/setup.c
-*
-*   The customize_machine function is tagged as an arch_initcall
-*   (see include/linux/init.h for the order that the various init sections
-*   are called in.
-*
-*****************************************************************************/
-static void __init bcmring_init_machine(void)
-{
-
-       bcmring_sysctl_header = register_sysctl_table(bcmring_sysctl_reboot);
-
-       /* Enable spread spectrum */
-       chipcHw_enableSpreadSpectrum();
-
-       platform_add_devices(devices, ARRAY_SIZE(devices));
-
-       bcmring_amba_init();
-
-       dma_init();
-}
-
-/****************************************************************************
-*
-*   Called from setup_arch (in arch/arm/kernel/setup.c) to fixup any tags
-*   passed in by the boot loader.
-*
-*****************************************************************************/
-
-static void __init bcmring_fixup(struct tag *t, char **cmdline,
-       struct meminfo *mi) {
-#ifdef CONFIG_BLK_DEV_INITRD
-       printk(KERN_NOTICE "bcmring_fixup\n");
-       t->hdr.tag = ATAG_CORE;
-       t->hdr.size = tag_size(tag_core);
-       t->u.core.flags = 0;
-       t->u.core.pagesize = PAGE_SIZE;
-       t->u.core.rootdev = 31 << 8 | 0;
-       t = tag_next(t);
-
-       t->hdr.tag = ATAG_MEM;
-       t->hdr.size = tag_size(tag_mem32);
-       t->u.mem.start = CFG_GLOBAL_RAM_BASE;
-       t->u.mem.size = CFG_GLOBAL_RAM_SIZE;
-
-       t = tag_next(t);
-
-       t->hdr.tag = ATAG_NONE;
-       t->hdr.size = 0;
-#endif
-}
-
-/****************************************************************************
-*
-*   Machine Description
-*
-*****************************************************************************/
-
-MACHINE_START(BCMRING, "BCMRING")
-       /* Maintainer: Broadcom Corporation */
-       .fixup = bcmring_fixup,
-       .map_io = bcmring_map_io,
-       .init_early = bcmring_init_early,
-       .init_irq = bcmring_init_irq,
-       .timer = &bcmring_timer,
-       .init_machine = bcmring_init_machine,
-       .restart = bcmring_restart,
-MACHINE_END
diff --git a/arch/arm/mach-bcmring/clock.c b/arch/arm/mach-bcmring/clock.c
deleted file mode 100644 (file)
index ad237a4..0000000
+++ /dev/null
@@ -1,223 +0,0 @@
-/*****************************************************************************
-* Copyright 2001 - 2009 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/string.h>
-#include <linux/clk.h>
-#include <linux/spinlock.h>
-#include <linux/clkdev.h>
-#include <mach/csp/hw_cfg.h>
-#include <mach/csp/chipcHw_def.h>
-#include <mach/csp/chipcHw_reg.h>
-#include <mach/csp/chipcHw_inline.h>
-
-#include "clock.h"
-
-#define clk_is_primary(x)       ((x)->type & CLK_TYPE_PRIMARY)
-#define clk_is_pll1(x)          ((x)->type & CLK_TYPE_PLL1)
-#define clk_is_pll2(x)          ((x)->type & CLK_TYPE_PLL2)
-#define clk_is_programmable(x)  ((x)->type & CLK_TYPE_PROGRAMMABLE)
-#define clk_is_bypassable(x)    ((x)->type & CLK_TYPE_BYPASSABLE)
-
-#define clk_is_using_xtal(x)    ((x)->mode & CLK_MODE_XTAL)
-
-static DEFINE_SPINLOCK(clk_lock);
-
-static void __clk_enable(struct clk *clk)
-{
-       if (!clk)
-               return;
-
-       /* enable parent clock first */
-       if (clk->parent)
-               __clk_enable(clk->parent);
-
-       if (clk->use_cnt++ == 0) {
-               if (clk_is_pll1(clk)) { /* PLL1 */
-                       chipcHw_pll1Enable(clk->rate_hz, 0);
-               } else if (clk_is_pll2(clk)) {  /* PLL2 */
-                       chipcHw_pll2Enable(clk->rate_hz);
-               } else if (clk_is_using_xtal(clk)) {    /* source is crystal */
-                       if (!clk_is_primary(clk))
-                               chipcHw_bypassClockEnable(clk->csp_id);
-               } else {        /* source is PLL */
-                       chipcHw_setClockEnable(clk->csp_id);
-               }
-       }
-}
-
-int clk_enable(struct clk *clk)
-{
-       unsigned long flags;
-
-       if (!clk)
-               return -EINVAL;
-
-       spin_lock_irqsave(&clk_lock, flags);
-       __clk_enable(clk);
-       spin_unlock_irqrestore(&clk_lock, flags);
-
-       return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-static void __clk_disable(struct clk *clk)
-{
-       if (!clk)
-               return;
-
-       BUG_ON(clk->use_cnt == 0);
-
-       if (--clk->use_cnt == 0) {
-               if (clk_is_pll1(clk)) { /* PLL1 */
-                       chipcHw_pll1Disable();
-               } else if (clk_is_pll2(clk)) {  /* PLL2 */
-                       chipcHw_pll2Disable();
-               } else if (clk_is_using_xtal(clk)) {    /* source is crystal */
-                       if (!clk_is_primary(clk))
-                               chipcHw_bypassClockDisable(clk->csp_id);
-               } else {        /* source is PLL */
-                       chipcHw_setClockDisable(clk->csp_id);
-               }
-       }
-
-       if (clk->parent)
-               __clk_disable(clk->parent);
-}
-
-void clk_disable(struct clk *clk)
-{
-       unsigned long flags;
-
-       if (!clk)
-               return;
-
-       spin_lock_irqsave(&clk_lock, flags);
-       __clk_disable(clk);
-       spin_unlock_irqrestore(&clk_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-       if (!clk)
-               return 0;
-
-       return clk->rate_hz;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-       unsigned long flags;
-       unsigned long actual;
-       unsigned long rate_hz;
-
-       if (!clk)
-               return -EINVAL;
-
-       if (!clk_is_programmable(clk))
-               return -EINVAL;
-
-       if (clk->use_cnt)
-               return -EBUSY;
-
-       spin_lock_irqsave(&clk_lock, flags);
-       actual = clk->parent->rate_hz;
-       rate_hz = min(actual, rate);
-       spin_unlock_irqrestore(&clk_lock, flags);
-
-       return rate_hz;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-       unsigned long flags;
-       unsigned long actual;
-       unsigned long rate_hz;
-
-       if (!clk)
-               return -EINVAL;
-
-       if (!clk_is_programmable(clk))
-               return -EINVAL;
-
-       if (clk->use_cnt)
-               return -EBUSY;
-
-       spin_lock_irqsave(&clk_lock, flags);
-       actual = clk->parent->rate_hz;
-       rate_hz = min(actual, rate);
-       rate_hz = chipcHw_setClockFrequency(clk->csp_id, rate_hz);
-       clk->rate_hz = rate_hz;
-       spin_unlock_irqrestore(&clk_lock, flags);
-
-       return 0;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-struct clk *clk_get_parent(struct clk *clk)
-{
-       if (!clk)
-               return NULL;
-
-       return clk->parent;
-}
-EXPORT_SYMBOL(clk_get_parent);
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
-       unsigned long flags;
-       struct clk *old_parent;
-
-       if (!clk || !parent)
-               return -EINVAL;
-
-       if (!clk_is_primary(parent) || !clk_is_bypassable(clk))
-               return -EINVAL;
-
-       /* if more than one user, parent is not allowed */
-       if (clk->use_cnt > 1)
-               return -EBUSY;
-
-       if (clk->parent == parent)
-               return 0;
-
-       spin_lock_irqsave(&clk_lock, flags);
-       old_parent = clk->parent;
-       clk->parent = parent;
-       if (clk_is_using_xtal(parent))
-               clk->mode |= CLK_MODE_XTAL;
-       else
-               clk->mode &= (~CLK_MODE_XTAL);
-
-       /* if clock is active */
-       if (clk->use_cnt != 0) {
-               clk->use_cnt--;
-               /* enable clock with the new parent */
-               __clk_enable(clk);
-               /* disable the old parent */
-               __clk_disable(old_parent);
-       }
-       spin_unlock_irqrestore(&clk_lock, flags);
-
-       return 0;
-}
-EXPORT_SYMBOL(clk_set_parent);
diff --git a/arch/arm/mach-bcmring/clock.h b/arch/arm/mach-bcmring/clock.h
deleted file mode 100644 (file)
index 5e0b981..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-/*****************************************************************************
-* Copyright 2001 - 2009 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-#include <mach/csp/chipcHw_def.h>
-
-#define CLK_TYPE_PRIMARY         1     /* primary clock must NOT have a parent */
-#define CLK_TYPE_PLL1            2     /* PPL1 */
-#define CLK_TYPE_PLL2            4     /* PPL2 */
-#define CLK_TYPE_PROGRAMMABLE    8     /* programmable clock rate */
-#define CLK_TYPE_BYPASSABLE      16    /* parent can be changed */
-
-#define CLK_MODE_XTAL            1     /* clock source is from crystal */
-
-struct clk {
-       const char *name;       /* clock name */
-       unsigned int type;      /* clock type */
-       unsigned int mode;      /* current mode */
-       volatile int use_bypass;        /* indicate if it's in bypass mode */
-       chipcHw_CLOCK_e csp_id; /* clock ID for CSP CHIPC */
-       unsigned long rate_hz;  /* clock rate in Hz */
-       unsigned int use_cnt;   /* usage count */
-       struct clk *parent;     /* parent clock */
-};
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
deleted file mode 100644 (file)
index adbfb19..0000000
+++ /dev/null
@@ -1,228 +0,0 @@
-/*
- *  derived from linux/arch/arm/mach-versatile/core.c
- *  linux/arch/arm/mach-bcmring/core.c
- *
- *  Copyright (C) 1999 - 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-/* Portions copyright Broadcom 2008 */
-
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/amba/bus.h>
-#include <linux/clkdev.h>
-
-#include <mach/csp/mm_addr.h>
-#include <mach/hardware.h>
-#include <linux/io.h>
-#include <asm/irq.h>
-#include <asm/hardware/arm_timer.h>
-#include <asm/hardware/timer-sp.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
-
-#include <cfg_global.h>
-
-#include "clock.h"
-
-#include <csp/secHw.h>
-#include <mach/csp/secHw_def.h>
-#include <mach/csp/chipcHw_inline.h>
-#include <mach/csp/tmrHw_reg.h>
-
-static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL);
-static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL);
-
-static struct clk pll1_clk = {
-       .name = "PLL1",
-       .type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL1,
-       .rate_hz = 2000000000,
-       .use_cnt = 7,
-};
-
-static struct clk uart_clk = {
-       .name = "UART",
-       .type = CLK_TYPE_PROGRAMMABLE,
-       .csp_id = chipcHw_CLOCK_UART,
-       .rate_hz = HW_CFG_UART_CLK_HZ,
-       .parent = &pll1_clk,
-};
-
-static struct clk dummy_apb_pclk = {
-       .name = "BUSCLK",
-       .type = CLK_TYPE_PRIMARY,
-       .mode = CLK_MODE_XTAL,
-};
-
-/* Timer 0 - 25 MHz, Timer3 at bus clock rate, typically  150-166 MHz */
-#if defined(CONFIG_ARCH_FPGA11107)
-/* fpga cpu/bus are currently 30 times slower so scale frequency as well to */
-/* slow down Linux's sense of time */
-#define TIMER0_FREQUENCY_MHZ  (tmrHw_LOW_FREQUENCY_MHZ * 30)
-#define TIMER1_FREQUENCY_MHZ  (tmrHw_LOW_FREQUENCY_MHZ * 30)
-#define TIMER3_FREQUENCY_MHZ  (tmrHw_HIGH_FREQUENCY_MHZ * 30)
-#define TIMER3_FREQUENCY_KHZ   (tmrHw_HIGH_FREQUENCY_HZ / 1000 * 30)
-#else
-#define TIMER0_FREQUENCY_MHZ  tmrHw_LOW_FREQUENCY_MHZ
-#define TIMER1_FREQUENCY_MHZ  tmrHw_LOW_FREQUENCY_MHZ
-#define TIMER3_FREQUENCY_MHZ  tmrHw_HIGH_FREQUENCY_MHZ
-#define TIMER3_FREQUENCY_KHZ  (tmrHw_HIGH_FREQUENCY_HZ / 1000)
-#endif
-
-static struct clk sp804_timer012_clk = {
-       .name = "sp804-timer-0,1,2",
-       .type = CLK_TYPE_PRIMARY,
-       .mode = CLK_MODE_XTAL,
-       .rate_hz = TIMER1_FREQUENCY_MHZ * 1000000,
-};
-
-static struct clk sp804_timer3_clk = {
-       .name = "sp804-timer-3",
-       .type = CLK_TYPE_PRIMARY,
-       .mode = CLK_MODE_XTAL,
-       .rate_hz = TIMER3_FREQUENCY_KHZ * 1000,
-};
-
-static struct clk_lookup lookups[] = {
-       {                       /* Bus clock */
-               .con_id = "apb_pclk",
-               .clk = &dummy_apb_pclk,
-       }, {                    /* UART0 */
-               .dev_id = "uarta",
-               .clk = &uart_clk,
-       }, {                    /* UART1 */
-               .dev_id = "uartb",
-               .clk = &uart_clk,
-       }, {                    /* SP804 timer 0 */
-               .dev_id = "sp804",
-               .con_id = "timer0",
-               .clk = &sp804_timer012_clk,
-       }, {                    /* SP804 timer 1 */
-               .dev_id = "sp804",
-               .con_id = "timer1",
-               .clk = &sp804_timer012_clk,
-       }, {                    /* SP804 timer 3 */
-               .dev_id = "sp804",
-               .con_id = "timer3",
-               .clk = &sp804_timer3_clk,
-       }
-};
-
-static struct amba_device *amba_devs[] __initdata = {
-       &uartA_device,
-       &uartB_device,
-};
-
-void __init bcmring_amba_init(void)
-{
-       int i;
-       u32 bus_clock;
-
-/* Linux is run initially in non-secure mode. Secure peripherals */
-/* generate FIQ, and must be handled in secure mode. Until we have */
-/* a linux security monitor implementation, keep everything in */
-/* non-secure mode. */
-       chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_SPU);
-       secHw_setUnsecure(secHw_BLK_MASK_CHIP_CONTROL |
-                         secHw_BLK_MASK_KEY_SCAN |
-                         secHw_BLK_MASK_TOUCH_SCREEN |
-                         secHw_BLK_MASK_UART0 |
-                         secHw_BLK_MASK_UART1 |
-                         secHw_BLK_MASK_WATCHDOG |
-                         secHw_BLK_MASK_SPUM |
-                         secHw_BLK_MASK_DDR2 |
-                         secHw_BLK_MASK_SPU |
-                         secHw_BLK_MASK_PKA |
-                         secHw_BLK_MASK_RNG |
-                         secHw_BLK_MASK_RTC |
-                         secHw_BLK_MASK_OTP |
-                         secHw_BLK_MASK_BOOT |
-                         secHw_BLK_MASK_MPU |
-                         secHw_BLK_MASK_TZCTRL | secHw_BLK_MASK_INTR);
-
-       /* Only the devices attached to the AMBA bus are enabled just before the bus is */
-       /* scanned and the drivers are loaded. The clocks need to be on for the AMBA bus */
-       /* driver to access these blocks. The bus is probed, and the drivers are loaded. */
-       /* FIXME Need to remove enable of PIF once CLCD clock enable used properly in FPGA. */
-       bus_clock = chipcHw_REG_BUS_CLOCK_GE
-           | chipcHw_REG_BUS_CLOCK_SDIO0 | chipcHw_REG_BUS_CLOCK_SDIO1;
-
-       chipcHw_busInterfaceClockEnable(bus_clock);
-
-       for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
-               struct amba_device *d = amba_devs[i];
-               amba_device_register(d, &iomem_resource);
-       }
-}
-
-/*
- * Where is the timer (VA)?
- */
-#define TIMER0_VA_BASE         ((void __iomem *)MM_IO_BASE_TMR)
-#define TIMER1_VA_BASE         ((void __iomem *)(MM_IO_BASE_TMR + 0x20))
-#define TIMER2_VA_BASE         ((void __iomem *)(MM_IO_BASE_TMR + 0x40))
-#define TIMER3_VA_BASE          ((void __iomem *)(MM_IO_BASE_TMR + 0x60))
-
-static int __init bcmring_clocksource_init(void)
-{
-       /* setup timer1 as free-running clocksource */
-       sp804_clocksource_init(TIMER1_VA_BASE, "timer1");
-
-       /* setup timer3 as free-running clocksource */
-       sp804_clocksource_init(TIMER3_VA_BASE, "timer3");
-
-       return 0;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init bcmring_init_timer(void)
-{
-       printk(KERN_INFO "bcmring_init_timer\n");
-       /*
-        * Initialise to a known state (all timers off)
-        */
-       writel(0, TIMER0_VA_BASE + TIMER_CTRL);
-       writel(0, TIMER1_VA_BASE + TIMER_CTRL);
-       writel(0, TIMER2_VA_BASE + TIMER_CTRL);
-       writel(0, TIMER3_VA_BASE + TIMER_CTRL);
-
-       /*
-        * Make irqs happen for the system timer
-        */
-       bcmring_clocksource_init();
-
-       sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
-}
-
-struct sys_timer bcmring_timer = {
-       .init = bcmring_init_timer,
-};
-
-void __init bcmring_init_early(void)
-{
-       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-}
diff --git a/arch/arm/mach-bcmring/core.h b/arch/arm/mach-bcmring/core.h
deleted file mode 100644 (file)
index e0e02c4..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- *  linux/arch/arm/mach-versatile/core.h
- *
- *  Copyright (C) 2004 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-/* Portions copyright Broadcom 2008 */
-#ifndef __ASM_ARCH_BCMRING_H
-#define __ASM_ARCH_BCMRING_H
-
-void __init bcmring_amba_init(void);
-void __init bcmring_map_io(void);
-void __init bcmring_init_irq(void);
-void __init bcmring_init_early(void);
-
-extern struct sys_timer bcmring_timer;
-#endif
diff --git a/arch/arm/mach-bcmring/csp/Makefile b/arch/arm/mach-bcmring/csp/Makefile
deleted file mode 100644 (file)
index 648c037..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-obj-y += dmac/
-obj-y += tmr/
-obj-y += chipc/
diff --git a/arch/arm/mach-bcmring/csp/chipc/Makefile b/arch/arm/mach-bcmring/csp/chipc/Makefile
deleted file mode 100644 (file)
index 6739527..0000000
+++ /dev/null
@@ -1 +0,0 @@
-obj-y += chipcHw.o chipcHw_str.o chipcHw_reset.o chipcHw_init.o
diff --git a/arch/arm/mach-bcmring/csp/chipc/chipcHw.c b/arch/arm/mach-bcmring/csp/chipc/chipcHw.c
deleted file mode 100644 (file)
index 96273ff..0000000
+++ /dev/null
@@ -1,776 +0,0 @@
-/*****************************************************************************
-* Copyright 2003 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*  @file    chipcHw.c
-*
-*  @brief   Low level Various CHIP clock controlling routines
-*
-*  @note
-*
-*   These routines provide basic clock controlling functionality only.
-*/
-/****************************************************************************/
-
-/* ---- Include Files ---------------------------------------------------- */
-
-#include <csp/errno.h>
-#include <csp/stdint.h>
-#include <csp/module.h>
-
-#include <mach/csp/chipcHw_def.h>
-#include <mach/csp/chipcHw_inline.h>
-
-#include <csp/reg.h>
-#include <csp/delay.h>
-
-/* ---- Private Constants and Types --------------------------------------- */
-
-/* VPM alignment algorithm uses this */
-#define MAX_PHASE_ADJUST_COUNT         0xFFFF  /* Max number of times allowed to adjust the phase */
-#define MAX_PHASE_ALIGN_ATTEMPTS       10      /* Max number of attempt to align the phase */
-
-/* Local definition of clock type */
-#define PLL_CLOCK                      1       /* PLL Clock */
-#define NON_PLL_CLOCK                  2       /* Divider clock */
-
-static int chipcHw_divide(int num, int denom)
-    __attribute__ ((section(".aramtext")));
-
-/****************************************************************************/
-/**
-*  @brief   Set clock fequency for miscellaneous configurable clocks
-*
-*  This function sets clock frequency
-*
-*  @return  Configured clock frequency in hertz
-*
-*/
-/****************************************************************************/
-chipcHw_freq chipcHw_getClockFrequency(chipcHw_CLOCK_e clock   /*  [ IN ] Configurable clock */
-    ) {
-       volatile uint32_t *pPLLReg = (uint32_t *) 0x0;
-       volatile uint32_t *pClockCtrl = (uint32_t *) 0x0;
-       volatile uint32_t *pDependentClock = (uint32_t *) 0x0;
-       uint32_t vcoFreqPll1Hz = 0;     /* Effective VCO frequency for PLL1 in Hz */
-       uint32_t vcoFreqPll2Hz = 0;     /* Effective VCO frequency for PLL2 in Hz */
-       uint32_t dependentClockType = 0;
-       uint32_t vcoHz = 0;
-
-       /* Get VCO frequencies */
-       if ((pChipcHw->PLLPreDivider & chipcHw_REG_PLL_PREDIVIDER_NDIV_MODE_MASK) != chipcHw_REG_PLL_PREDIVIDER_NDIV_MODE_INTEGER) {
-               uint64_t adjustFreq = 0;
-
-               vcoFreqPll1Hz = chipcHw_XTAL_FREQ_Hz *
-                   chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) *
-                   ((pChipcHw->PLLPreDivider & chipcHw_REG_PLL_PREDIVIDER_NDIV_MASK) >>
-                    chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT);
-
-               /* Adjusted frequency due to chipcHw_REG_PLL_DIVIDER_NDIV_f_SS */
-               adjustFreq = (uint64_t) chipcHw_XTAL_FREQ_Hz *
-                       (uint64_t) chipcHw_REG_PLL_DIVIDER_NDIV_f_SS *
-                       chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, (chipcHw_REG_PLL_PREDIVIDER_P2 * (uint64_t) chipcHw_REG_PLL_DIVIDER_FRAC));
-               vcoFreqPll1Hz += (uint32_t) adjustFreq;
-       } else {
-               vcoFreqPll1Hz = chipcHw_XTAL_FREQ_Hz *
-                   chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) *
-                   ((pChipcHw->PLLPreDivider & chipcHw_REG_PLL_PREDIVIDER_NDIV_MASK) >>
-                    chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT);
-       }
-       vcoFreqPll2Hz =
-           chipcHw_XTAL_FREQ_Hz *
-                chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) *
-           ((pChipcHw->PLLPreDivider2 & chipcHw_REG_PLL_PREDIVIDER_NDIV_MASK) >>
-            chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT);
-
-       switch (clock) {
-       case chipcHw_CLOCK_DDR:
-               pPLLReg = &pChipcHw->DDRClock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_ARM:
-               pPLLReg = &pChipcHw->ARMClock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_ESW:
-               pPLLReg = &pChipcHw->ESWClock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_VPM:
-               pPLLReg = &pChipcHw->VPMClock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_ESW125:
-               pPLLReg = &pChipcHw->ESW125Clock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_UART:
-               pPLLReg = &pChipcHw->UARTClock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_SDIO0:
-               pPLLReg = &pChipcHw->SDIO0Clock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_SDIO1:
-               pPLLReg = &pChipcHw->SDIO1Clock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_SPI:
-               pPLLReg = &pChipcHw->SPIClock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_ETM:
-               pPLLReg = &pChipcHw->ETMClock;
-               vcoHz = vcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_USB:
-               pPLLReg = &pChipcHw->USBClock;
-               vcoHz = vcoFreqPll2Hz;
-               break;
-       case chipcHw_CLOCK_LCD:
-               pPLLReg = &pChipcHw->LCDClock;
-               vcoHz = vcoFreqPll2Hz;
-               break;
-       case chipcHw_CLOCK_APM:
-               pPLLReg = &pChipcHw->APMClock;
-               vcoHz = vcoFreqPll2Hz;
-               break;
-       case chipcHw_CLOCK_BUS:
-               pClockCtrl = &pChipcHw->ACLKClock;
-               pDependentClock = &pChipcHw->ARMClock;
-               vcoHz = vcoFreqPll1Hz;
-               dependentClockType = PLL_CLOCK;
-               break;
-       case chipcHw_CLOCK_OTP:
-               pClockCtrl = &pChipcHw->OTPClock;
-               break;
-       case chipcHw_CLOCK_I2C:
-               pClockCtrl = &pChipcHw->I2CClock;
-               break;
-       case chipcHw_CLOCK_I2S0:
-               pClockCtrl = &pChipcHw->I2S0Clock;
-               break;
-       case chipcHw_CLOCK_RTBUS:
-               pClockCtrl = &pChipcHw->RTBUSClock;
-               pDependentClock = &pChipcHw->ACLKClock;
-               dependentClockType = NON_PLL_CLOCK;
-               break;
-       case chipcHw_CLOCK_APM100:
-               pClockCtrl = &pChipcHw->APM100Clock;
-               pDependentClock = &pChipcHw->APMClock;
-               vcoHz = vcoFreqPll2Hz;
-               dependentClockType = PLL_CLOCK;
-               break;
-       case chipcHw_CLOCK_TSC:
-               pClockCtrl = &pChipcHw->TSCClock;
-               break;
-       case chipcHw_CLOCK_LED:
-               pClockCtrl = &pChipcHw->LEDClock;
-               break;
-       case chipcHw_CLOCK_I2S1:
-               pClockCtrl = &pChipcHw->I2S1Clock;
-               break;
-       }
-
-       if (pPLLReg) {
-               /* Obtain PLL clock frequency */
-               if (*pPLLReg & chipcHw_REG_PLL_CLOCK_BYPASS_SELECT) {
-                       /* Return crystal clock frequency when bypassed */
-                       return chipcHw_XTAL_FREQ_Hz;
-               } else if (clock == chipcHw_CLOCK_DDR) {
-                       /* DDR frequency is configured in PLLDivider register */
-                       return chipcHw_divide (vcoHz, (((pChipcHw->PLLDivider & 0xFF000000) >> 24) ? ((pChipcHw->PLLDivider & 0xFF000000) >> 24) : 256));
-               } else {
-                       /* From chip revision number B0, LCD clock is internally divided by 2 */
-                       if ((pPLLReg == &pChipcHw->LCDClock) && (chipcHw_getChipRevisionNumber() != chipcHw_REV_NUMBER_A0)) {
-                               vcoHz >>= 1;
-                       }
-                       /* Obtain PLL clock frequency using VCO dividers */
-                       return chipcHw_divide(vcoHz, ((*pPLLReg & chipcHw_REG_PLL_CLOCK_MDIV_MASK) ? (*pPLLReg & chipcHw_REG_PLL_CLOCK_MDIV_MASK) : 256));
-               }
-       } else if (pClockCtrl) {
-               /* Obtain divider clock frequency */
-               uint32_t div;
-               uint32_t freq = 0;
-
-               if (*pClockCtrl & chipcHw_REG_DIV_CLOCK_BYPASS_SELECT) {
-                       /* Return crystal clock frequency when bypassed */
-                       return chipcHw_XTAL_FREQ_Hz;
-               } else if (pDependentClock) {
-                       /* Identify the dependent clock frequency */
-                       switch (dependentClockType) {
-                       case PLL_CLOCK:
-                               if (*pDependentClock & chipcHw_REG_PLL_CLOCK_BYPASS_SELECT) {
-                                       /* Use crystal clock frequency when dependent PLL clock is bypassed */
-                                       freq = chipcHw_XTAL_FREQ_Hz;
-                               } else {
-                                       /* Obtain PLL clock frequency using VCO dividers */
-                                       div = *pDependentClock & chipcHw_REG_PLL_CLOCK_MDIV_MASK;
-                                       freq = div ? chipcHw_divide(vcoHz, div) : 0;
-                               }
-                               break;
-                       case NON_PLL_CLOCK:
-                               if (pDependentClock == (uint32_t *) &pChipcHw->ACLKClock) {
-                                       freq = chipcHw_getClockFrequency (chipcHw_CLOCK_BUS);
-                               } else {
-                                       if (*pDependentClock & chipcHw_REG_DIV_CLOCK_BYPASS_SELECT) {
-                                               /* Use crystal clock frequency when dependent divider clock is bypassed */
-                                               freq = chipcHw_XTAL_FREQ_Hz;
-                                       } else {
-                                               /* Obtain divider clock frequency using XTAL dividers */
-                                               div = *pDependentClock & chipcHw_REG_DIV_CLOCK_DIV_MASK;
-                                               freq = chipcHw_divide (chipcHw_XTAL_FREQ_Hz, (div ? div : 256));
-                                       }
-                               }
-                               break;
-                       }
-               } else {
-                       /* Dependent on crystal clock */
-                       freq = chipcHw_XTAL_FREQ_Hz;
-               }
-
-               div = *pClockCtrl & chipcHw_REG_DIV_CLOCK_DIV_MASK;
-               return chipcHw_divide(freq, (div ? div : 256));
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Set clock fequency for miscellaneous configurable clocks
-*
-*  This function sets clock frequency
-*
-*  @return  Configured clock frequency in Hz
-*
-*/
-/****************************************************************************/
-chipcHw_freq chipcHw_setClockFrequency(chipcHw_CLOCK_e clock,  /*  [ IN ] Configurable clock */
-                                      uint32_t freq    /*  [ IN ] Clock frequency in Hz */
-    ) {
-       volatile uint32_t *pPLLReg = (uint32_t *) 0x0;
-       volatile uint32_t *pClockCtrl = (uint32_t *) 0x0;
-       volatile uint32_t *pDependentClock = (uint32_t *) 0x0;
-       uint32_t vcoFreqPll1Hz = 0;     /* Effective VCO frequency for PLL1 in Hz */
-       uint32_t desVcoFreqPll1Hz = 0;  /* Desired VCO frequency for PLL1 in Hz */
-       uint32_t vcoFreqPll2Hz = 0;     /* Effective VCO frequency for PLL2 in Hz */
-       uint32_t dependentClockType = 0;
-       uint32_t vcoHz = 0;
-       uint32_t desVcoHz = 0;
-
-       /* Get VCO frequencies */
-       if ((pChipcHw->PLLPreDivider & chipcHw_REG_PLL_PREDIVIDER_NDIV_MODE_MASK) != chipcHw_REG_PLL_PREDIVIDER_NDIV_MODE_INTEGER) {
-               uint64_t adjustFreq = 0;
-
-               vcoFreqPll1Hz = chipcHw_XTAL_FREQ_Hz *
-                   chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) *
-                   ((pChipcHw->PLLPreDivider & chipcHw_REG_PLL_PREDIVIDER_NDIV_MASK) >>
-                    chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT);
-
-               /* Adjusted frequency due to chipcHw_REG_PLL_DIVIDER_NDIV_f_SS */
-               adjustFreq = (uint64_t) chipcHw_XTAL_FREQ_Hz *
-                       (uint64_t) chipcHw_REG_PLL_DIVIDER_NDIV_f_SS *
-                       chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, (chipcHw_REG_PLL_PREDIVIDER_P2 * (uint64_t) chipcHw_REG_PLL_DIVIDER_FRAC));
-               vcoFreqPll1Hz += (uint32_t) adjustFreq;
-
-               /* Desired VCO frequency */
-               desVcoFreqPll1Hz = chipcHw_XTAL_FREQ_Hz *
-                   chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) *
-                   (((pChipcHw->PLLPreDivider & chipcHw_REG_PLL_PREDIVIDER_NDIV_MASK) >>
-                     chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT) + 1);
-       } else {
-               vcoFreqPll1Hz = desVcoFreqPll1Hz = chipcHw_XTAL_FREQ_Hz *
-                   chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) *
-                   ((pChipcHw->PLLPreDivider & chipcHw_REG_PLL_PREDIVIDER_NDIV_MASK) >>
-                    chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT);
-       }
-       vcoFreqPll2Hz = chipcHw_XTAL_FREQ_Hz * chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) *
-           ((pChipcHw->PLLPreDivider2 & chipcHw_REG_PLL_PREDIVIDER_NDIV_MASK) >>
-            chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT);
-
-       switch (clock) {
-       case chipcHw_CLOCK_DDR:
-               /* Configure the DDR_ctrl:BUS ratio settings */
-               {
-                       REG_LOCAL_IRQ_SAVE;
-                       /* Dvide DDR_phy by two to obtain DDR_ctrl clock */
-                       pChipcHw->DDRClock = (pChipcHw->DDRClock & ~chipcHw_REG_PLL_CLOCK_TO_BUS_RATIO_MASK) | ((((freq / 2) / chipcHw_getClockFrequency(chipcHw_CLOCK_BUS)) - 1)
-                               << chipcHw_REG_PLL_CLOCK_TO_BUS_RATIO_SHIFT);
-                       REG_LOCAL_IRQ_RESTORE;
-               }
-               pPLLReg = &pChipcHw->DDRClock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_ARM:
-               pPLLReg = &pChipcHw->ARMClock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_ESW:
-               pPLLReg = &pChipcHw->ESWClock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_VPM:
-               /* Configure the VPM:BUS ratio settings */
-               {
-                       REG_LOCAL_IRQ_SAVE;
-                       pChipcHw->VPMClock = (pChipcHw->VPMClock & ~chipcHw_REG_PLL_CLOCK_TO_BUS_RATIO_MASK) | ((chipcHw_divide (freq, chipcHw_getClockFrequency(chipcHw_CLOCK_BUS)) - 1)
-                               << chipcHw_REG_PLL_CLOCK_TO_BUS_RATIO_SHIFT);
-                       REG_LOCAL_IRQ_RESTORE;
-               }
-               pPLLReg = &pChipcHw->VPMClock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_ESW125:
-               pPLLReg = &pChipcHw->ESW125Clock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_UART:
-               pPLLReg = &pChipcHw->UARTClock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_SDIO0:
-               pPLLReg = &pChipcHw->SDIO0Clock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_SDIO1:
-               pPLLReg = &pChipcHw->SDIO1Clock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_SPI:
-               pPLLReg = &pChipcHw->SPIClock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_ETM:
-               pPLLReg = &pChipcHw->ETMClock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               break;
-       case chipcHw_CLOCK_USB:
-               pPLLReg = &pChipcHw->USBClock;
-               vcoHz = vcoFreqPll2Hz;
-               desVcoHz = vcoFreqPll2Hz;
-               break;
-       case chipcHw_CLOCK_LCD:
-               pPLLReg = &pChipcHw->LCDClock;
-               vcoHz = vcoFreqPll2Hz;
-               desVcoHz = vcoFreqPll2Hz;
-               break;
-       case chipcHw_CLOCK_APM:
-               pPLLReg = &pChipcHw->APMClock;
-               vcoHz = vcoFreqPll2Hz;
-               desVcoHz = vcoFreqPll2Hz;
-               break;
-       case chipcHw_CLOCK_BUS:
-               pClockCtrl = &pChipcHw->ACLKClock;
-               pDependentClock = &pChipcHw->ARMClock;
-               vcoHz = vcoFreqPll1Hz;
-               desVcoHz = desVcoFreqPll1Hz;
-               dependentClockType = PLL_CLOCK;
-               break;
-       case chipcHw_CLOCK_OTP:
-               pClockCtrl = &pChipcHw->OTPClock;
-               break;
-       case chipcHw_CLOCK_I2C:
-               pClockCtrl = &pChipcHw->I2CClock;
-               break;
-       case chipcHw_CLOCK_I2S0:
-               pClockCtrl = &pChipcHw->I2S0Clock;
-               break;
-       case chipcHw_CLOCK_RTBUS:
-               pClockCtrl = &pChipcHw->RTBUSClock;
-               pDependentClock = &pChipcHw->ACLKClock;
-               dependentClockType = NON_PLL_CLOCK;
-               break;
-       case chipcHw_CLOCK_APM100:
-               pClockCtrl = &pChipcHw->APM100Clock;
-               pDependentClock = &pChipcHw->APMClock;
-               vcoHz = vcoFreqPll2Hz;
-               desVcoHz = vcoFreqPll2Hz;
-               dependentClockType = PLL_CLOCK;
-               break;
-       case chipcHw_CLOCK_TSC:
-               pClockCtrl = &pChipcHw->TSCClock;
-               break;
-       case chipcHw_CLOCK_LED:
-               pClockCtrl = &pChipcHw->LEDClock;
-               break;
-       case chipcHw_CLOCK_I2S1:
-               pClockCtrl = &pChipcHw->I2S1Clock;
-               break;
-       }
-
-       if (pPLLReg) {
-               /* Select XTAL as bypass source */
-               reg32_modify_and(pPLLReg, ~chipcHw_REG_PLL_CLOCK_SOURCE_GPIO);
-               reg32_modify_or(pPLLReg, chipcHw_REG_PLL_CLOCK_BYPASS_SELECT);
-               /* For DDR settings use only the PLL divider clock */
-               if (pPLLReg == &pChipcHw->DDRClock) {
-                       /* Set M1DIV for PLL1, which controls the DDR clock */
-                       reg32_write(&pChipcHw->PLLDivider, (pChipcHw->PLLDivider & 0x00FFFFFF) | ((chipcHw_REG_PLL_DIVIDER_MDIV (desVcoHz, freq)) << 24));
-                       /* Calculate expected frequency */
-                       freq = chipcHw_divide(vcoHz, (((pChipcHw->PLLDivider & 0xFF000000) >> 24) ? ((pChipcHw->PLLDivider & 0xFF000000) >> 24) : 256));
-               } else {
-                       /* From chip revision number B0, LCD clock is internally divided by 2 */
-                       if ((pPLLReg == &pChipcHw->LCDClock) && (chipcHw_getChipRevisionNumber() != chipcHw_REV_NUMBER_A0)) {
-                               desVcoHz >>= 1;
-                               vcoHz >>= 1;
-                       }
-                       /* Set MDIV to change the frequency */
-                       reg32_modify_and(pPLLReg, ~(chipcHw_REG_PLL_CLOCK_MDIV_MASK));
-                       reg32_modify_or(pPLLReg, chipcHw_REG_PLL_DIVIDER_MDIV(desVcoHz, freq));
-                       /* Calculate expected frequency */
-                       freq = chipcHw_divide(vcoHz, ((*(pPLLReg) & chipcHw_REG_PLL_CLOCK_MDIV_MASK) ? (*(pPLLReg) & chipcHw_REG_PLL_CLOCK_MDIV_MASK) : 256));
-               }
-               /* Wait for for atleast 200ns as per the protocol to change frequency */
-               udelay(1);
-               /* Do not bypass */
-               reg32_modify_and(pPLLReg, ~chipcHw_REG_PLL_CLOCK_BYPASS_SELECT);
-               /* Return the configured frequency */
-               return freq;
-       } else if (pClockCtrl) {
-               uint32_t divider = 0;
-
-               /* Divider clock should not be bypassed  */
-               reg32_modify_and(pClockCtrl,
-                                ~chipcHw_REG_DIV_CLOCK_BYPASS_SELECT);
-
-               /* Identify the clock source */
-               if (pDependentClock) {
-                       switch (dependentClockType) {
-                       case PLL_CLOCK:
-                               divider = chipcHw_divide(chipcHw_divide (desVcoHz, (*pDependentClock & chipcHw_REG_PLL_CLOCK_MDIV_MASK)), freq);
-                               break;
-                       case NON_PLL_CLOCK:
-                               {
-                                       uint32_t sourceClock = 0;
-
-                                       if (pDependentClock == (uint32_t *) &pChipcHw->ACLKClock) {
-                                               sourceClock = chipcHw_getClockFrequency (chipcHw_CLOCK_BUS);
-                                       } else {
-                                               uint32_t div = *pDependentClock & chipcHw_REG_DIV_CLOCK_DIV_MASK;
-                                               sourceClock = chipcHw_divide (chipcHw_XTAL_FREQ_Hz, ((div) ? div : 256));
-                                       }
-                                       divider = chipcHw_divide(sourceClock, freq);
-                               }
-                               break;
-                       }
-               } else {
-                       divider = chipcHw_divide(chipcHw_XTAL_FREQ_Hz, freq);
-               }
-
-               if (divider) {
-                       REG_LOCAL_IRQ_SAVE;
-                       /* Set the divider to obtain the required frequency */
-                       *pClockCtrl = (*pClockCtrl & (~chipcHw_REG_DIV_CLOCK_DIV_MASK)) | (((divider > 256) ? chipcHw_REG_DIV_CLOCK_DIV_256 : divider) & chipcHw_REG_DIV_CLOCK_DIV_MASK);
-                       REG_LOCAL_IRQ_RESTORE;
-                       return freq;
-               }
-       }
-
-       return 0;
-}
-
-EXPORT_SYMBOL(chipcHw_setClockFrequency);
-
-/****************************************************************************/
-/**
-*  @brief   Set VPM clock in sync with BUS clock for Chip Rev #A0
-*
-*  This function does the phase adjustment between VPM and BUS clock
-*
-*  @return >= 0 : On success (# of adjustment required)
-*            -1 : On failure
-*
-*/
-/****************************************************************************/
-static int vpmPhaseAlignA0(void)
-{
-       uint32_t phaseControl;
-       uint32_t phaseValue;
-       uint32_t prevPhaseComp;
-       int iter = 0;
-       int adjustCount = 0;
-       int count = 0;
-
-       for (iter = 0; (iter < MAX_PHASE_ALIGN_ATTEMPTS) && (adjustCount < MAX_PHASE_ADJUST_COUNT); iter++) {
-               phaseControl = (pChipcHw->VPMClock & chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK) >> chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT;
-               phaseValue = 0;
-               prevPhaseComp = 0;
-
-               /* Step 1: Look for falling PH_COMP transition */
-
-               /* Read the contents of VPM Clock resgister */
-               phaseValue = pChipcHw->VPMClock;
-               do {
-                       /* Store previous value of phase comparator */
-                       prevPhaseComp = phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP;
-                       /* Change the value of PH_CTRL. */
-                       reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)) | (phaseControl << chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT));
-                       /* Wait atleast 20 ns */
-                       udelay(1);
-                       /* Toggle the LOAD_CH after phase control is written. */
-                       pChipcHw->VPMClock ^= chipcHw_REG_PLL_CLOCK_PHASE_UPDATE_ENABLE;
-                       /* Read the contents of  VPM Clock resgister. */
-                       phaseValue = pChipcHw->VPMClock;
-
-                       if ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0x0) {
-                               phaseControl = (0x3F & (phaseControl - 1));
-                       } else {
-                               /* Increment to the Phase count value for next write, if Phase is not stable. */
-                               phaseControl = (0x3F & (phaseControl + 1));
-                       }
-                       /* Count number of adjustment made */
-                       adjustCount++;
-               } while (((prevPhaseComp == (phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP)) || /* Look for a transition */
-                         ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) != 0x0)) &&  /* Look for a falling edge */
-                        (adjustCount < MAX_PHASE_ADJUST_COUNT) /* Do not exceed the limit while trying */
-                   );
-
-               if (adjustCount >= MAX_PHASE_ADJUST_COUNT) {
-                       /* Failed to align VPM phase after MAX_PHASE_ADJUST_COUNT tries */
-                       return -1;
-               }
-
-               /* Step 2: Keep moving forward to make sure falling PH_COMP transition was valid */
-
-               for (count = 0; (count < 5) && ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0); count++) {
-                       phaseControl = (0x3F & (phaseControl + 1));
-                       reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)) | (phaseControl << chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT));
-                       /* Wait atleast 20 ns */
-                       udelay(1);
-                       /* Toggle the LOAD_CH after phase control is written. */
-                       pChipcHw->VPMClock ^= chipcHw_REG_PLL_CLOCK_PHASE_UPDATE_ENABLE;
-                       phaseValue = pChipcHw->VPMClock;
-                       /* Count number of adjustment made */
-                       adjustCount++;
-               }
-
-               if (adjustCount >= MAX_PHASE_ADJUST_COUNT) {
-                       /* Failed to align VPM phase after MAX_PHASE_ADJUST_COUNT tries */
-                       return -1;
-               }
-
-               if (count != 5) {
-                       /* Detected false transition */
-                       continue;
-               }
-
-               /* Step 3: Keep moving backward to make sure falling PH_COMP transition was stable */
-
-               for (count = 0; (count < 3) && ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0); count++) {
-                       phaseControl = (0x3F & (phaseControl - 1));
-                       reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)) | (phaseControl << chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT));
-                       /* Wait atleast 20 ns */
-                       udelay(1);
-                       /* Toggle the LOAD_CH after phase control is written. */
-                       pChipcHw->VPMClock ^= chipcHw_REG_PLL_CLOCK_PHASE_UPDATE_ENABLE;
-                       phaseValue = pChipcHw->VPMClock;
-                       /* Count number of adjustment made */
-                       adjustCount++;
-               }
-
-               if (adjustCount >= MAX_PHASE_ADJUST_COUNT) {
-                       /* Failed to align VPM phase after MAX_PHASE_ADJUST_COUNT tries */
-                       return -1;
-               }
-
-               if (count != 3) {
-                       /* Detected noisy transition */
-                       continue;
-               }
-
-               /* Step 4: Keep moving backward before the original transition took place. */
-
-               for (count = 0; (count < 5); count++) {
-                       phaseControl = (0x3F & (phaseControl - 1));
-                       reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)) | (phaseControl << chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT));
-                       /* Wait atleast 20 ns */
-                       udelay(1);
-                       /* Toggle the LOAD_CH after phase control is written. */
-                       pChipcHw->VPMClock ^= chipcHw_REG_PLL_CLOCK_PHASE_UPDATE_ENABLE;
-                       phaseValue = pChipcHw->VPMClock;
-                       /* Count number of adjustment made */
-                       adjustCount++;
-               }
-
-               if (adjustCount >= MAX_PHASE_ADJUST_COUNT) {
-                       /* Failed to align VPM phase after MAX_PHASE_ADJUST_COUNT tries */
-                       return -1;
-               }
-
-               if ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0) {
-                       /* Detected false transition */
-                       continue;
-               }
-
-               /* Step 5: Re discover the valid transition */
-
-               do {
-                       /* Store previous value of phase comparator */
-                       prevPhaseComp = phaseValue;
-                       /* Change the value of PH_CTRL. */
-                       reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)) | (phaseControl << chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT));
-                       /* Wait atleast 20 ns */
-                       udelay(1);
-                       /* Toggle the LOAD_CH after phase control is written. */
-                       pChipcHw->VPMClock ^=
-                           chipcHw_REG_PLL_CLOCK_PHASE_UPDATE_ENABLE;
-                       /* Read the contents of  VPM Clock resgister. */
-                       phaseValue = pChipcHw->VPMClock;
-
-                       if ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) == 0x0) {
-                               phaseControl = (0x3F & (phaseControl - 1));
-                       } else {
-                               /* Increment to the Phase count value for next write, if Phase is not stable. */
-                               phaseControl = (0x3F & (phaseControl + 1));
-                       }
-
-                       /* Count number of adjustment made */
-                       adjustCount++;
-               } while (((prevPhaseComp == (phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP)) || ((phaseValue & chipcHw_REG_PLL_CLOCK_PHASE_COMP) != 0x0)) && (adjustCount < MAX_PHASE_ADJUST_COUNT));
-
-               if (adjustCount >= MAX_PHASE_ADJUST_COUNT) {
-                       /* Failed to align VPM phase after MAX_PHASE_ADJUST_COUNT tries  */
-                       return -1;
-               } else {
-                       /* Valid phase must have detected */
-                       break;
-               }
-       }
-
-       /* For VPM Phase should be perfectly aligned. */
-       phaseControl = (((pChipcHw->VPMClock >> chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT) - 1) & 0x3F);
-       {
-               REG_LOCAL_IRQ_SAVE;
-
-               pChipcHw->VPMClock = (pChipcHw->VPMClock & ~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK) | (phaseControl << chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT);
-               /* Load new phase value */
-               pChipcHw->VPMClock ^= chipcHw_REG_PLL_CLOCK_PHASE_UPDATE_ENABLE;
-
-               REG_LOCAL_IRQ_RESTORE;
-       }
-       /* Return the status */
-       return (int)adjustCount;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Set VPM clock in sync with BUS clock
-*
-*  This function does the phase adjustment between VPM and BUS clock
-*
-*  @return >= 0 : On success (# of adjustment required)
-*            -1 : On failure
-*
-*/
-/****************************************************************************/
-int chipcHw_vpmPhaseAlign(void)
-{
-
-       if (chipcHw_getChipRevisionNumber() == chipcHw_REV_NUMBER_A0) {
-               return vpmPhaseAlignA0();
-       } else {
-               uint32_t phaseControl = chipcHw_getVpmPhaseControl();
-               uint32_t phaseValue = 0;
-               int adjustCount = 0;
-
-               /* Disable VPM access */
-               pChipcHw->Spare1 &= ~chipcHw_REG_SPARE1_VPM_BUS_ACCESS_ENABLE;
-               /* Disable HW VPM phase alignment  */
-               chipcHw_vpmHwPhaseAlignDisable();
-               /* Enable SW VPM phase alignment  */
-               chipcHw_vpmSwPhaseAlignEnable();
-               /* Adjust VPM phase */
-               while (adjustCount < MAX_PHASE_ADJUST_COUNT) {
-                       phaseValue = chipcHw_getVpmHwPhaseAlignStatus();
-
-                       /* Adjust phase control value */
-                       if (phaseValue > 0xF) {
-                               /* Increment phase control value */
-                               phaseControl++;
-                       } else if (phaseValue < 0xF) {
-                               /* Decrement phase control value */
-                               phaseControl--;
-                       } else {
-                               /* Enable VPM access */
-                               pChipcHw->Spare1 |= chipcHw_REG_SPARE1_VPM_BUS_ACCESS_ENABLE;
-                               /* Return adjust count */
-                               return adjustCount;
-                       }
-                       /* Change the value of PH_CTRL. */
-                       reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)) | (phaseControl << chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_SHIFT));
-                       /* Wait atleast 20 ns */
-                       udelay(1);
-                       /* Toggle the LOAD_CH after phase control is written. */
-                       pChipcHw->VPMClock ^= chipcHw_REG_PLL_CLOCK_PHASE_UPDATE_ENABLE;
-                       /* Count adjustment */
-                       adjustCount++;
-               }
-       }
-
-       /* Disable VPM access */
-       pChipcHw->Spare1 &= ~chipcHw_REG_SPARE1_VPM_BUS_ACCESS_ENABLE;
-       return -1;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Local Divide function
-*
-*  This function does the divide
-*
-*  @return divide value
-*
-*/
-/****************************************************************************/
-static int chipcHw_divide(int num, int denom)
-{
-       int r;
-       int t = 1;
-
-       /* Shift denom and t up to the largest value to optimize algorithm */
-       /* t contains the units of each divide */
-       while ((denom & 0x40000000) == 0) {     /* fails if denom=0 */
-               denom = denom << 1;
-               t = t << 1;
-       }
-
-       /* Initialize the result */
-       r = 0;
-
-       do {
-               /* Determine if there exists a positive remainder */
-               if ((num - denom) >= 0) {
-                       /* Accumlate t to the result and calculate a new remainder */
-                       num = num - denom;
-                       r = r + t;
-               }
-               /* Continue to shift denom and shift t down to 0 */
-               denom = denom >> 1;
-               t = t >> 1;
-       } while (t != 0);
-
-       return r;
-}
diff --git a/arch/arm/mach-bcmring/csp/chipc/chipcHw_init.c b/arch/arm/mach-bcmring/csp/chipc/chipcHw_init.c
deleted file mode 100644 (file)
index 367df75..0000000
+++ /dev/null
@@ -1,293 +0,0 @@
-/*****************************************************************************
-* Copyright 2003 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*  @file    chipcHw_init.c
-*
-*  @brief   Low level CHIPC PLL configuration functions
-*
-*  @note
-*
-*   These routines provide basic PLL controlling functionality only.
-*/
-/****************************************************************************/
-
-/* ---- Include Files ---------------------------------------------------- */
-
-#include <csp/errno.h>
-#include <csp/stdint.h>
-#include <csp/module.h>
-
-#include <mach/csp/chipcHw_def.h>
-#include <mach/csp/chipcHw_inline.h>
-
-#include <csp/reg.h>
-#include <csp/delay.h>
-/* ---- Private Constants and Types --------------------------------------- */
-
-/*
-    Calculation for NDIV_i to obtain VCO frequency
-    -----------------------------------------------
-
-       Freq_vco = Freq_ref * (P2 / P1) * (PLL_NDIV_i + PLL_NDIV_f)
-       for Freq_vco = VCO_FREQ_MHz
-               Freq_ref = chipcHw_XTAL_FREQ_Hz
-               PLL_P1 = PLL_P2 = 1
-               and
-               PLL_NDIV_f = 0
-
-       We get:
-               PLL_NDIV_i = Freq_vco / Freq_ref = VCO_FREQ_MHz / chipcHw_XTAL_FREQ_Hz
-
-    Calculation for PLL MDIV to obtain frequency Freq_x for channel x
-    -----------------------------------------------------------------
-               Freq_x = chipcHw_XTAL_FREQ_Hz * PLL_NDIV_i / PLL_MDIV_x = VCO_FREQ_MHz / PLL_MDIV_x
-
-               PLL_MDIV_x = VCO_FREQ_MHz / Freq_x
-*/
-
-/* ---- Private Variables ------------------------------------------------- */
-/****************************************************************************/
-/**
-*  @brief  Initializes the PLL2
-*
-*  This function initializes the PLL2
-*
-*/
-/****************************************************************************/
-void chipcHw_pll2Enable(uint32_t vcoFreqHz)
-{
-       uint32_t pllPreDivider2 = 0;
-
-       {
-               REG_LOCAL_IRQ_SAVE;
-               pChipcHw->PLLConfig2 =
-                   chipcHw_REG_PLL_CONFIG_D_RESET |
-                   chipcHw_REG_PLL_CONFIG_A_RESET;
-
-               pllPreDivider2 = chipcHw_REG_PLL_PREDIVIDER_POWER_DOWN |
-                   chipcHw_REG_PLL_PREDIVIDER_NDIV_MODE_INTEGER |
-                   (chipcHw_REG_PLL_PREDIVIDER_NDIV_i(vcoFreqHz) <<
-                    chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT) |
-                   (chipcHw_REG_PLL_PREDIVIDER_P1 <<
-                    chipcHw_REG_PLL_PREDIVIDER_P1_SHIFT) |
-                   (chipcHw_REG_PLL_PREDIVIDER_P2 <<
-                    chipcHw_REG_PLL_PREDIVIDER_P2_SHIFT);
-
-               /* Enable CHIPC registers to control the PLL */
-               pChipcHw->PLLStatus |= chipcHw_REG_PLL_STATUS_CONTROL_ENABLE;
-
-               /* Set pre divider to get desired VCO frequency */
-               pChipcHw->PLLPreDivider2 = pllPreDivider2;
-               /* Set NDIV Frac */
-               pChipcHw->PLLDivider2 = chipcHw_REG_PLL_DIVIDER_NDIV_f;
-
-               /* This has to be removed once the default values are fixed for PLL2. */
-               pChipcHw->PLLControl12 = 0x38000700;
-               pChipcHw->PLLControl22 = 0x00000015;
-
-               /* Reset PLL2 */
-               if (vcoFreqHz > chipcHw_REG_PLL_CONFIG_VCO_SPLIT_FREQ) {
-                       pChipcHw->PLLConfig2 = chipcHw_REG_PLL_CONFIG_D_RESET |
-                           chipcHw_REG_PLL_CONFIG_A_RESET |
-                           chipcHw_REG_PLL_CONFIG_VCO_1601_3200 |
-                           chipcHw_REG_PLL_CONFIG_POWER_DOWN;
-               } else {
-                       pChipcHw->PLLConfig2 = chipcHw_REG_PLL_CONFIG_D_RESET |
-                           chipcHw_REG_PLL_CONFIG_A_RESET |
-                           chipcHw_REG_PLL_CONFIG_VCO_800_1600 |
-                           chipcHw_REG_PLL_CONFIG_POWER_DOWN;
-               }
-               REG_LOCAL_IRQ_RESTORE;
-       }
-
-       /* Insert certain amount of delay before deasserting ARESET. */
-       udelay(1);
-
-       {
-               REG_LOCAL_IRQ_SAVE;
-               /* Remove analog reset and Power on the PLL */
-               pChipcHw->PLLConfig2 &=
-                   ~(chipcHw_REG_PLL_CONFIG_A_RESET |
-                     chipcHw_REG_PLL_CONFIG_POWER_DOWN);
-
-               REG_LOCAL_IRQ_RESTORE;
-
-       }
-
-       /* Wait until PLL is locked */
-       while (!(pChipcHw->PLLStatus2 & chipcHw_REG_PLL_STATUS_LOCKED))
-               ;
-
-       {
-               REG_LOCAL_IRQ_SAVE;
-               /* Remove digital reset */
-               pChipcHw->PLLConfig2 &= ~chipcHw_REG_PLL_CONFIG_D_RESET;
-
-               REG_LOCAL_IRQ_RESTORE;
-       }
-}
-
-EXPORT_SYMBOL(chipcHw_pll2Enable);
-
-/****************************************************************************/
-/**
-*  @brief  Initializes the PLL1
-*
-*  This function initializes the PLL1
-*
-*/
-/****************************************************************************/
-void chipcHw_pll1Enable(uint32_t vcoFreqHz, chipcHw_SPREAD_SPECTRUM_e ssSupport)
-{
-       uint32_t pllPreDivider = 0;
-
-       {
-               REG_LOCAL_IRQ_SAVE;
-
-               pChipcHw->PLLConfig =
-                   chipcHw_REG_PLL_CONFIG_D_RESET |
-                   chipcHw_REG_PLL_CONFIG_A_RESET;
-               /* Setting VCO frequency */
-               if (ssSupport == chipcHw_SPREAD_SPECTRUM_ALLOW) {
-                       pllPreDivider =
-                           chipcHw_REG_PLL_PREDIVIDER_NDIV_MODE_MASH_1_8 |
-                           ((chipcHw_REG_PLL_PREDIVIDER_NDIV_i(vcoFreqHz) -
-                             1) << chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT) |
-                           (chipcHw_REG_PLL_PREDIVIDER_P1 <<
-                            chipcHw_REG_PLL_PREDIVIDER_P1_SHIFT) |
-                           (chipcHw_REG_PLL_PREDIVIDER_P2 <<
-                            chipcHw_REG_PLL_PREDIVIDER_P2_SHIFT);
-               } else {
-                       pllPreDivider = chipcHw_REG_PLL_PREDIVIDER_POWER_DOWN |
-                           chipcHw_REG_PLL_PREDIVIDER_NDIV_MODE_INTEGER |
-                           (chipcHw_REG_PLL_PREDIVIDER_NDIV_i(vcoFreqHz) <<
-                            chipcHw_REG_PLL_PREDIVIDER_NDIV_SHIFT) |
-                           (chipcHw_REG_PLL_PREDIVIDER_P1 <<
-                            chipcHw_REG_PLL_PREDIVIDER_P1_SHIFT) |
-                           (chipcHw_REG_PLL_PREDIVIDER_P2 <<
-                            chipcHw_REG_PLL_PREDIVIDER_P2_SHIFT);
-               }
-
-               /* Enable CHIPC registers to control the PLL */
-               pChipcHw->PLLStatus |= chipcHw_REG_PLL_STATUS_CONTROL_ENABLE;
-
-               /* Set pre divider to get desired VCO frequency */
-               pChipcHw->PLLPreDivider = pllPreDivider;
-               /* Set NDIV Frac */
-               if (ssSupport == chipcHw_SPREAD_SPECTRUM_ALLOW) {
-                       pChipcHw->PLLDivider = chipcHw_REG_PLL_DIVIDER_M1DIV |
-                           chipcHw_REG_PLL_DIVIDER_NDIV_f_SS;
-               } else {
-                       pChipcHw->PLLDivider = chipcHw_REG_PLL_DIVIDER_M1DIV |
-                           chipcHw_REG_PLL_DIVIDER_NDIV_f;
-               }
-
-               /* Reset PLL1 */
-               if (vcoFreqHz > chipcHw_REG_PLL_CONFIG_VCO_SPLIT_FREQ) {
-                       pChipcHw->PLLConfig = chipcHw_REG_PLL_CONFIG_D_RESET |
-                           chipcHw_REG_PLL_CONFIG_A_RESET |
-                           chipcHw_REG_PLL_CONFIG_VCO_1601_3200 |
-                           chipcHw_REG_PLL_CONFIG_POWER_DOWN;
-               } else {
-                       pChipcHw->PLLConfig = chipcHw_REG_PLL_CONFIG_D_RESET |
-                           chipcHw_REG_PLL_CONFIG_A_RESET |
-                           chipcHw_REG_PLL_CONFIG_VCO_800_1600 |
-                           chipcHw_REG_PLL_CONFIG_POWER_DOWN;
-               }
-
-               REG_LOCAL_IRQ_RESTORE;
-
-               /* Insert certain amount of delay before deasserting ARESET. */
-               udelay(1);
-
-               {
-                       REG_LOCAL_IRQ_SAVE;
-                       /* Remove analog reset and Power on the PLL */
-                       pChipcHw->PLLConfig &=
-                           ~(chipcHw_REG_PLL_CONFIG_A_RESET |
-                             chipcHw_REG_PLL_CONFIG_POWER_DOWN);
-                       REG_LOCAL_IRQ_RESTORE;
-               }
-
-               /* Wait until PLL is locked */
-               while (!(pChipcHw->PLLStatus & chipcHw_REG_PLL_STATUS_LOCKED)
-                      || !(pChipcHw->
-                           PLLStatus2 & chipcHw_REG_PLL_STATUS_LOCKED))
-                       ;
-
-               /* Remove digital reset */
-               {
-                       REG_LOCAL_IRQ_SAVE;
-                       pChipcHw->PLLConfig &= ~chipcHw_REG_PLL_CONFIG_D_RESET;
-                       REG_LOCAL_IRQ_RESTORE;
-               }
-       }
-}
-
-EXPORT_SYMBOL(chipcHw_pll1Enable);
-
-/****************************************************************************/
-/**
-*  @brief  Initializes the chipc module
-*
-*  This function initializes the PLLs and core system clocks
-*
-*/
-/****************************************************************************/
-
-void chipcHw_Init(chipcHw_INIT_PARAM_t *initParam      /*  [ IN ] Misc chip initialization parameter */
-    ) {
-#if !(defined(__KERNEL__) && !defined(STANDALONE))
-       delay_init();
-#endif
-
-       /* Do not program PLL, when warm reset */
-       if (!(chipcHw_getStickyBits() & chipcHw_REG_STICKY_CHIP_WARM_RESET)) {
-               chipcHw_pll1Enable(initParam->pllVcoFreqHz,
-                                  initParam->ssSupport);
-               chipcHw_pll2Enable(initParam->pll2VcoFreqHz);
-       } else {
-               /* Clear sticky bits */
-               chipcHw_clearStickyBits(chipcHw_REG_STICKY_CHIP_WARM_RESET);
-       }
-       /* Clear sticky bits */
-       chipcHw_clearStickyBits(chipcHw_REG_STICKY_CHIP_SOFT_RESET);
-
-       /* Before configuring the ARM clock, atleast we need to make sure BUS clock maintains the proper ratio with ARM clock */
-       pChipcHw->ACLKClock =
-           (pChipcHw->
-            ACLKClock & ~chipcHw_REG_ACLKClock_CLK_DIV_MASK) | (initParam->
-                                                                armBusRatio &
-                                                                chipcHw_REG_ACLKClock_CLK_DIV_MASK);
-
-       /* Set various core component frequencies. The order in which this is done is important for some. */
-       /* The RTBUS (DDR PHY) is derived from the BUS, and the BUS from the ARM, and VPM needs to know BUS */
-       /* frequency to find its ratio with the BUS.  Hence we must set the ARM first, followed by the BUS,  */
-       /* then VPM and RTBUS. */
-
-       chipcHw_setClockFrequency(chipcHw_CLOCK_ARM,
-                                 initParam->busClockFreqHz *
-                                 initParam->armBusRatio);
-       chipcHw_setClockFrequency(chipcHw_CLOCK_BUS, initParam->busClockFreqHz);
-       chipcHw_setClockFrequency(chipcHw_CLOCK_VPM,
-                                 initParam->busClockFreqHz *
-                                 initParam->vpmBusRatio);
-       chipcHw_setClockFrequency(chipcHw_CLOCK_DDR,
-                                 initParam->busClockFreqHz *
-                                 initParam->ddrBusRatio);
-       chipcHw_setClockFrequency(chipcHw_CLOCK_RTBUS,
-                                 initParam->busClockFreqHz / 2);
-}
diff --git a/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c b/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c
deleted file mode 100644 (file)
index 2671d88..0000000
+++ /dev/null
@@ -1,124 +0,0 @@
-/*****************************************************************************
-* Copyright 2003 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/* ---- Include Files ---------------------------------------------------- */
-#include <csp/stdint.h>
-#include <mach/csp/chipcHw_def.h>
-#include <mach/csp/chipcHw_inline.h>
-#include <csp/intcHw.h>
-#include <csp/cache.h>
-
-/* ---- Private Constants and Types --------------------------------------- */
-/* ---- Private Variables ------------------------------------------------- */
-void chipcHw_reset_run_from_aram(void);
-
-typedef void (*RUNFUNC) (void);
-
-/****************************************************************************/
-/**
-*  @brief   warmReset
-*
-*  @note warmReset configures the clocks which are not reset back to the state
-*   required to execute on reset.  To do so we need to copy the code into internal
-*   memory to change the ARM clock while we are not executing from DDR.
-*/
-/****************************************************************************/
-void chipcHw_reset(uint32_t mask)
-{
-       int i = 0;
-       RUNFUNC runFunc = (RUNFUNC) (unsigned long)MM_ADDR_IO_ARAM;
-
-       /* Disable all interrupts */
-       intcHw_irq_disable(INTCHW_INTC0, 0xffffffff);
-       intcHw_irq_disable(INTCHW_INTC1, 0xffffffff);
-       intcHw_irq_disable(INTCHW_SINTC, 0xffffffff);
-
-       {
-               REG_LOCAL_IRQ_SAVE;
-               if (mask & chipcHw_REG_SOFT_RESET_CHIP_SOFT) {
-                       chipcHw_softReset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-               }
-               /* Bypass the PLL clocks before reboot */
-               pChipcHw->UARTClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT;
-               pChipcHw->SPIClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT;
-
-               /* Copy the chipcHw_warmReset_run_from_aram function into ARAM */
-               do {
-                       ((uint32_t *) MM_IO_BASE_ARAM)[i] =
-                           ((uint32_t *) &chipcHw_reset_run_from_aram)[i];
-                       i++;
-               } while (((uint32_t *) MM_IO_BASE_ARAM)[i - 1] != 0xe1a0f00f);  /* 0xe1a0f00f == asm ("mov r15, r15"); */
-
-               CSP_CACHE_FLUSH_ALL;
-
-               /* run the function from ARAM */
-               runFunc();
-
-               /* Code will never get here, but include it to balance REG_LOCAL_IRQ_SAVE above */
-               REG_LOCAL_IRQ_RESTORE;
-       }
-}
-
-/* This function must run from internal memory */
-void chipcHw_reset_run_from_aram(void)
-{
-/* Make sure, pipeline is filled with instructions coming from ARAM */
-__asm (" nop                                                            \n\t"
-               " nop                                                            \n\t"
-#if defined(__KERNEL__) && !defined(STANDALONE)
-               " MRC      p15,#0x0,r0,c1,c0,#0                                  \n\t"
-               " BIC      r0,r0,#0xd                                            \n\t"
-               " MCR      p15,#0x0,r0,c1,c0,#0                                  \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-#endif
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-/* Bypass the ARM clock and switch to XTAL clock */
-               " MOV      r2,#0x80000000                                        \n\t"
-               " LDR      r3,[r2,#8]                                            \n\t"
-               " ORR      r3,r3,#0x20000                                        \n\t"
-               " STR      r3,[r2,#8]                                            \n\t"
-
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-               " nop                                                            \n\t"
-/* Issue reset */
-               " MOV      r3,#0x2                                               \n\t"
-               " STR      r3,[r2,#0x80]                                         \n\t"
-/* End here */
-               " MOV      pc,pc                                                 \n\t");
-/* 0xe1a0f00f ==  asm ("mov r15, r15"); */
-}
diff --git a/arch/arm/mach-bcmring/csp/chipc/chipcHw_str.c b/arch/arm/mach-bcmring/csp/chipc/chipcHw_str.c
deleted file mode 100644 (file)
index 54ad964..0000000
+++ /dev/null
@@ -1,64 +0,0 @@
-/*****************************************************************************
-* Copyright 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-/****************************************************************************/
-/**
-*  @file    chipcHw_str.c
-*
-*  @brief   Contains strings which are useful to linux and csp
-*
-*  @note
-*/
-/****************************************************************************/
-
-/* ---- Include Files ---------------------------------------------------- */
-
-#include <mach/csp/chipcHw_inline.h>
-
-/* ---- Private Constants and Types --------------------------------------- */
-
-static const char *gMuxStr[] = {
-       "GPIO",                 /* 0 */
-       "KeyPad",               /* 1 */
-       "I2C-Host",             /* 2 */
-       "SPI",                  /* 3 */
-       "Uart",                 /* 4 */
-       "LED-Mtx-P",            /* 5 */
-       "LED-Mtx-S",            /* 6 */
-       "SDIO-0",               /* 7 */
-       "SDIO-1",               /* 8 */
-       "PCM",                  /* 9 */
-       "I2S",                  /* 10 */
-       "ETM",                  /* 11 */
-       "Debug",                /* 12 */
-       "Misc",                 /* 13 */
-       "0xE",                  /* 14 */
-       "0xF",                  /* 15 */
-};
-
-/****************************************************************************/
-/**
-*  @brief   Retrieves a string representation of the mux setting for a pin.
-*
-*  @return  Pointer to a character string.
-*/
-/****************************************************************************/
-
-const char *chipcHw_getGpioPinFunctionStr(int pin)
-{
-       if ((pin < 0) || (pin >= chipcHw_GPIO_COUNT)) {
-               return "";
-       }
-
-       return gMuxStr[chipcHw_getGpioPinFunction(pin)];
-}
diff --git a/arch/arm/mach-bcmring/csp/dmac/Makefile b/arch/arm/mach-bcmring/csp/dmac/Makefile
deleted file mode 100644 (file)
index fb1104f..0000000
+++ /dev/null
@@ -1 +0,0 @@
-obj-y += dmacHw.o dmacHw_extra.o
\ No newline at end of file
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw.c
deleted file mode 100644 (file)
index 6b9be2e..0000000
+++ /dev/null
@@ -1,917 +0,0 @@
-/*****************************************************************************
-* Copyright 2003 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*  @file    dmacHw.c
-*
-*  @brief   Low level DMA controller driver routines
-*
-*  @note
-*
-*   These routines provide basic DMA functionality only.
-*/
-/****************************************************************************/
-
-/* ---- Include Files ---------------------------------------------------- */
-#include <csp/stdint.h>
-#include <csp/string.h>
-#include <stddef.h>
-
-#include <csp/dmacHw.h>
-#include <mach/csp/dmacHw_reg.h>
-#include <mach/csp/dmacHw_priv.h>
-#include <mach/csp/chipcHw_inline.h>
-
-/* ---- External Function Prototypes ------------------------------------- */
-
-/* Allocate DMA control blocks */
-dmacHw_CBLK_t dmacHw_gCblk[dmacHw_MAX_CHANNEL_COUNT];
-
-uint32_t dmaChannelCount_0 = dmacHw_MAX_CHANNEL_COUNT / 2;
-uint32_t dmaChannelCount_1 = dmacHw_MAX_CHANNEL_COUNT / 2;
-
-/****************************************************************************/
-/**
-*  @brief   Get maximum FIFO for a DMA channel
-*
-*  @return  Maximum allowable FIFO size
-*
-*
-*/
-/****************************************************************************/
-static uint32_t GetFifoSize(dmacHw_HANDLE_t handle     /*   [ IN ] DMA Channel handle */
-    ) {
-       uint32_t val = 0;
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-       dmacHw_MISC_t *pMiscReg =
-           (dmacHw_MISC_t *) dmacHw_REG_MISC_BASE(pCblk->module);
-
-       switch (pCblk->channel) {
-       case 0:
-               val = (pMiscReg->CompParm2.lo & 0x70000000) >> 28;
-               break;
-       case 1:
-               val = (pMiscReg->CompParm3.hi & 0x70000000) >> 28;
-               break;
-       case 2:
-               val = (pMiscReg->CompParm3.lo & 0x70000000) >> 28;
-               break;
-       case 3:
-               val = (pMiscReg->CompParm4.hi & 0x70000000) >> 28;
-               break;
-       case 4:
-               val = (pMiscReg->CompParm4.lo & 0x70000000) >> 28;
-               break;
-       case 5:
-               val = (pMiscReg->CompParm5.hi & 0x70000000) >> 28;
-               break;
-       case 6:
-               val = (pMiscReg->CompParm5.lo & 0x70000000) >> 28;
-               break;
-       case 7:
-               val = (pMiscReg->CompParm6.hi & 0x70000000) >> 28;
-               break;
-       }
-
-       if (val <= 0x4) {
-               return 8 << val;
-       } else {
-               dmacHw_ASSERT(0);
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Program channel register to initiate transfer
-*
-*  @return  void
-*
-*
-*  @note
-*     - Descriptor buffer MUST ALWAYS be flushed before calling this function
-*     - This function should also be called from ISR to program the channel with
-*       pending descriptors
-*/
-/****************************************************************************/
-void dmacHw_initiateTransfer(dmacHw_HANDLE_t handle,   /*   [ IN ] DMA Channel handle */
-                            dmacHw_CONFIG_t *pConfig,  /*   [ IN ] Configuration settings */
-                            void *pDescriptor  /*   [ IN ] Descriptor buffer */
-    ) {
-       dmacHw_DESC_RING_t *pRing;
-       dmacHw_DESC_t *pProg;
-       dmacHw_CBLK_t *pCblk;
-
-       pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-       pRing = dmacHw_GET_DESC_RING(pDescriptor);
-
-       if (CHANNEL_BUSY(pCblk->module, pCblk->channel)) {
-               /* Not safe yet to program the channel */
-               return;
-       }
-
-       if (pCblk->varDataStarted) {
-               if (pCblk->descUpdated) {
-                       pCblk->descUpdated = 0;
-                       pProg =
-                           (dmacHw_DESC_t *) ((uint32_t)
-                                              dmacHw_REG_LLP(pCblk->module,
-                                                             pCblk->channel) +
-                                              pRing->virt2PhyOffset);
-
-                       /* Load descriptor if not loaded */
-                       if (!(pProg->ctl.hi & dmacHw_REG_CTL_DONE)) {
-                               dmacHw_SET_SAR(pCblk->module, pCblk->channel,
-                                              pProg->sar);
-                               dmacHw_SET_DAR(pCblk->module, pCblk->channel,
-                                              pProg->dar);
-                               dmacHw_REG_CTL_LO(pCblk->module,
-                                                 pCblk->channel) =
-                                   pProg->ctl.lo;
-                               dmacHw_REG_CTL_HI(pCblk->module,
-                                                 pCblk->channel) =
-                                   pProg->ctl.hi;
-                       } else if (pProg == (dmacHw_DESC_t *) pRing->pEnd->llp) {
-                               /* Return as end descriptor is processed */
-                               return;
-                       } else {
-                               dmacHw_ASSERT(0);
-                       }
-               } else {
-                       return;
-               }
-       } else {
-               if (pConfig->transferMode == dmacHw_TRANSFER_MODE_PERIODIC) {
-                       /* Do not make a single chain, rather process one descriptor at a time */
-                       pProg = pRing->pHead;
-                       /* Point to the next descriptor for next iteration */
-                       dmacHw_NEXT_DESC(pRing, pHead);
-               } else {
-                       /* Return if no more pending descriptor */
-                       if (pRing->pEnd == NULL) {
-                               return;
-                       }
-
-                       pProg = pRing->pProg;
-                       if (pConfig->transferMode ==
-                           dmacHw_TRANSFER_MODE_CONTINUOUS) {
-                               /* Make sure a complete ring can be formed */
-                               dmacHw_ASSERT((dmacHw_DESC_t *) pRing->pEnd->
-                                             llp == pRing->pProg);
-                               /* Make sure pProg pointing to the pHead */
-                               dmacHw_ASSERT((dmacHw_DESC_t *) pRing->pProg ==
-                                             pRing->pHead);
-                               /* Make a complete ring */
-                               do {
-                                       pRing->pProg->ctl.lo |=
-                                           (dmacHw_REG_CTL_LLP_DST_EN |
-                                            dmacHw_REG_CTL_LLP_SRC_EN);
-                                       pRing->pProg =
-                                           (dmacHw_DESC_t *) pRing->pProg->llp;
-                               } while (pRing->pProg != pRing->pHead);
-                       } else {
-                               /* Make a single long chain */
-                               while (pRing->pProg != pRing->pEnd) {
-                                       pRing->pProg->ctl.lo |=
-                                           (dmacHw_REG_CTL_LLP_DST_EN |
-                                            dmacHw_REG_CTL_LLP_SRC_EN);
-                                       pRing->pProg =
-                                           (dmacHw_DESC_t *) pRing->pProg->llp;
-                               }
-                       }
-               }
-
-               /* Program the channel registers */
-               dmacHw_SET_SAR(pCblk->module, pCblk->channel, pProg->sar);
-               dmacHw_SET_DAR(pCblk->module, pCblk->channel, pProg->dar);
-               dmacHw_SET_LLP(pCblk->module, pCblk->channel,
-                              (uint32_t) pProg - pRing->virt2PhyOffset);
-               dmacHw_REG_CTL_LO(pCblk->module, pCblk->channel) =
-                   pProg->ctl.lo;
-               dmacHw_REG_CTL_HI(pCblk->module, pCblk->channel) =
-                   pProg->ctl.hi;
-               if (pRing->pEnd) {
-                       /* Remember the descriptor to use next */
-                       pRing->pProg = (dmacHw_DESC_t *) pRing->pEnd->llp;
-               }
-               /* Indicate no more pending descriptor  */
-               pRing->pEnd = (dmacHw_DESC_t *) NULL;
-       }
-       /* Start DMA operation */
-       dmacHw_DMA_START(pCblk->module, pCblk->channel);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Initializes DMA
-*
-*  This function initializes DMA CSP driver
-*
-*  @note
-*     Must be called before using any DMA channel
-*/
-/****************************************************************************/
-void dmacHw_initDma(void)
-{
-
-       uint32_t i = 0;
-
-       dmaChannelCount_0 = dmacHw_GET_NUM_CHANNEL(0);
-       dmaChannelCount_1 = dmacHw_GET_NUM_CHANNEL(1);
-
-       /* Enable access to the DMA block */
-       chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_DMAC0);
-       chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_DMAC1);
-
-       if ((dmaChannelCount_0 + dmaChannelCount_1) > dmacHw_MAX_CHANNEL_COUNT) {
-               dmacHw_ASSERT(0);
-       }
-
-       memset((void *)dmacHw_gCblk, 0,
-              sizeof(dmacHw_CBLK_t) * (dmaChannelCount_0 + dmaChannelCount_1));
-       for (i = 0; i < dmaChannelCount_0; i++) {
-               dmacHw_gCblk[i].module = 0;
-               dmacHw_gCblk[i].channel = i;
-       }
-       for (i = 0; i < dmaChannelCount_1; i++) {
-               dmacHw_gCblk[i + dmaChannelCount_0].module = 1;
-               dmacHw_gCblk[i + dmaChannelCount_0].channel = i;
-       }
-}
-
-/****************************************************************************/
-/**
-*  @brief   Exit function for  DMA
-*
-*  This function isolates DMA from the system
-*
-*/
-/****************************************************************************/
-void dmacHw_exitDma(void)
-{
-       /* Disable access to the DMA block */
-       chipcHw_busInterfaceClockDisable(chipcHw_REG_BUS_CLOCK_DMAC0);
-       chipcHw_busInterfaceClockDisable(chipcHw_REG_BUS_CLOCK_DMAC1);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Gets a handle to a DMA channel
-*
-*  This function returns a handle, representing a control block of a particular DMA channel
-*
-*  @return  -1       - On Failure
-*            handle  - On Success, representing a channel control block
-*
-*  @note
-*     None  Channel ID must be created using "dmacHw_MAKE_CHANNEL_ID" macro
-*/
-/****************************************************************************/
-dmacHw_HANDLE_t dmacHw_getChannelHandle(dmacHw_ID_t channelId  /* [ IN ] DMA Channel Id */
-    ) {
-       int idx;
-
-       switch ((channelId >> 8)) {
-       case 0:
-               dmacHw_ASSERT((channelId & 0xff) < dmaChannelCount_0);
-               idx = (channelId & 0xff);
-               break;
-       case 1:
-               dmacHw_ASSERT((channelId & 0xff) < dmaChannelCount_1);
-               idx = dmaChannelCount_0 + (channelId & 0xff);
-               break;
-       default:
-               dmacHw_ASSERT(0);
-               return (dmacHw_HANDLE_t) -1;
-       }
-
-       return dmacHw_CBLK_TO_HANDLE(&dmacHw_gCblk[idx]);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Initializes a DMA channel for use
-*
-*  This function initializes and resets a DMA channel for use
-*
-*  @return  -1     - On Failure
-*            0     - On Success
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-int dmacHw_initChannel(dmacHw_HANDLE_t handle  /*   [ IN ] DMA Channel handle */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-       int module = pCblk->module;
-       int channel = pCblk->channel;
-
-       /* Reinitialize the control block */
-       memset((void *)pCblk, 0, sizeof(dmacHw_CBLK_t));
-       pCblk->module = module;
-       pCblk->channel = channel;
-
-       /* Enable DMA controller */
-       dmacHw_DMA_ENABLE(pCblk->module);
-       /* Reset DMA channel */
-       dmacHw_RESET_CONTROL_LO(pCblk->module, pCblk->channel);
-       dmacHw_RESET_CONTROL_HI(pCblk->module, pCblk->channel);
-       dmacHw_RESET_CONFIG_LO(pCblk->module, pCblk->channel);
-       dmacHw_RESET_CONFIG_HI(pCblk->module, pCblk->channel);
-
-       /* Clear all raw interrupt status */
-       dmacHw_TRAN_INT_CLEAR(pCblk->module, pCblk->channel);
-       dmacHw_BLOCK_INT_CLEAR(pCblk->module, pCblk->channel);
-       dmacHw_ERROR_INT_CLEAR(pCblk->module, pCblk->channel);
-
-       /* Mask event specific interrupts */
-       dmacHw_TRAN_INT_DISABLE(pCblk->module, pCblk->channel);
-       dmacHw_BLOCK_INT_DISABLE(pCblk->module, pCblk->channel);
-       dmacHw_STRAN_INT_DISABLE(pCblk->module, pCblk->channel);
-       dmacHw_DTRAN_INT_DISABLE(pCblk->module, pCblk->channel);
-       dmacHw_ERROR_INT_DISABLE(pCblk->module, pCblk->channel);
-
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief  Finds amount of memory required to form a descriptor ring
-*
-*
-*  @return   Number of bytes required to form a descriptor ring
-*
-*
-*/
-/****************************************************************************/
-uint32_t dmacHw_descriptorLen(uint32_t descCnt /* [ IN ] Number of descriptor in the ring */
-    ) {
-       /* Need extra 4 byte to ensure 32 bit alignment  */
-       return (descCnt * sizeof(dmacHw_DESC_t)) + sizeof(dmacHw_DESC_RING_t) +
-               sizeof(uint32_t);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Initializes descriptor ring
-*
-*  This function will initializes the descriptor ring of a DMA channel
-*
-*
-*  @return   -1 - On failure
-*             0 - On success
-*  @note
-*     - "len" parameter should be obtained from "dmacHw_descriptorLen"
-*     - Descriptor buffer MUST be 32 bit aligned and uncached as it is
-*       accessed by ARM and DMA
-*/
-/****************************************************************************/
-int dmacHw_initDescriptor(void *pDescriptorVirt,       /*  [ IN ] Virtual address of uncahced buffer allocated to form descriptor ring */
-                         uint32_t descriptorPhyAddr,   /*  [ IN ] Physical address of pDescriptorVirt (descriptor buffer) */
-                         uint32_t len, /*  [ IN ] Size of the pBuf */
-                         uint32_t num  /*  [ IN ] Number of descriptor in the ring */
-    ) {
-       uint32_t i;
-       dmacHw_DESC_RING_t *pRing;
-       dmacHw_DESC_t *pDesc;
-
-       /* Check the alignment of the descriptor */
-       if ((uint32_t) pDescriptorVirt & 0x00000003) {
-               dmacHw_ASSERT(0);
-               return -1;
-       }
-
-       /* Check if enough space has been allocated for descriptor ring */
-       if (len < dmacHw_descriptorLen(num)) {
-               return -1;
-       }
-
-       pRing = dmacHw_GET_DESC_RING(pDescriptorVirt);
-       pRing->pHead =
-           (dmacHw_DESC_t *) ((uint32_t) pRing + sizeof(dmacHw_DESC_RING_t));
-       pRing->pFree = pRing->pTail = pRing->pEnd = pRing->pHead;
-       pRing->pProg = dmacHw_DESC_INIT;
-       /* Initialize link item chain, starting from the head */
-       pDesc = pRing->pHead;
-       /* Find the offset between virtual to physical address */
-       pRing->virt2PhyOffset = (uint32_t) pDescriptorVirt - descriptorPhyAddr;
-
-       /* Form the descriptor ring */
-       for (i = 0; i < num - 1; i++) {
-               /* Clear link list item */
-               memset((void *)pDesc, 0, sizeof(dmacHw_DESC_t));
-               /* Point to the next item in the physical address */
-               pDesc->llpPhy = (uint32_t) (pDesc + 1) - pRing->virt2PhyOffset;
-               /* Point to the next item in the virtual address */
-               pDesc->llp = (uint32_t) (pDesc + 1);
-               /* Mark descriptor is ready to use */
-               pDesc->ctl.hi = dmacHw_DESC_FREE;
-               /* Look into next link list item */
-               pDesc++;
-       }
-
-       /* Clear last link list item */
-       memset((void *)pDesc, 0, sizeof(dmacHw_DESC_t));
-       /* Last item pointing to the first item in the
-          physical address to complete the ring */
-       pDesc->llpPhy = (uint32_t) pRing->pHead - pRing->virt2PhyOffset;
-       /* Last item pointing to the first item in the
-          virtual address to complete the ring
-        */
-       pDesc->llp = (uint32_t) pRing->pHead;
-       /* Mark descriptor is ready to use */
-       pDesc->ctl.hi = dmacHw_DESC_FREE;
-       /* Set the number of descriptors in the ring */
-       pRing->num = num;
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Configure DMA channel
-*
-*  @return  0  : On success
-*           -1 : On failure
-*/
-/****************************************************************************/
-int dmacHw_configChannel(dmacHw_HANDLE_t handle,       /*   [ IN ] DMA Channel handle */
-                        dmacHw_CONFIG_t *pConfig       /*   [ IN ] Configuration settings */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-       uint32_t cfgHigh = 0;
-       int srcTrSize;
-       int dstTrSize;
-
-       pCblk->varDataStarted = 0;
-       pCblk->userData = NULL;
-
-       /* Configure
-          - Burst transaction when enough data in available in FIFO
-          - AHB Access protection 1
-          - Source and destination peripheral ports
-        */
-       cfgHigh =
-           dmacHw_REG_CFG_HI_FIFO_ENOUGH | dmacHw_REG_CFG_HI_AHB_HPROT_1 |
-           dmacHw_SRC_PERI_INTF(pConfig->
-                                srcPeripheralPort) |
-           dmacHw_DST_PERI_INTF(pConfig->dstPeripheralPort);
-       /* Set priority */
-       dmacHw_SET_CHANNEL_PRIORITY(pCblk->module, pCblk->channel,
-                                   pConfig->channelPriority);
-
-       if (pConfig->dstStatusRegisterAddress != 0) {
-               /* Destination status update enable */
-               cfgHigh |= dmacHw_REG_CFG_HI_UPDATE_DST_STAT;
-               /* Configure status registers */
-               dmacHw_SET_DSTATAR(pCblk->module, pCblk->channel,
-                                  pConfig->dstStatusRegisterAddress);
-       }
-
-       if (pConfig->srcStatusRegisterAddress != 0) {
-               /* Source status update enable */
-               cfgHigh |= dmacHw_REG_CFG_HI_UPDATE_SRC_STAT;
-               /* Source status update enable */
-               dmacHw_SET_SSTATAR(pCblk->module, pCblk->channel,
-                                  pConfig->srcStatusRegisterAddress);
-       }
-       /* Configure the config high register */
-       dmacHw_GET_CONFIG_HI(pCblk->module, pCblk->channel) = cfgHigh;
-
-       /* Clear all raw interrupt status */
-       dmacHw_TRAN_INT_CLEAR(pCblk->module, pCblk->channel);
-       dmacHw_BLOCK_INT_CLEAR(pCblk->module, pCblk->channel);
-       dmacHw_ERROR_INT_CLEAR(pCblk->module, pCblk->channel);
-
-       /* Configure block interrupt */
-       if (pConfig->blockTransferInterrupt == dmacHw_INTERRUPT_ENABLE) {
-               dmacHw_BLOCK_INT_ENABLE(pCblk->module, pCblk->channel);
-       } else {
-               dmacHw_BLOCK_INT_DISABLE(pCblk->module, pCblk->channel);
-       }
-       /* Configure complete transfer interrupt */
-       if (pConfig->completeTransferInterrupt == dmacHw_INTERRUPT_ENABLE) {
-               dmacHw_TRAN_INT_ENABLE(pCblk->module, pCblk->channel);
-       } else {
-               dmacHw_TRAN_INT_DISABLE(pCblk->module, pCblk->channel);
-       }
-       /* Configure error interrupt */
-       if (pConfig->errorInterrupt == dmacHw_INTERRUPT_ENABLE) {
-               dmacHw_ERROR_INT_ENABLE(pCblk->module, pCblk->channel);
-       } else {
-               dmacHw_ERROR_INT_DISABLE(pCblk->module, pCblk->channel);
-       }
-       /* Configure gather register */
-       if (pConfig->srcGatherWidth) {
-               srcTrSize =
-                   dmacHw_GetTrWidthInBytes(pConfig->srcMaxTransactionWidth);
-               if (!
-                   ((pConfig->srcGatherWidth % srcTrSize)
-                    && (pConfig->srcGatherJump % srcTrSize))) {
-                       dmacHw_REG_SGR_LO(pCblk->module, pCblk->channel) =
-                           ((pConfig->srcGatherWidth /
-                             srcTrSize) << 20) | (pConfig->srcGatherJump /
-                                                  srcTrSize);
-               } else {
-                       return -1;
-               }
-       }
-       /* Configure scatter register */
-       if (pConfig->dstScatterWidth) {
-               dstTrSize =
-                   dmacHw_GetTrWidthInBytes(pConfig->dstMaxTransactionWidth);
-               if (!
-                   ((pConfig->dstScatterWidth % dstTrSize)
-                    && (pConfig->dstScatterJump % dstTrSize))) {
-                       dmacHw_REG_DSR_LO(pCblk->module, pCblk->channel) =
-                           ((pConfig->dstScatterWidth /
-                             dstTrSize) << 20) | (pConfig->dstScatterJump /
-                                                  dstTrSize);
-               } else {
-                       return -1;
-               }
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Indicates whether DMA transfer is in progress or completed
-*
-*  @return   DMA transfer status
-*          dmacHw_TRANSFER_STATUS_BUSY:         DMA Transfer ongoing
-*          dmacHw_TRANSFER_STATUS_DONE:         DMA Transfer completed
-*          dmacHw_TRANSFER_STATUS_ERROR:        DMA Transfer error
-*
-*/
-/****************************************************************************/
-dmacHw_TRANSFER_STATUS_e dmacHw_transferCompleted(dmacHw_HANDLE_t handle       /*   [ IN ] DMA Channel handle */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-
-       if (CHANNEL_BUSY(pCblk->module, pCblk->channel)) {
-               return dmacHw_TRANSFER_STATUS_BUSY;
-       } else if (dmacHw_REG_INT_RAW_ERROR(pCblk->module) &
-                  (0x00000001 << pCblk->channel)) {
-               return dmacHw_TRANSFER_STATUS_ERROR;
-       }
-
-       return dmacHw_TRANSFER_STATUS_DONE;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Set descriptors for known data length
-*
-*  When DMA has to work as a flow controller, this function prepares the
-*  descriptor chain to transfer data
-*
-*  from:
-*          - Memory to memory
-*          - Peripheral to memory
-*          - Memory to Peripheral
-*          - Peripheral to Peripheral
-*
-*  @return   -1 - On failure
-*             0 - On success
-*
-*/
-/****************************************************************************/
-int dmacHw_setDataDescriptor(dmacHw_CONFIG_t *pConfig, /*   [ IN ] Configuration settings */
-                            void *pDescriptor, /*   [ IN ] Descriptor buffer */
-                            void *pSrcAddr,    /*   [ IN ] Source (Peripheral/Memory) address */
-                            void *pDstAddr,    /*   [ IN ] Destination (Peripheral/Memory) address */
-                            size_t dataLen     /*   [ IN ] Data length in bytes */
-    ) {
-       dmacHw_TRANSACTION_WIDTH_e dstTrWidth;
-       dmacHw_TRANSACTION_WIDTH_e srcTrWidth;
-       dmacHw_DESC_RING_t *pRing = dmacHw_GET_DESC_RING(pDescriptor);
-       dmacHw_DESC_t *pStart;
-       dmacHw_DESC_t *pProg;
-       int srcTs = 0;
-       int blkTs = 0;
-       int oddSize = 0;
-       int descCount = 0;
-       int count = 0;
-       int dstTrSize = 0;
-       int srcTrSize = 0;
-       uint32_t maxBlockSize = dmacHw_MAX_BLOCKSIZE;
-
-       dstTrSize = dmacHw_GetTrWidthInBytes(pConfig->dstMaxTransactionWidth);
-       srcTrSize = dmacHw_GetTrWidthInBytes(pConfig->srcMaxTransactionWidth);
-
-       /* Skip Tx if buffer is NULL  or length is unknown */
-       if ((pSrcAddr == NULL) || (pDstAddr == NULL) || (dataLen == 0)) {
-               /* Do not initiate transfer */
-               return -1;
-       }
-
-       /* Ensure scatter and gather are transaction aligned */
-       if ((pConfig->srcGatherWidth % srcTrSize)
-           || (pConfig->dstScatterWidth % dstTrSize)) {
-               return -2;
-       }
-
-       /*
-          Background 1: DMAC can not perform DMA if source and destination addresses are
-          not properly aligned with the channel's transaction width. So, for successful
-          DMA transfer, transaction width must be set according to the alignment of the
-          source and destination address.
-        */
-
-       /* Adjust destination transaction width if destination address is not aligned properly */
-       dstTrWidth = pConfig->dstMaxTransactionWidth;
-       while (dmacHw_ADDRESS_MASK(dstTrSize) & (uint32_t) pDstAddr) {
-               dstTrWidth = dmacHw_GetNextTrWidth(dstTrWidth);
-               dstTrSize = dmacHw_GetTrWidthInBytes(dstTrWidth);
-       }
-
-       /* Adjust source transaction width if source address is not aligned properly */
-       srcTrWidth = pConfig->srcMaxTransactionWidth;
-       while (dmacHw_ADDRESS_MASK(srcTrSize) & (uint32_t) pSrcAddr) {
-               srcTrWidth = dmacHw_GetNextTrWidth(srcTrWidth);
-               srcTrSize = dmacHw_GetTrWidthInBytes(srcTrWidth);
-       }
-
-       /* Find the maximum transaction per descriptor */
-       if (pConfig->maxDataPerBlock
-           && ((pConfig->maxDataPerBlock / srcTrSize) <
-               dmacHw_MAX_BLOCKSIZE)) {
-               maxBlockSize = pConfig->maxDataPerBlock / srcTrSize;
-       }
-
-       /* Find number of source transactions needed to complete the DMA transfer */
-       srcTs = dataLen / srcTrSize;
-       /* Find the odd number of bytes that need to be transferred as single byte transaction width */
-       if (srcTs && (dstTrSize > srcTrSize)) {
-               oddSize = dataLen % dstTrSize;
-               /* Adjust source transaction count due to "oddSize" */
-               srcTs = srcTs - (oddSize / srcTrSize);
-       } else {
-               oddSize = dataLen % srcTrSize;
-       }
-       /* Adjust "descCount" due to "oddSize" */
-       if (oddSize) {
-               descCount++;
-       }
-       /* Find the number of descriptor needed for total "srcTs" */
-       if (srcTs) {
-               descCount += ((srcTs - 1) / maxBlockSize) + 1;
-       }
-
-       /* Check the availability of "descCount" discriptors in the ring */
-       pProg = pRing->pHead;
-       for (count = 0; (descCount <= pRing->num) && (count < descCount);
-            count++) {
-               if ((pProg->ctl.hi & dmacHw_DESC_FREE) == 0) {
-                       /* Sufficient descriptors are not available */
-                       return -3;
-               }
-               pProg = (dmacHw_DESC_t *) pProg->llp;
-       }
-
-       /* Remember the link list item to program the channel registers */
-       pStart = pProg = pRing->pHead;
-       /* Make a link list with "descCount(=count)" number of descriptors */
-       while (count) {
-               /* Reset channel control information */
-               pProg->ctl.lo = 0;
-               /* Enable source gather if configured */
-               if (pConfig->srcGatherWidth) {
-                       pProg->ctl.lo |= dmacHw_REG_CTL_SG_ENABLE;
-               }
-               /* Enable destination scatter if configured */
-               if (pConfig->dstScatterWidth) {
-                       pProg->ctl.lo |= dmacHw_REG_CTL_DS_ENABLE;
-               }
-               /* Set source and destination address */
-               pProg->sar = (uint32_t) pSrcAddr;
-               pProg->dar = (uint32_t) pDstAddr;
-               /* Use "devCtl" to mark that user memory need to be freed later if needed */
-               if (pProg == pRing->pHead) {
-                       pProg->devCtl = dmacHw_FREE_USER_MEMORY;
-               } else {
-                       pProg->devCtl = 0;
-               }
-
-               blkTs = srcTs;
-
-               /* Special treatmeant for last descriptor */
-               if (count == 1) {
-                       /* Mark the last descriptor */
-                       pProg->ctl.lo &=
-                           ~(dmacHw_REG_CTL_LLP_DST_EN |
-                             dmacHw_REG_CTL_LLP_SRC_EN);
-                       /* Treatment for odd data bytes */
-                       if (oddSize) {
-                               /* Adjust for single byte transaction width */
-                               switch (pConfig->transferType) {
-                               case dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM:
-                                       dstTrWidth =
-                                           dmacHw_DST_TRANSACTION_WIDTH_8;
-                                       blkTs =
-                                           (oddSize / srcTrSize) +
-                                           ((oddSize % srcTrSize) ? 1 : 0);
-                                       break;
-                               case dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL:
-                                       srcTrWidth =
-                                           dmacHw_SRC_TRANSACTION_WIDTH_8;
-                                       blkTs = oddSize;
-                                       break;
-                               case dmacHw_TRANSFER_TYPE_MEM_TO_MEM:
-                                       srcTrWidth =
-                                           dmacHw_SRC_TRANSACTION_WIDTH_8;
-                                       dstTrWidth =
-                                           dmacHw_DST_TRANSACTION_WIDTH_8;
-                                       blkTs = oddSize;
-                                       break;
-                               case dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_PERIPHERAL:
-                                       /* Do not adjust the transaction width  */
-                                       break;
-                               }
-                       } else {
-                               srcTs -= blkTs;
-                       }
-               } else {
-                       if (srcTs / maxBlockSize) {
-                               blkTs = maxBlockSize;
-                       }
-                       /* Remaining source transactions for next iteration */
-                       srcTs -= blkTs;
-               }
-               /* Must have a valid source transactions */
-               dmacHw_ASSERT(blkTs > 0);
-               /* Set control information */
-               if (pConfig->flowControler == dmacHw_FLOW_CONTROL_DMA) {
-                       pProg->ctl.lo |= pConfig->transferType |
-                           pConfig->srcUpdate |
-                           pConfig->dstUpdate |
-                           srcTrWidth |
-                           dstTrWidth |
-                           pConfig->srcMaxBurstWidth |
-                           pConfig->dstMaxBurstWidth |
-                           pConfig->srcMasterInterface |
-                           pConfig->dstMasterInterface | dmacHw_REG_CTL_INT_EN;
-               } else {
-                       uint32_t transferType = 0;
-                       switch (pConfig->transferType) {
-                       case dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM:
-                               transferType = dmacHw_REG_CTL_TTFC_PM_PERI;
-                               break;
-                       case dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL:
-                               transferType = dmacHw_REG_CTL_TTFC_MP_PERI;
-                               break;
-                       default:
-                               dmacHw_ASSERT(0);
-                       }
-                       pProg->ctl.lo |= transferType |
-                           pConfig->srcUpdate |
-                           pConfig->dstUpdate |
-                           srcTrWidth |
-                           dstTrWidth |
-                           pConfig->srcMaxBurstWidth |
-                           pConfig->dstMaxBurstWidth |
-                           pConfig->srcMasterInterface |
-                           pConfig->dstMasterInterface | dmacHw_REG_CTL_INT_EN;
-               }
-
-               /* Set block transaction size */
-               pProg->ctl.hi = blkTs & dmacHw_REG_CTL_BLOCK_TS_MASK;
-               /* Look for next descriptor */
-               if (count > 1) {
-                       /* Point to the next descriptor */
-                       pProg = (dmacHw_DESC_t *) pProg->llp;
-
-                       /* Update source and destination address for next iteration */
-                       switch (pConfig->transferType) {
-                       case dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM:
-                               if (pConfig->dstScatterWidth) {
-                                       pDstAddr =
-                                           (char *)pDstAddr +
-                                           blkTs * srcTrSize +
-                                           (((blkTs * srcTrSize) /
-                                             pConfig->dstScatterWidth) *
-                                            pConfig->dstScatterJump);
-                               } else {
-                                       pDstAddr =
-                                           (char *)pDstAddr +
-                                           blkTs * srcTrSize;
-                               }
-                               break;
-                       case dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL:
-                               if (pConfig->srcGatherWidth) {
-                                       pSrcAddr =
-                                           (char *)pDstAddr +
-                                           blkTs * srcTrSize +
-                                           (((blkTs * srcTrSize) /
-                                             pConfig->srcGatherWidth) *
-                                            pConfig->srcGatherJump);
-                               } else {
-                                       pSrcAddr =
-                                           (char *)pSrcAddr +
-                                           blkTs * srcTrSize;
-                               }
-                               break;
-                       case dmacHw_TRANSFER_TYPE_MEM_TO_MEM:
-                               if (pConfig->dstScatterWidth) {
-                                       pDstAddr =
-                                           (char *)pDstAddr +
-                                           blkTs * srcTrSize +
-                                           (((blkTs * srcTrSize) /
-                                             pConfig->dstScatterWidth) *
-                                            pConfig->dstScatterJump);
-                               } else {
-                                       pDstAddr =
-                                           (char *)pDstAddr +
-                                           blkTs * srcTrSize;
-                               }
-
-                               if (pConfig->srcGatherWidth) {
-                                       pSrcAddr =
-                                           (char *)pDstAddr +
-                                           blkTs * srcTrSize +
-                                           (((blkTs * srcTrSize) /
-                                             pConfig->srcGatherWidth) *
-                                            pConfig->srcGatherJump);
-                               } else {
-                                       pSrcAddr =
-                                           (char *)pSrcAddr +
-                                           blkTs * srcTrSize;
-                               }
-                               break;
-                       case dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_PERIPHERAL:
-                               /* Do not adjust the address */
-                               break;
-                       default:
-                               dmacHw_ASSERT(0);
-                       }
-               } else {
-                       /* At the end of transfer "srcTs" must be zero */
-                       dmacHw_ASSERT(srcTs == 0);
-               }
-               count--;
-       }
-
-       /* Remember the descriptor to initialize the registers */
-       if (pRing->pProg == dmacHw_DESC_INIT) {
-               pRing->pProg = pStart;
-       }
-       /* Indicate that the descriptor is updated */
-       pRing->pEnd = pProg;
-       /* Head pointing to the next descriptor */
-       pRing->pHead = (dmacHw_DESC_t *) pProg->llp;
-       /* Update Tail pointer if destination is a peripheral,
-          because no one is going to read from the pTail
-        */
-       if (!dmacHw_DST_IS_MEMORY(pConfig->transferType)) {
-               pRing->pTail = pRing->pHead;
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Provides DMA controller attributes
-*
-*
-*  @return  DMA controller attributes
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle,      /*  [ IN ]  DMA Channel handle */
-                                         dmacHw_CONTROLLER_ATTRIB_e attr       /*  [ IN ]  DMA Controller attribute of type  dmacHw_CONTROLLER_ATTRIB_e */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-
-       switch (attr) {
-       case dmacHw_CONTROLLER_ATTRIB_CHANNEL_NUM:
-               return dmacHw_GET_NUM_CHANNEL(pCblk->module);
-       case dmacHw_CONTROLLER_ATTRIB_CHANNEL_MAX_BLOCK_SIZE:
-               return (1 <<
-                        (dmacHw_GET_MAX_BLOCK_SIZE
-                         (pCblk->module, pCblk->module) + 2)) - 8;
-       case dmacHw_CONTROLLER_ATTRIB_MASTER_INTF_NUM:
-               return dmacHw_GET_NUM_INTERFACE(pCblk->module);
-       case dmacHw_CONTROLLER_ATTRIB_CHANNEL_BUS_WIDTH:
-               return 32 << dmacHw_GET_CHANNEL_DATA_WIDTH(pCblk->module,
-                                                          pCblk->channel);
-       case dmacHw_CONTROLLER_ATTRIB_CHANNEL_FIFO_SIZE:
-               return GetFifoSize(handle);
-       }
-       dmacHw_ASSERT(0);
-       return 0;
-}
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
deleted file mode 100644 (file)
index a1f3283..0000000
+++ /dev/null
@@ -1,1017 +0,0 @@
-/*****************************************************************************
-* Copyright 2003 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*  @file    dmacHw_extra.c
-*
-*  @brief   Extra Low level DMA controller driver routines
-*
-*  @note
-*
-*   These routines provide basic DMA functionality only.
-*/
-/****************************************************************************/
-
-/* ---- Include Files ---------------------------------------------------- */
-
-#include <csp/stdint.h>
-#include <stddef.h>
-
-#include <csp/dmacHw.h>
-#include <mach/csp/dmacHw_reg.h>
-#include <mach/csp/dmacHw_priv.h>
-
-extern dmacHw_CBLK_t dmacHw_gCblk[dmacHw_MAX_CHANNEL_COUNT];   /* Declared in dmacHw.c */
-
-/* ---- External Function Prototypes ------------------------------------- */
-
-/* ---- Internal Use Function Prototypes --------------------------------- */
-/****************************************************************************/
-/**
-*  @brief   Overwrites data length in the descriptor
-*
-*  This function overwrites data length in the descriptor
-*
-*
-*  @return   void
-*
-*  @note
-*          This is only used for PCM channel
-*/
-/****************************************************************************/
-void dmacHw_setDataLength(dmacHw_CONFIG_t *pConfig,    /*   [ IN ] Configuration settings */
-                         void *pDescriptor,    /*   [ IN ] Descriptor buffer */
-                         size_t dataLen        /*   [ IN ] Data length in bytes */
-    );
-
-/****************************************************************************/
-/**
-*  @brief   Helper function to display DMA registers
-*
-*  @return  void
-*
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-static void DisplayRegisterContents(int module,        /*   [ IN ] DMA Controller unit  (0-1) */
-                                   int channel,        /*   [ IN ] DMA Channel          (0-7) / -1(all) */
-                                   int (*fpPrint) (const char *, ...)  /*   [ IN ] Callback to the print function */
-    ) {
-       int chan;
-
-       (*fpPrint) ("Displaying register content \n\n");
-       (*fpPrint) ("Module %d: Interrupt raw transfer              0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_RAW_TRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt raw block                 0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_RAW_BLOCK(module)));
-       (*fpPrint) ("Module %d: Interrupt raw src transfer          0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_RAW_STRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt raw dst transfer          0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_RAW_DTRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt raw error                 0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_RAW_ERROR(module)));
-       (*fpPrint) ("--------------------------------------------------\n");
-       (*fpPrint) ("Module %d: Interrupt stat transfer             0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_STAT_TRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt stat block                0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_STAT_BLOCK(module)));
-       (*fpPrint) ("Module %d: Interrupt stat src transfer         0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_STAT_STRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt stat dst transfer         0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_STAT_DTRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt stat error                0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_STAT_ERROR(module)));
-       (*fpPrint) ("--------------------------------------------------\n");
-       (*fpPrint) ("Module %d: Interrupt mask transfer             0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_MASK_TRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt mask block                0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_MASK_BLOCK(module)));
-       (*fpPrint) ("Module %d: Interrupt mask src transfer         0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_MASK_STRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt mask dst transfer         0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_MASK_DTRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt mask error                0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_MASK_ERROR(module)));
-       (*fpPrint) ("--------------------------------------------------\n");
-       (*fpPrint) ("Module %d: Interrupt clear transfer            0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_CLEAR_TRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt clear block               0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_CLEAR_BLOCK(module)));
-       (*fpPrint) ("Module %d: Interrupt clear src transfer        0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_CLEAR_STRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt clear dst transfer        0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_CLEAR_DTRAN(module)));
-       (*fpPrint) ("Module %d: Interrupt clear error               0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_INT_CLEAR_ERROR(module)));
-       (*fpPrint) ("--------------------------------------------------\n");
-       (*fpPrint) ("Module %d: SW source req                       0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_SW_HS_SRC_REQ(module)));
-       (*fpPrint) ("Module %d: SW dest req                         0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_SW_HS_DST_REQ(module)));
-       (*fpPrint) ("Module %d: SW source signal                    0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_SW_HS_SRC_SGL_REQ(module)));
-       (*fpPrint) ("Module %d: SW dest signal                      0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_SW_HS_DST_SGL_REQ(module)));
-       (*fpPrint) ("Module %d: SW source last                      0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_SW_HS_SRC_LST_REQ(module)));
-       (*fpPrint) ("Module %d: SW dest last                        0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_SW_HS_DST_LST_REQ(module)));
-       (*fpPrint) ("--------------------------------------------------\n");
-       (*fpPrint) ("Module %d: misc config                         0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_MISC_CFG(module)));
-       (*fpPrint) ("Module %d: misc channel enable                 0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_MISC_CH_ENABLE(module)));
-       (*fpPrint) ("Module %d: misc ID                             0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_MISC_ID(module)));
-       (*fpPrint) ("Module %d: misc test                           0x%X\n",
-                   module, (uint32_t) (dmacHw_REG_MISC_TEST(module)));
-
-       if (channel == -1) {
-               for (chan = 0; chan < 8; chan++) {
-                       (*fpPrint)
-                           ("--------------------------------------------------\n");
-                       (*fpPrint)
-                           ("Module %d: Channel %d Source                   0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_SAR(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Destination              0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_DAR(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d LLP                      0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_LLP(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Control (LO)             0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_CTL_LO(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Control (HI)             0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_CTL_HI(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Source Stats             0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_SSTAT(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Dest Stats               0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_DSTAT(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Source Stats Addr        0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_SSTATAR(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Dest Stats Addr          0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_DSTATAR(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Config (LO)              0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_CFG_LO(module, chan)));
-                       (*fpPrint)
-                           ("Module %d: Channel %d Config (HI)              0x%X\n",
-                            module, chan,
-                            (uint32_t) (dmacHw_REG_CFG_HI(module, chan)));
-               }
-       } else {
-               chan = channel;
-               (*fpPrint)
-                   ("--------------------------------------------------\n");
-               (*fpPrint)
-                   ("Module %d: Channel %d Source                   0x%X\n",
-                    module, chan, (uint32_t) (dmacHw_REG_SAR(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Destination              0x%X\n",
-                    module, chan, (uint32_t) (dmacHw_REG_DAR(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d LLP                      0x%X\n",
-                    module, chan, (uint32_t) (dmacHw_REG_LLP(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Control (LO)             0x%X\n",
-                    module, chan,
-                    (uint32_t) (dmacHw_REG_CTL_LO(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Control (HI)             0x%X\n",
-                    module, chan,
-                    (uint32_t) (dmacHw_REG_CTL_HI(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Source Stats             0x%X\n",
-                    module, chan, (uint32_t) (dmacHw_REG_SSTAT(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Dest Stats               0x%X\n",
-                    module, chan, (uint32_t) (dmacHw_REG_DSTAT(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Source Stats Addr        0x%X\n",
-                    module, chan,
-                    (uint32_t) (dmacHw_REG_SSTATAR(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Dest Stats Addr          0x%X\n",
-                    module, chan,
-                    (uint32_t) (dmacHw_REG_DSTATAR(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Config (LO)              0x%X\n",
-                    module, chan,
-                    (uint32_t) (dmacHw_REG_CFG_LO(module, chan)));
-               (*fpPrint)
-                   ("Module %d: Channel %d Config (HI)              0x%X\n",
-                    module, chan,
-                    (uint32_t) (dmacHw_REG_CFG_HI(module, chan)));
-       }
-}
-
-/****************************************************************************/
-/**
-*  @brief   Helper function to display descriptor ring
-*
-*  @return  void
-*
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-static void DisplayDescRing(void *pDescriptor, /*   [ IN ] Descriptor buffer */
-                           int (*fpPrint) (const char *, ...)  /*   [ IN ] Callback to the print function */
-    ) {
-       dmacHw_DESC_RING_t *pRing = dmacHw_GET_DESC_RING(pDescriptor);
-       dmacHw_DESC_t *pStart;
-
-       if (pRing->pHead == NULL) {
-               return;
-       }
-
-       pStart = pRing->pHead;
-
-       while ((dmacHw_DESC_t *) pStart->llp != pRing->pHead) {
-               if (pStart == pRing->pHead) {
-                       (*fpPrint) ("Head\n");
-               }
-               if (pStart == pRing->pTail) {
-                       (*fpPrint) ("Tail\n");
-               }
-               if (pStart == pRing->pProg) {
-                       (*fpPrint) ("Prog\n");
-               }
-               if (pStart == pRing->pEnd) {
-                       (*fpPrint) ("End\n");
-               }
-               if (pStart == pRing->pFree) {
-                       (*fpPrint) ("Free\n");
-               }
-               (*fpPrint) ("0x%X:\n", (uint32_t) pStart);
-               (*fpPrint) ("sar    0x%0X\n", pStart->sar);
-               (*fpPrint) ("dar    0x%0X\n", pStart->dar);
-               (*fpPrint) ("llp    0x%0X\n", pStart->llp);
-               (*fpPrint) ("ctl.lo 0x%0X\n", pStart->ctl.lo);
-               (*fpPrint) ("ctl.hi 0x%0X\n", pStart->ctl.hi);
-               (*fpPrint) ("sstat  0x%0X\n", pStart->sstat);
-               (*fpPrint) ("dstat  0x%0X\n", pStart->dstat);
-               (*fpPrint) ("devCtl 0x%0X\n", pStart->devCtl);
-
-               pStart = (dmacHw_DESC_t *) pStart->llp;
-       }
-       if (pStart == pRing->pHead) {
-               (*fpPrint) ("Head\n");
-       }
-       if (pStart == pRing->pTail) {
-               (*fpPrint) ("Tail\n");
-       }
-       if (pStart == pRing->pProg) {
-               (*fpPrint) ("Prog\n");
-       }
-       if (pStart == pRing->pEnd) {
-               (*fpPrint) ("End\n");
-       }
-       if (pStart == pRing->pFree) {
-               (*fpPrint) ("Free\n");
-       }
-       (*fpPrint) ("0x%X:\n", (uint32_t) pStart);
-       (*fpPrint) ("sar    0x%0X\n", pStart->sar);
-       (*fpPrint) ("dar    0x%0X\n", pStart->dar);
-       (*fpPrint) ("llp    0x%0X\n", pStart->llp);
-       (*fpPrint) ("ctl.lo 0x%0X\n", pStart->ctl.lo);
-       (*fpPrint) ("ctl.hi 0x%0X\n", pStart->ctl.hi);
-       (*fpPrint) ("sstat  0x%0X\n", pStart->sstat);
-       (*fpPrint) ("dstat  0x%0X\n", pStart->dstat);
-       (*fpPrint) ("devCtl 0x%0X\n", pStart->devCtl);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Check if DMA channel is the flow controller
-*
-*  @return  1 : If DMA is a flow controller
-*           0 : Peripheral is the flow controller
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-static inline int DmaIsFlowController(void *pDescriptor        /*   [ IN ] Descriptor buffer */
-    ) {
-       uint32_t ttfc =
-           (dmacHw_GET_DESC_RING(pDescriptor))->pTail->ctl.
-           lo & dmacHw_REG_CTL_TTFC_MASK;
-
-       switch (ttfc) {
-       case dmacHw_REG_CTL_TTFC_MM_DMAC:
-       case dmacHw_REG_CTL_TTFC_MP_DMAC:
-       case dmacHw_REG_CTL_TTFC_PM_DMAC:
-       case dmacHw_REG_CTL_TTFC_PP_DMAC:
-               return 1;
-       }
-
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Overwrites data length in the descriptor
-*
-*  This function overwrites data length in the descriptor
-*
-*
-*  @return   void
-*
-*  @note
-*          This is only used for PCM channel
-*/
-/****************************************************************************/
-void dmacHw_setDataLength(dmacHw_CONFIG_t *pConfig,    /*   [ IN ] Configuration settings */
-                         void *pDescriptor,    /*   [ IN ] Descriptor buffer */
-                         size_t dataLen        /*   [ IN ] Data length in bytes */
-    ) {
-       dmacHw_DESC_t *pProg;
-       dmacHw_DESC_t *pHead;
-       int srcTs = 0;
-       int srcTrSize = 0;
-
-       pHead = (dmacHw_GET_DESC_RING(pDescriptor))->pHead;
-       pProg = pHead;
-
-       srcTrSize = dmacHw_GetTrWidthInBytes(pConfig->srcMaxTransactionWidth);
-       srcTs = dataLen / srcTrSize;
-       do {
-               pProg->ctl.hi = srcTs & dmacHw_REG_CTL_BLOCK_TS_MASK;
-               pProg = (dmacHw_DESC_t *) pProg->llp;
-       } while (pProg != pHead);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Clears the interrupt
-*
-*  This function clears the DMA channel specific interrupt
-*
-*
-*  @return   void
-*
-*  @note
-*     Must be called under the context of ISR
-*/
-/****************************************************************************/
-void dmacHw_clearInterrupt(dmacHw_HANDLE_t handle      /* [ IN ] DMA Channel handle */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-
-       dmacHw_TRAN_INT_CLEAR(pCblk->module, pCblk->channel);
-       dmacHw_BLOCK_INT_CLEAR(pCblk->module, pCblk->channel);
-       dmacHw_ERROR_INT_CLEAR(pCblk->module, pCblk->channel);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Returns the cause of channel specific DMA interrupt
-*
-*  This function returns the cause of interrupt
-*
-*  @return  Interrupt status, each bit representing a specific type of interrupt
-*
-*  @note
-*     Should be called under the context of ISR
-*/
-/****************************************************************************/
-dmacHw_INTERRUPT_STATUS_e dmacHw_getInterruptStatus(dmacHw_HANDLE_t handle     /* [ IN ] DMA Channel handle */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-       dmacHw_INTERRUPT_STATUS_e status = dmacHw_INTERRUPT_STATUS_NONE;
-
-       if (dmacHw_REG_INT_STAT_TRAN(pCblk->module) &
-           ((0x00000001 << pCblk->channel))) {
-               status |= dmacHw_INTERRUPT_STATUS_TRANS;
-       }
-       if (dmacHw_REG_INT_STAT_BLOCK(pCblk->module) &
-           ((0x00000001 << pCblk->channel))) {
-               status |= dmacHw_INTERRUPT_STATUS_BLOCK;
-       }
-       if (dmacHw_REG_INT_STAT_ERROR(pCblk->module) &
-           ((0x00000001 << pCblk->channel))) {
-               status |= dmacHw_INTERRUPT_STATUS_ERROR;
-       }
-
-       return status;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Indentifies a DMA channel causing interrupt
-*
-*  This functions returns a channel causing interrupt of type dmacHw_INTERRUPT_STATUS_e
-*
-*  @return  NULL   : No channel causing DMA interrupt
-*           ! NULL : Handle to a channel causing DMA interrupt
-*  @note
-*     dmacHw_clearInterrupt() must be called with a valid handle after calling this function
-*/
-/****************************************************************************/
-dmacHw_HANDLE_t dmacHw_getInterruptSource(void)
-{
-       uint32_t i;
-
-       for (i = 0; i < dmaChannelCount_0 + dmaChannelCount_1; i++) {
-               if ((dmacHw_REG_INT_STAT_TRAN(dmacHw_gCblk[i].module) &
-                    ((0x00000001 << dmacHw_gCblk[i].channel)))
-                   || (dmacHw_REG_INT_STAT_BLOCK(dmacHw_gCblk[i].module) &
-                       ((0x00000001 << dmacHw_gCblk[i].channel)))
-                   || (dmacHw_REG_INT_STAT_ERROR(dmacHw_gCblk[i].module) &
-                       ((0x00000001 << dmacHw_gCblk[i].channel)))
-                   ) {
-                       return dmacHw_CBLK_TO_HANDLE(&dmacHw_gCblk[i]);
-               }
-       }
-       return dmacHw_CBLK_TO_HANDLE(NULL);
-}
-
-/****************************************************************************/
-/**
-*  @brief  Estimates number of descriptor needed to perform certain DMA transfer
-*
-*
-*  @return  On failure : -1
-*           On success : Number of descriptor count
-*
-*
-*/
-/****************************************************************************/
-int dmacHw_calculateDescriptorCount(dmacHw_CONFIG_t *pConfig,  /*   [ IN ] Configuration settings */
-                                   void *pSrcAddr,     /*   [ IN ] Source (Peripheral/Memory) address */
-                                   void *pDstAddr,     /*   [ IN ] Destination (Peripheral/Memory) address */
-                                   size_t dataLen      /*   [ IN ] Data length in bytes */
-    ) {
-       int srcTs = 0;
-       int oddSize = 0;
-       int descCount = 0;
-       int dstTrSize = 0;
-       int srcTrSize = 0;
-       uint32_t maxBlockSize = dmacHw_MAX_BLOCKSIZE;
-       dmacHw_TRANSACTION_WIDTH_e dstTrWidth;
-       dmacHw_TRANSACTION_WIDTH_e srcTrWidth;
-
-       dstTrSize = dmacHw_GetTrWidthInBytes(pConfig->dstMaxTransactionWidth);
-       srcTrSize = dmacHw_GetTrWidthInBytes(pConfig->srcMaxTransactionWidth);
-
-       /* Skip Tx if buffer is NULL  or length is unknown */
-       if ((pSrcAddr == NULL) || (pDstAddr == NULL) || (dataLen == 0)) {
-               /* Do not initiate transfer */
-               return -1;
-       }
-
-       /* Ensure scatter and gather are transaction aligned */
-       if (pConfig->srcGatherWidth % srcTrSize
-           || pConfig->dstScatterWidth % dstTrSize) {
-               return -1;
-       }
-
-       /*
-          Background 1: DMAC can not perform DMA if source and destination addresses are
-          not properly aligned with the channel's transaction width. So, for successful
-          DMA transfer, transaction width must be set according to the alignment of the
-          source and destination address.
-        */
-
-       /* Adjust destination transaction width if destination address is not aligned properly */
-       dstTrWidth = pConfig->dstMaxTransactionWidth;
-       while (dmacHw_ADDRESS_MASK(dstTrSize) & (uint32_t) pDstAddr) {
-               dstTrWidth = dmacHw_GetNextTrWidth(dstTrWidth);
-               dstTrSize = dmacHw_GetTrWidthInBytes(dstTrWidth);
-       }
-
-       /* Adjust source transaction width if source address is not aligned properly */
-       srcTrWidth = pConfig->srcMaxTransactionWidth;
-       while (dmacHw_ADDRESS_MASK(srcTrSize) & (uint32_t) pSrcAddr) {
-               srcTrWidth = dmacHw_GetNextTrWidth(srcTrWidth);
-               srcTrSize = dmacHw_GetTrWidthInBytes(srcTrWidth);
-       }
-
-       /* Find the maximum transaction per descriptor */
-       if (pConfig->maxDataPerBlock
-           && ((pConfig->maxDataPerBlock / srcTrSize) <
-               dmacHw_MAX_BLOCKSIZE)) {
-               maxBlockSize = pConfig->maxDataPerBlock / srcTrSize;
-       }
-
-       /* Find number of source transactions needed to complete the DMA transfer */
-       srcTs = dataLen / srcTrSize;
-       /* Find the odd number of bytes that need to be transferred as single byte transaction width */
-       if (srcTs && (dstTrSize > srcTrSize)) {
-               oddSize = dataLen % dstTrSize;
-               /* Adjust source transaction count due to "oddSize" */
-               srcTs = srcTs - (oddSize / srcTrSize);
-       } else {
-               oddSize = dataLen % srcTrSize;
-       }
-       /* Adjust "descCount" due to "oddSize" */
-       if (oddSize) {
-               descCount++;
-       }
-
-       /* Find the number of descriptor needed for total "srcTs" */
-       if (srcTs) {
-               descCount += ((srcTs - 1) / maxBlockSize) + 1;
-       }
-
-       return descCount;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Check the existence of pending descriptor
-*
-*  This function confirmes if there is any pending descriptor in the chain
-*  to program the channel
-*
-*  @return  1 : Channel need to be programmed with pending descriptor
-*           0 : No more pending descriptor to programe the channel
-*
-*  @note
-*     - This function should be called from ISR in case there are pending
-*       descriptor to program the channel.
-*
-*     Example:
-*
-*     dmac_isr ()
-*     {
-*         ...
-*         if (dmacHw_descriptorPending (handle))
-*         {
-*            dmacHw_initiateTransfer (handle);
-*         }
-*     }
-*
-*/
-/****************************************************************************/
-uint32_t dmacHw_descriptorPending(dmacHw_HANDLE_t handle,      /*   [ IN ] DMA Channel handle */
-                                 void *pDescriptor     /*   [ IN ] Descriptor buffer */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-       dmacHw_DESC_RING_t *pRing = dmacHw_GET_DESC_RING(pDescriptor);
-
-       /* Make sure channel is not busy */
-       if (!CHANNEL_BUSY(pCblk->module, pCblk->channel)) {
-               /* Check if pEnd is not processed */
-               if (pRing->pEnd) {
-                       /* Something left for processing */
-                       return 1;
-               }
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Program channel register to stop transfer
-*
-*  Ensures the channel is not doing any transfer after calling this function
-*
-*  @return  void
-*
-*/
-/****************************************************************************/
-void dmacHw_stopTransfer(dmacHw_HANDLE_t handle        /*   [ IN ] DMA Channel handle */
-    ) {
-       dmacHw_CBLK_t *pCblk;
-
-       pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-
-       /* Stop the channel */
-       dmacHw_DMA_STOP(pCblk->module, pCblk->channel);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Deallocates source or destination memory, allocated
-*
-*  This function can be called to deallocate data memory that was DMAed successfully
-*
-*  @return  On failure : -1
-*           On success : Number of buffer freed
-*
-*  @note
-*     This function will be called ONLY, when source OR destination address is pointing
-*     to dynamic memory
-*/
-/****************************************************************************/
-int dmacHw_freeMem(dmacHw_CONFIG_t *pConfig,   /*   [ IN ] Configuration settings */
-                  void *pDescriptor,   /*   [ IN ] Descriptor buffer */
-                  void (*fpFree) (void *)      /*   [ IN ] Function pointer to free data memory */
-    ) {
-       dmacHw_DESC_RING_t *pRing = dmacHw_GET_DESC_RING(pDescriptor);
-       uint32_t count = 0;
-
-       if (fpFree == NULL) {
-               return -1;
-       }
-
-       while ((pRing->pFree != pRing->pTail)
-              && (pRing->pFree->ctl.lo & dmacHw_DESC_FREE)) {
-               if (pRing->pFree->devCtl == dmacHw_FREE_USER_MEMORY) {
-                       /* Identify, which memory to free */
-                       if (dmacHw_DST_IS_MEMORY(pConfig->transferType)) {
-                               (*fpFree) ((void *)pRing->pFree->dar);
-                       } else {
-                               /* Destination was a peripheral */
-                               (*fpFree) ((void *)pRing->pFree->sar);
-                       }
-                       /* Unmark user memory to indicate it is freed */
-                       pRing->pFree->devCtl = ~dmacHw_FREE_USER_MEMORY;
-               }
-               dmacHw_NEXT_DESC(pRing, pFree);
-
-               count++;
-       }
-
-       return count;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Prepares descriptor ring, when source peripheral working as a flow controller
-*
-*  This function will update the discriptor ring by allocating buffers, when source peripheral
-*  has to work as a flow controller to transfer data from:
-*           - Peripheral to memory.
-*
-*  @return  On failure : -1
-*           On success : Number of descriptor updated
-*
-*
-*  @note
-*     Channel must be configured for peripheral to memory transfer
-*
-*/
-/****************************************************************************/
-int dmacHw_setVariableDataDescriptor(dmacHw_HANDLE_t handle,   /*   [ IN ] DMA Channel handle */
-                                    dmacHw_CONFIG_t *pConfig,  /*   [ IN ] Configuration settings */
-                                    void *pDescriptor, /*   [ IN ] Descriptor buffer */
-                                    uint32_t srcAddr,  /*   [ IN ] Source peripheral address */
-                                    void *(*fpAlloc) (int len),        /*   [ IN ] Function pointer  that provides destination memory */
-                                    int len,   /*   [ IN ] Number of bytes "fpAlloc" will allocate for destination */
-                                    int num    /*   [ IN ] Number of descriptor to set */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-       dmacHw_DESC_t *pProg = NULL;
-       dmacHw_DESC_t *pLast = NULL;
-       dmacHw_DESC_RING_t *pRing = dmacHw_GET_DESC_RING(pDescriptor);
-       uint32_t dstAddr;
-       uint32_t controlParam;
-       int i;
-
-       dmacHw_ASSERT(pConfig->transferType ==
-                     dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM);
-
-       if (num > pRing->num) {
-               return -1;
-       }
-
-       pLast = pRing->pEnd;    /* Last descriptor updated */
-       pProg = pRing->pHead;   /* First descriptor in the new list */
-
-       controlParam = pConfig->srcUpdate |
-           pConfig->dstUpdate |
-           pConfig->srcMaxTransactionWidth |
-           pConfig->dstMaxTransactionWidth |
-           pConfig->srcMasterInterface |
-           pConfig->dstMasterInterface |
-           pConfig->srcMaxBurstWidth |
-           pConfig->dstMaxBurstWidth |
-           dmacHw_REG_CTL_TTFC_PM_PERI |
-           dmacHw_REG_CTL_LLP_DST_EN |
-           dmacHw_REG_CTL_LLP_SRC_EN | dmacHw_REG_CTL_INT_EN;
-
-       for (i = 0; i < num; i++) {
-               /* Allocate Rx buffer only for idle descriptor */
-               if (((pRing->pHead->ctl.hi & dmacHw_DESC_FREE) == 0) ||
-                   ((dmacHw_DESC_t *) pRing->pHead->llp == pRing->pTail)
-                   ) {
-                       /* Rx descriptor is not idle */
-                       break;
-               }
-               /* Set source address */
-               pRing->pHead->sar = srcAddr;
-               if (fpAlloc) {
-                       /* Allocate memory for buffer in descriptor */
-                       dstAddr = (uint32_t) (*fpAlloc) (len);
-                       /* Check the destination address */
-                       if (dstAddr == 0) {
-                               if (i == 0) {
-                                       /* Not a single descriptor is available */
-                                       return -1;
-                               }
-                               break;
-                       }
-                       /* Set destination address */
-                       pRing->pHead->dar = dstAddr;
-               }
-               /* Set control information */
-               pRing->pHead->ctl.lo = controlParam;
-               /* Use "devCtl" to mark the memory that need to be freed later */
-               pRing->pHead->devCtl = dmacHw_FREE_USER_MEMORY;
-               /* Descriptor is now owned by the channel */
-               pRing->pHead->ctl.hi = 0;
-               /* Remember the descriptor last updated */
-               pRing->pEnd = pRing->pHead;
-               /* Update next descriptor */
-               dmacHw_NEXT_DESC(pRing, pHead);
-       }
-
-       /* Mark the end of the list */
-       pRing->pEnd->ctl.lo &=
-           ~(dmacHw_REG_CTL_LLP_DST_EN | dmacHw_REG_CTL_LLP_SRC_EN);
-       /* Connect the list */
-       if (pLast != pProg) {
-               pLast->ctl.lo |=
-                   dmacHw_REG_CTL_LLP_DST_EN | dmacHw_REG_CTL_LLP_SRC_EN;
-       }
-       /* Mark the descriptors are updated */
-       pCblk->descUpdated = 1;
-       if (!pCblk->varDataStarted) {
-               /* LLP must be pointing to the first descriptor */
-               dmacHw_SET_LLP(pCblk->module, pCblk->channel,
-                              (uint32_t) pProg - pRing->virt2PhyOffset);
-               /* Channel, handling variable data started */
-               pCblk->varDataStarted = 1;
-       }
-
-       return i;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Read data DMAed to memory
-*
-*  This function will read data that has been DMAed to memory while transferring from:
-*          - Memory to memory
-*          - Peripheral to memory
-*
-*  @param    handle     -
-*  @param    ppBbuf     -
-*  @param    pLen       -
-*
-*  @return  0 - No more data is available to read
-*           1 - More data might be available to read
-*
-*/
-/****************************************************************************/
-int dmacHw_readTransferredData(dmacHw_HANDLE_t handle, /*  [ IN ] DMA Channel handle */
-                              dmacHw_CONFIG_t *pConfig,        /*   [ IN ]  Configuration settings */
-                              void *pDescriptor,       /*   [ IN ] Descriptor buffer */
-                              void **ppBbuf,   /*   [ OUT ] Data received */
-                              size_t *pLlen    /*   [ OUT ] Length of the data received */
-    ) {
-       dmacHw_DESC_RING_t *pRing = dmacHw_GET_DESC_RING(pDescriptor);
-
-       (void)handle;
-
-       if (pConfig->transferMode != dmacHw_TRANSFER_MODE_CONTINUOUS) {
-               if (((pRing->pTail->ctl.hi & dmacHw_DESC_FREE) == 0) ||
-                   (pRing->pTail == pRing->pHead)
-                   ) {
-                       /* No receive data available */
-                       *ppBbuf = (char *)NULL;
-                       *pLlen = 0;
-
-                       return 0;
-               }
-       }
-
-       /* Return read buffer and length */
-       *ppBbuf = (char *)pRing->pTail->dar;
-
-       /* Extract length of the received data */
-       if (DmaIsFlowController(pDescriptor)) {
-               uint32_t srcTrSize = 0;
-
-               switch (pRing->pTail->ctl.lo & dmacHw_REG_CTL_SRC_TR_WIDTH_MASK) {
-               case dmacHw_REG_CTL_SRC_TR_WIDTH_8:
-                       srcTrSize = 1;
-                       break;
-               case dmacHw_REG_CTL_SRC_TR_WIDTH_16:
-                       srcTrSize = 2;
-                       break;
-               case dmacHw_REG_CTL_SRC_TR_WIDTH_32:
-                       srcTrSize = 4;
-                       break;
-               case dmacHw_REG_CTL_SRC_TR_WIDTH_64:
-                       srcTrSize = 8;
-                       break;
-               default:
-                       dmacHw_ASSERT(0);
-               }
-               /* Calculate length from the block size */
-               *pLlen =
-                   (pRing->pTail->ctl.hi & dmacHw_REG_CTL_BLOCK_TS_MASK) *
-                   srcTrSize;
-       } else {
-               /* Extract length from the source peripheral */
-               *pLlen = pRing->pTail->sstat;
-       }
-
-       /* Advance tail to next descriptor */
-       dmacHw_NEXT_DESC(pRing, pTail);
-
-       return 1;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Set descriptor carrying control information
-*
-*  This function will be used to send specific control information to the device
-*  using the DMA channel
-*
-*
-*  @return  -1 - On failure
-*            0 - On success
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-int dmacHw_setControlDescriptor(dmacHw_CONFIG_t *pConfig,      /*   [ IN ] Configuration settings */
-                               void *pDescriptor,      /*   [ IN ] Descriptor buffer */
-                               uint32_t ctlAddress,    /*   [ IN ] Address of the device control register */
-                               uint32_t control        /*   [ IN ] Device control information */
-    ) {
-       dmacHw_DESC_RING_t *pRing = dmacHw_GET_DESC_RING(pDescriptor);
-
-       if (ctlAddress == 0) {
-               return -1;
-       }
-
-       /* Check the availability of descriptors in the ring */
-       if ((pRing->pHead->ctl.hi & dmacHw_DESC_FREE) == 0) {
-               return -1;
-       }
-       /* Set control information */
-       pRing->pHead->devCtl = control;
-       /* Set source and destination address */
-       pRing->pHead->sar = (uint32_t) &pRing->pHead->devCtl;
-       pRing->pHead->dar = ctlAddress;
-       /* Set control parameters */
-       if (pConfig->flowControler == dmacHw_FLOW_CONTROL_DMA) {
-               pRing->pHead->ctl.lo = pConfig->transferType |
-                   dmacHw_SRC_ADDRESS_UPDATE_MODE_INC |
-                   dmacHw_DST_ADDRESS_UPDATE_MODE_INC |
-                   dmacHw_SRC_TRANSACTION_WIDTH_32 |
-                   pConfig->dstMaxTransactionWidth |
-                   dmacHw_SRC_BURST_WIDTH_0 |
-                   dmacHw_DST_BURST_WIDTH_0 |
-                   pConfig->srcMasterInterface |
-                   pConfig->dstMasterInterface | dmacHw_REG_CTL_INT_EN;
-       } else {
-               uint32_t transferType = 0;
-               switch (pConfig->transferType) {
-               case dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM:
-                       transferType = dmacHw_REG_CTL_TTFC_PM_PERI;
-                       break;
-               case dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL:
-                       transferType = dmacHw_REG_CTL_TTFC_MP_PERI;
-                       break;
-               default:
-                       dmacHw_ASSERT(0);
-               }
-               pRing->pHead->ctl.lo = transferType |
-                   dmacHw_SRC_ADDRESS_UPDATE_MODE_INC |
-                   dmacHw_DST_ADDRESS_UPDATE_MODE_INC |
-                   dmacHw_SRC_TRANSACTION_WIDTH_32 |
-                   pConfig->dstMaxTransactionWidth |
-                   dmacHw_SRC_BURST_WIDTH_0 |
-                   dmacHw_DST_BURST_WIDTH_0 |
-                   pConfig->srcMasterInterface |
-                   pConfig->dstMasterInterface |
-                   pConfig->flowControler | dmacHw_REG_CTL_INT_EN;
-       }
-
-       /* Set block transaction size to one 32 bit transaction */
-       pRing->pHead->ctl.hi = dmacHw_REG_CTL_BLOCK_TS_MASK & 1;
-
-       /* Remember the descriptor to initialize the registers */
-       if (pRing->pProg == dmacHw_DESC_INIT) {
-               pRing->pProg = pRing->pHead;
-       }
-       pRing->pEnd = pRing->pHead;
-
-       /* Advance the descriptor */
-       dmacHw_NEXT_DESC(pRing, pHead);
-
-       /* Update Tail pointer if destination is a peripheral */
-       if (!dmacHw_DST_IS_MEMORY(pConfig->transferType)) {
-               pRing->pTail = pRing->pHead;
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Sets channel specific user data
-*
-*  This function associates user data to a specific DMA channel
-*
-*/
-/****************************************************************************/
-void dmacHw_setChannelUserData(dmacHw_HANDLE_t handle, /*  [ IN ] DMA Channel handle */
-                              void *userData   /*  [ IN ] User data */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-
-       pCblk->userData = userData;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Gets channel specific user data
-*
-*  This function returns user data specific to a DMA channel
-*
-*  @return   user data
-*/
-/****************************************************************************/
-void *dmacHw_getChannelUserData(dmacHw_HANDLE_t handle /*  [ IN ] DMA Channel handle */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-
-       return pCblk->userData;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Resets descriptor control information
-*
-*  @return  void
-*/
-/****************************************************************************/
-void dmacHw_resetDescriptorControl(void *pDescriptor   /*   [ IN ] Descriptor buffer  */
-    ) {
-       int i;
-       dmacHw_DESC_RING_t *pRing;
-       dmacHw_DESC_t *pDesc;
-
-       pRing = dmacHw_GET_DESC_RING(pDescriptor);
-       pDesc = pRing->pHead;
-
-       for (i = 0; i < pRing->num; i++) {
-               /* Mark descriptor is ready to use */
-               pDesc->ctl.hi = dmacHw_DESC_FREE;
-               /* Look into next link list item */
-               pDesc++;
-       }
-       pRing->pFree = pRing->pTail = pRing->pEnd = pRing->pHead;
-       pRing->pProg = dmacHw_DESC_INIT;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Displays channel specific registers and other control parameters
-*
-*  @return  void
-*
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-void dmacHw_printDebugInfo(dmacHw_HANDLE_t handle,     /*  [ IN ] DMA Channel handle */
-                          void *pDescriptor,   /*   [ IN ] Descriptor buffer */
-                          int (*fpPrint) (const char *, ...)   /*  [ IN ] Print callback function */
-    ) {
-       dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
-
-       DisplayRegisterContents(pCblk->module, pCblk->channel, fpPrint);
-       DisplayDescRing(pDescriptor, fpPrint);
-}
diff --git a/arch/arm/mach-bcmring/csp/tmr/Makefile b/arch/arm/mach-bcmring/csp/tmr/Makefile
deleted file mode 100644 (file)
index 244a61a..0000000
+++ /dev/null
@@ -1 +0,0 @@
-obj-y += tmrHw.o
diff --git a/arch/arm/mach-bcmring/csp/tmr/tmrHw.c b/arch/arm/mach-bcmring/csp/tmr/tmrHw.c
deleted file mode 100644 (file)
index 16225e4..0000000
+++ /dev/null
@@ -1,576 +0,0 @@
-/*****************************************************************************
-* Copyright 2003 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*  @file    tmrHw.c
-*
-*  @brief   Low level Timer driver routines
-*
-*  @note
-*
-*   These routines provide basic timer functionality only.
-*/
-/****************************************************************************/
-
-/* ---- Include Files ---------------------------------------------------- */
-
-#include <csp/errno.h>
-#include <csp/stdint.h>
-
-#include <csp/tmrHw.h>
-#include <mach/csp/tmrHw_reg.h>
-
-#define tmrHw_ASSERT(a)                     if (!(a)) *(char *)0 = 0
-#define tmrHw_MILLISEC_PER_SEC              (1000)
-
-#define tmrHw_LOW_1_RESOLUTION_COUNT        (tmrHw_LOW_RESOLUTION_CLOCK / tmrHw_MILLISEC_PER_SEC)
-#define tmrHw_LOW_1_MAX_MILLISEC            (0xFFFFFFFF / tmrHw_LOW_1_RESOLUTION_COUNT)
-#define tmrHw_LOW_16_RESOLUTION_COUNT       (tmrHw_LOW_1_RESOLUTION_COUNT / 16)
-#define tmrHw_LOW_16_MAX_MILLISEC           (0xFFFFFFFF / tmrHw_LOW_16_RESOLUTION_COUNT)
-#define tmrHw_LOW_256_RESOLUTION_COUNT      (tmrHw_LOW_1_RESOLUTION_COUNT / 256)
-#define tmrHw_LOW_256_MAX_MILLISEC          (0xFFFFFFFF / tmrHw_LOW_256_RESOLUTION_COUNT)
-
-#define tmrHw_HIGH_1_RESOLUTION_COUNT       (tmrHw_HIGH_RESOLUTION_CLOCK / tmrHw_MILLISEC_PER_SEC)
-#define tmrHw_HIGH_1_MAX_MILLISEC           (0xFFFFFFFF / tmrHw_HIGH_1_RESOLUTION_COUNT)
-#define tmrHw_HIGH_16_RESOLUTION_COUNT      (tmrHw_HIGH_1_RESOLUTION_COUNT / 16)
-#define tmrHw_HIGH_16_MAX_MILLISEC          (0xFFFFFFFF / tmrHw_HIGH_16_RESOLUTION_COUNT)
-#define tmrHw_HIGH_256_RESOLUTION_COUNT     (tmrHw_HIGH_1_RESOLUTION_COUNT / 256)
-#define tmrHw_HIGH_256_MAX_MILLISEC         (0xFFFFFFFF / tmrHw_HIGH_256_RESOLUTION_COUNT)
-
-static void ResetTimer(tmrHw_ID_t timerId)
-    __attribute__ ((section(".aramtext")));
-static int tmrHw_divide(int num, int denom)
-    __attribute__ ((section(".aramtext")));
-
-/****************************************************************************/
-/**
-*  @brief   Get timer capability
-*
-*  This function returns various capabilities/attributes of a timer
-*
-*  @return  Capability
-*
-*/
-/****************************************************************************/
-uint32_t tmrHw_getTimerCapability(tmrHw_ID_t timerId,  /*  [ IN ] Timer Id */
-                                 tmrHw_CAPABILITY_e capability /*  [ IN ] Timer capability */
-) {
-       switch (capability) {
-       case tmrHw_CAPABILITY_CLOCK:
-               return (timerId <=
-                       1) ? tmrHw_LOW_RESOLUTION_CLOCK :
-                   tmrHw_HIGH_RESOLUTION_CLOCK;
-       case tmrHw_CAPABILITY_RESOLUTION:
-               return 32;
-       default:
-               return 0;
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Resets a timer
-*
-*  This function initializes  timer
-*
-*  @return  void
-*
-*/
-/****************************************************************************/
-static void ResetTimer(tmrHw_ID_t timerId      /*  [ IN ] Timer Id */
-) {
-       /* Reset timer */
-       pTmrHw[timerId].LoadValue = 0;
-       pTmrHw[timerId].CurrentValue = 0xFFFFFFFF;
-       pTmrHw[timerId].Control = 0;
-       pTmrHw[timerId].BackgroundLoad = 0;
-       /* Always configure as a 32 bit timer */
-       pTmrHw[timerId].Control |= tmrHw_CONTROL_32BIT;
-       /* Clear interrupt only if raw status interrupt is set */
-       if (pTmrHw[timerId].RawInterruptStatus) {
-               pTmrHw[timerId].InterruptClear = 0xFFFFFFFF;
-       }
-}
-
-/****************************************************************************/
-/**
-*  @brief   Sets counter value for an interval in ms
-*
-*  @return   On success: Effective counter value set
-*            On failure: 0
-*
-*/
-/****************************************************************************/
-static tmrHw_INTERVAL_t SetTimerPeriod(tmrHw_ID_t timerId,     /*  [ IN ] Timer Id */
-                                      tmrHw_INTERVAL_t msec    /*  [ IN ] Interval in milli-second */
-) {
-       uint32_t scale = 0;
-       uint32_t count = 0;
-
-       if (timerId == 0 || timerId == 1) {
-               if (msec <= tmrHw_LOW_1_MAX_MILLISEC) {
-                       pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
-                       scale = tmrHw_LOW_1_RESOLUTION_COUNT;
-               } else if (msec <= tmrHw_LOW_16_MAX_MILLISEC) {
-                       pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_16;
-                       scale = tmrHw_LOW_16_RESOLUTION_COUNT;
-               } else if (msec <= tmrHw_LOW_256_MAX_MILLISEC) {
-                       pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_256;
-                       scale = tmrHw_LOW_256_RESOLUTION_COUNT;
-               } else {
-                       return 0;
-               }
-
-               count = msec * scale;
-               /* Set counter value */
-               pTmrHw[timerId].LoadValue = count;
-               pTmrHw[timerId].BackgroundLoad = count;
-
-       } else if (timerId == 2 || timerId == 3) {
-               if (msec <= tmrHw_HIGH_1_MAX_MILLISEC) {
-                       pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
-                       scale = tmrHw_HIGH_1_RESOLUTION_COUNT;
-               } else if (msec <= tmrHw_HIGH_16_MAX_MILLISEC) {
-                       pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_16;
-                       scale = tmrHw_HIGH_16_RESOLUTION_COUNT;
-               } else if (msec <= tmrHw_HIGH_256_MAX_MILLISEC) {
-                       pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_256;
-                       scale = tmrHw_HIGH_256_RESOLUTION_COUNT;
-               } else {
-                       return 0;
-               }
-
-               count = msec * scale;
-               /* Set counter value */
-               pTmrHw[timerId].LoadValue = count;
-               pTmrHw[timerId].BackgroundLoad = count;
-       }
-       return count / scale;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Configures a periodic timer in terms of timer interrupt rate
-*
-*  This function initializes a periodic timer to generate specific number of
-*  timer interrupt per second
-*
-*  @return   On success: Effective timer frequency
-*            On failure: 0
-*
-*/
-/****************************************************************************/
-tmrHw_RATE_t tmrHw_setPeriodicTimerRate(tmrHw_ID_t timerId,    /*  [ IN ] Timer Id */
-                                       tmrHw_RATE_t rate       /*  [ IN ] Number of timer interrupt per second */
-) {
-       uint32_t resolution = 0;
-       uint32_t count = 0;
-       ResetTimer(timerId);
-
-       /* Set timer mode periodic */
-       pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
-       pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
-       /* Set timer in highest resolution */
-       pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
-
-       if (rate && (timerId == 0 || timerId == 1)) {
-               if (rate > tmrHw_LOW_RESOLUTION_CLOCK) {
-                       return 0;
-               }
-               resolution = tmrHw_LOW_RESOLUTION_CLOCK;
-       } else if (rate && (timerId == 2 || timerId == 3)) {
-               if (rate > tmrHw_HIGH_RESOLUTION_CLOCK) {
-                       return 0;
-               } else {
-                       resolution = tmrHw_HIGH_RESOLUTION_CLOCK;
-               }
-       } else {
-               return 0;
-       }
-       /* Find the counter value */
-       count = resolution / rate;
-       /* Set counter value */
-       pTmrHw[timerId].LoadValue = count;
-       pTmrHw[timerId].BackgroundLoad = count;
-
-       return resolution / count;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Configures a periodic timer to generate timer interrupt after
-*           certain time interval
-*
-*  This function initializes a periodic timer to generate timer interrupt
-*  after every time interval in millisecond
-*
-*  @return   On success: Effective interval set in milli-second
-*            On failure: 0
-*
-*/
-/****************************************************************************/
-tmrHw_INTERVAL_t tmrHw_setPeriodicTimerInterval(tmrHw_ID_t timerId,    /*  [ IN ] Timer Id */
-                                               tmrHw_INTERVAL_t msec   /*  [ IN ] Interval in milli-second */
-) {
-       ResetTimer(timerId);
-
-       /* Set timer mode periodic */
-       pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
-       pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
-
-       return SetTimerPeriod(timerId, msec);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Configures a periodic timer to generate timer interrupt just once
-*           after certain time interval
-*
-*  This function initializes a periodic timer to generate a single ticks after
-*  certain time interval in millisecond
-*
-*  @return   On success: Effective interval set in milli-second
-*            On failure: 0
-*
-*/
-/****************************************************************************/
-tmrHw_INTERVAL_t tmrHw_setOneshotTimerInterval(tmrHw_ID_t timerId,     /*  [ IN ] Timer Id */
-                                              tmrHw_INTERVAL_t msec    /*  [ IN ] Interval in milli-second */
-) {
-       ResetTimer(timerId);
-
-       /* Set timer mode oneshot */
-       pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
-       pTmrHw[timerId].Control |= tmrHw_CONTROL_ONESHOT;
-
-       return SetTimerPeriod(timerId, msec);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Configures a timer to run as a free running timer
-*
-*  This function initializes a timer to run as a free running timer
-*
-*  @return   Timer resolution (count / sec)
-*
-*/
-/****************************************************************************/
-tmrHw_RATE_t tmrHw_setFreeRunningTimer(tmrHw_ID_t timerId,     /*  [ IN ] Timer Id */
-                                      uint32_t divider /*  [ IN ] Dividing the clock frequency */
-) {
-       uint32_t scale = 0;
-
-       ResetTimer(timerId);
-       /* Set timer as free running mode */
-       pTmrHw[timerId].Control &= ~tmrHw_CONTROL_PERIODIC;
-       pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
-
-       if (divider >= 64) {
-               pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_256;
-               scale = 256;
-       } else if (divider >= 8) {
-               pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_16;
-               scale = 16;
-       } else {
-               pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
-               scale = 1;
-       }
-
-       if (timerId == 0 || timerId == 1) {
-               return tmrHw_divide(tmrHw_LOW_RESOLUTION_CLOCK, scale);
-       } else if (timerId == 2 || timerId == 3) {
-               return tmrHw_divide(tmrHw_HIGH_RESOLUTION_CLOCK, scale);
-       }
-
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Starts a timer
-*
-*  This function starts a preconfigured timer
-*
-*  @return  -1     - On Failure
-*            0     - On Success
-*
-*/
-/****************************************************************************/
-int tmrHw_startTimer(tmrHw_ID_t timerId        /*  [ IN ] Timer id */
-) {
-       pTmrHw[timerId].Control |= tmrHw_CONTROL_TIMER_ENABLE;
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Stops a timer
-*
-*  This function stops a running timer
-*
-*  @return  -1     - On Failure
-*            0     - On Success
-*
-*/
-/****************************************************************************/
-int tmrHw_stopTimer(tmrHw_ID_t timerId /*  [ IN ] Timer id */
-) {
-       pTmrHw[timerId].Control &= ~tmrHw_CONTROL_TIMER_ENABLE;
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Gets current timer count
-*
-*  This function returns the current timer value
-*
-*  @return  Current downcounting timer value
-*
-*/
-/****************************************************************************/
-uint32_t tmrHw_GetCurrentCount(tmrHw_ID_t timerId      /*  [ IN ] Timer id */
-) {
-       /* return 32 bit timer value */
-       switch (pTmrHw[timerId].Control & tmrHw_CONTROL_MODE_MASK) {
-       case tmrHw_CONTROL_FREE_RUNNING:
-               if (pTmrHw[timerId].CurrentValue) {
-                       return tmrHw_MAX_COUNT - pTmrHw[timerId].CurrentValue;
-               }
-               break;
-       case tmrHw_CONTROL_PERIODIC:
-       case tmrHw_CONTROL_ONESHOT:
-               return pTmrHw[timerId].BackgroundLoad -
-                   pTmrHw[timerId].CurrentValue;
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Gets timer count rate
-*
-*  This function returns the number of counts per second
-*
-*  @return  Count rate
-*
-*/
-/****************************************************************************/
-tmrHw_RATE_t tmrHw_getCountRate(tmrHw_ID_t timerId     /*  [ IN ] Timer id */
-) {
-       uint32_t divider = 0;
-
-       switch (pTmrHw[timerId].Control & tmrHw_CONTROL_PRESCALE_MASK) {
-       case tmrHw_CONTROL_PRESCALE_1:
-               divider = 1;
-               break;
-       case tmrHw_CONTROL_PRESCALE_16:
-               divider = 16;
-               break;
-       case tmrHw_CONTROL_PRESCALE_256:
-               divider = 256;
-               break;
-       default:
-               tmrHw_ASSERT(0);
-       }
-
-       if (timerId == 0 || timerId == 1) {
-               return tmrHw_divide(tmrHw_LOW_RESOLUTION_CLOCK, divider);
-       } else {
-               return tmrHw_divide(tmrHw_HIGH_RESOLUTION_CLOCK, divider);
-       }
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Enables timer interrupt
-*
-*  This function enables the timer interrupt
-*
-*  @return   N/A
-*
-*/
-/****************************************************************************/
-void tmrHw_enableInterrupt(tmrHw_ID_t timerId  /*  [ IN ] Timer id */
-) {
-       pTmrHw[timerId].Control |= tmrHw_CONTROL_INTERRUPT_ENABLE;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Disables timer interrupt
-*
-*  This function disable the timer interrupt
-*
-*  @return   N/A
-*
-*/
-/****************************************************************************/
-void tmrHw_disableInterrupt(tmrHw_ID_t timerId /*  [ IN ] Timer id */
-) {
-       pTmrHw[timerId].Control &= ~tmrHw_CONTROL_INTERRUPT_ENABLE;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Clears the interrupt
-*
-*  This function clears the timer interrupt
-*
-*  @return   N/A
-*
-*  @note
-*     Must be called under the context of ISR
-*/
-/****************************************************************************/
-void tmrHw_clearInterrupt(tmrHw_ID_t timerId   /*  [ IN ] Timer id */
-) {
-       pTmrHw[timerId].InterruptClear = 0x1;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Gets the interrupt status
-*
-*  This function returns timer interrupt status
-*
-*  @return   Interrupt status
-*/
-/****************************************************************************/
-tmrHw_INTERRUPT_STATUS_e tmrHw_getInterruptStatus(tmrHw_ID_t timerId   /*  [ IN ] Timer id */
-) {
-       if (pTmrHw[timerId].InterruptStatus) {
-               return tmrHw_INTERRUPT_STATUS_SET;
-       } else {
-               return tmrHw_INTERRUPT_STATUS_UNSET;
-       }
-}
-
-/****************************************************************************/
-/**
-*  @brief   Indentifies a timer causing interrupt
-*
-*  This functions returns a timer causing interrupt
-*
-*  @return  0xFFFFFFFF   : No timer causing an interrupt
-*           ! 0xFFFFFFFF : timer causing an interrupt
-*  @note
-*     tmrHw_clearIntrrupt() must be called with a valid timer id after calling this function
-*/
-/****************************************************************************/
-tmrHw_ID_t tmrHw_getInterruptSource(void       /*  void */
-) {
-       int i;
-
-       for (i = 0; i < tmrHw_TIMER_NUM_COUNT; i++) {
-               if (pTmrHw[i].InterruptStatus) {
-                       return i;
-               }
-       }
-
-       return 0xFFFFFFFF;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Displays specific timer registers
-*
-*
-*  @return  void
-*
-*/
-/****************************************************************************/
-void tmrHw_printDebugInfo(tmrHw_ID_t timerId,  /*  [ IN ] Timer id */
-                         int (*fpPrint) (const char *, ...)    /*  [ IN ] Print callback function */
-) {
-       (*fpPrint) ("Displaying register contents \n\n");
-       (*fpPrint) ("Timer %d: Load value              0x%X\n", timerId,
-                   pTmrHw[timerId].LoadValue);
-       (*fpPrint) ("Timer %d: Background load value   0x%X\n", timerId,
-                   pTmrHw[timerId].BackgroundLoad);
-       (*fpPrint) ("Timer %d: Control                 0x%X\n", timerId,
-                   pTmrHw[timerId].Control);
-       (*fpPrint) ("Timer %d: Interrupt clear         0x%X\n", timerId,
-                   pTmrHw[timerId].InterruptClear);
-       (*fpPrint) ("Timer %d: Interrupt raw interrupt 0x%X\n", timerId,
-                   pTmrHw[timerId].RawInterruptStatus);
-       (*fpPrint) ("Timer %d: Interrupt status        0x%X\n", timerId,
-                   pTmrHw[timerId].InterruptStatus);
-}
-
-/****************************************************************************/
-/**
-*  @brief   Use a timer to perform a busy wait delay for a number of usecs.
-*
-*  @return   N/A
-*/
-/****************************************************************************/
-void tmrHw_udelay(tmrHw_ID_t timerId,  /*  [ IN ] Timer id */
-                 unsigned long usecs /*  [ IN ] usec to delay */
-) {
-       tmrHw_RATE_t usec_tick_rate;
-       tmrHw_COUNT_t start_time;
-       tmrHw_COUNT_t delta_time;
-
-       start_time = tmrHw_GetCurrentCount(timerId);
-       usec_tick_rate = tmrHw_divide(tmrHw_getCountRate(timerId), 1000000);
-       delta_time = usecs * usec_tick_rate;
-
-       /* Busy wait */
-       while (delta_time > (tmrHw_GetCurrentCount(timerId) - start_time))
-               ;
-}
-
-/****************************************************************************/
-/**
-*  @brief   Local Divide function
-*
-*  This function does the divide
-*
-*  @return divide value
-*
-*/
-/****************************************************************************/
-static int tmrHw_divide(int num, int denom)
-{
-       int r;
-       int t = 1;
-
-       /* Shift denom and t up to the largest value to optimize algorithm */
-       /* t contains the units of each divide */
-       while ((denom & 0x40000000) == 0) {     /* fails if denom=0 */
-               denom = denom << 1;
-               t = t << 1;
-       }
-
-       /* Initialize the result */
-       r = 0;
-
-       do {
-               /* Determine if there exists a positive remainder */
-               if ((num - denom) >= 0) {
-                       /* Accumlate t to the result and calculate a new remainder */
-                       num = num - denom;
-                       r = r + t;
-               }
-               /* Continue to shift denom and shift t down to 0 */
-               denom = denom >> 1;
-               t = t >> 1;
-       } while (t != 0);
-       return r;
-}
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
deleted file mode 100644 (file)
index e5fd241..0000000
+++ /dev/null
@@ -1,1518 +0,0 @@
-/*****************************************************************************
-* Copyright 2004 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*   @file   dma.c
-*
-*   @brief  Implements the DMA interface.
-*/
-/****************************************************************************/
-
-/* ---- Include Files ---------------------------------------------------- */
-
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/dma-mapping.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <linux/irqreturn.h>
-#include <linux/proc_fs.h>
-#include <linux/slab.h>
-
-#include <mach/timer.h>
-
-#include <linux/pfn.h>
-#include <linux/atomic.h>
-#include <mach/dma.h>
-
-/* ---- Public Variables ------------------------------------------------- */
-
-/* ---- Private Constants and Types -------------------------------------- */
-
-#define MAKE_HANDLE(controllerIdx, channelIdx)    (((controllerIdx) << 4) | (channelIdx))
-
-#define CONTROLLER_FROM_HANDLE(handle)    (((handle) >> 4) & 0x0f)
-#define CHANNEL_FROM_HANDLE(handle)       ((handle) & 0x0f)
-
-
-/* ---- Private Variables ------------------------------------------------ */
-
-static DMA_Global_t gDMA;
-static struct proc_dir_entry *gDmaDir;
-
-#include "dma_device.c"
-
-/* ---- Private Function Prototypes -------------------------------------- */
-
-/* ---- Functions  ------------------------------------------------------- */
-
-/****************************************************************************/
-/**
-*   Displays information for /proc/dma/channels
-*/
-/****************************************************************************/
-
-static int dma_proc_read_channels(char *buf, char **start, off_t offset,
-                                 int count, int *eof, void *data)
-{
-       int controllerIdx;
-       int channelIdx;
-       int limit = count - 200;
-       int len = 0;
-       DMA_Channel_t *channel;
-
-       if (down_interruptible(&gDMA.lock) < 0) {
-               return -ERESTARTSYS;
-       }
-
-       for (controllerIdx = 0; controllerIdx < DMA_NUM_CONTROLLERS;
-            controllerIdx++) {
-               for (channelIdx = 0; channelIdx < DMA_NUM_CHANNELS;
-                    channelIdx++) {
-                       if (len >= limit) {
-                               break;
-                       }
-
-                       channel =
-                           &gDMA.controller[controllerIdx].channel[channelIdx];
-
-                       len +=
-                           sprintf(buf + len, "%d:%d ", controllerIdx,
-                                   channelIdx);
-
-                       if ((channel->flags & DMA_CHANNEL_FLAG_IS_DEDICATED) !=
-                           0) {
-                               len +=
-                                   sprintf(buf + len, "Dedicated for %s ",
-                                           DMA_gDeviceAttribute[channel->
-                                                                devType].name);
-                       } else {
-                               len += sprintf(buf + len, "Shared ");
-                       }
-
-                       if ((channel->flags & DMA_CHANNEL_FLAG_NO_ISR) != 0) {
-                               len += sprintf(buf + len, "No ISR ");
-                       }
-
-                       if ((channel->flags & DMA_CHANNEL_FLAG_LARGE_FIFO) != 0) {
-                               len += sprintf(buf + len, "Fifo: 128 ");
-                       } else {
-                               len += sprintf(buf + len, "Fifo: 64  ");
-                       }
-
-                       if ((channel->flags & DMA_CHANNEL_FLAG_IN_USE) != 0) {
-                               len +=
-                                   sprintf(buf + len, "InUse by %s",
-                                           DMA_gDeviceAttribute[channel->
-                                                                devType].name);
-#if (DMA_DEBUG_TRACK_RESERVATION)
-                               len +=
-                                   sprintf(buf + len, " (%s:%d)",
-                                           channel->fileName,
-                                           channel->lineNum);
-#endif
-                       } else {
-                               len += sprintf(buf + len, "Avail ");
-                       }
-
-                       if (channel->lastDevType != DMA_DEVICE_NONE) {
-                               len +=
-                                   sprintf(buf + len, "Last use: %s ",
-                                           DMA_gDeviceAttribute[channel->
-                                                                lastDevType].
-                                           name);
-                       }
-
-                       len += sprintf(buf + len, "\n");
-               }
-       }
-       up(&gDMA.lock);
-       *eof = 1;
-
-       return len;
-}
-
-/****************************************************************************/
-/**
-*   Displays information for /proc/dma/devices
-*/
-/****************************************************************************/
-
-static int dma_proc_read_devices(char *buf, char **start, off_t offset,
-                                int count, int *eof, void *data)
-{
-       int limit = count - 200;
-       int len = 0;
-       int devIdx;
-
-       if (down_interruptible(&gDMA.lock) < 0) {
-               return -ERESTARTSYS;
-       }
-
-       for (devIdx = 0; devIdx < DMA_NUM_DEVICE_ENTRIES; devIdx++) {
-               DMA_DeviceAttribute_t *devAttr = &DMA_gDeviceAttribute[devIdx];
-
-               if (devAttr->name == NULL) {
-                       continue;
-               }
-
-               if (len >= limit) {
-                       break;
-               }
-
-               len += sprintf(buf + len, "%-12s ", devAttr->name);
-
-               if ((devAttr->flags & DMA_DEVICE_FLAG_IS_DEDICATED) != 0) {
-                       len +=
-                           sprintf(buf + len, "Dedicated %d:%d ",
-                                   devAttr->dedicatedController,
-                                   devAttr->dedicatedChannel);
-               } else {
-                       len += sprintf(buf + len, "Shared DMA:");
-                       if ((devAttr->flags & DMA_DEVICE_FLAG_ON_DMA0) != 0) {
-                               len += sprintf(buf + len, "0");
-                       }
-                       if ((devAttr->flags & DMA_DEVICE_FLAG_ON_DMA1) != 0) {
-                               len += sprintf(buf + len, "1");
-                       }
-                       len += sprintf(buf + len, " ");
-               }
-               if ((devAttr->flags & DMA_DEVICE_FLAG_NO_ISR) != 0) {
-                       len += sprintf(buf + len, "NoISR ");
-               }
-               if ((devAttr->flags & DMA_DEVICE_FLAG_ALLOW_LARGE_FIFO) != 0) {
-                       len += sprintf(buf + len, "Allow-128 ");
-               }
-
-               len +=
-                   sprintf(buf + len,
-                           "Xfer #: %Lu Ticks: %Lu Bytes: %Lu DescLen: %u\n",
-                           devAttr->numTransfers, devAttr->transferTicks,
-                           devAttr->transferBytes,
-                           devAttr->ring.bytesAllocated);
-
-       }
-
-       up(&gDMA.lock);
-       *eof = 1;
-
-       return len;
-}
-
-/****************************************************************************/
-/**
-*   Determines if a DMA_Device_t is "valid".
-*
-*   @return
-*       TRUE        - dma device is valid
-*       FALSE       - dma device isn't valid
-*/
-/****************************************************************************/
-
-static inline int IsDeviceValid(DMA_Device_t device)
-{
-       return (device >= 0) && (device < DMA_NUM_DEVICE_ENTRIES);
-}
-
-/****************************************************************************/
-/**
-*   Translates a DMA handle into a pointer to a channel.
-*
-*   @return
-*       non-NULL    - pointer to DMA_Channel_t
-*       NULL        - DMA Handle was invalid
-*/
-/****************************************************************************/
-
-static inline DMA_Channel_t *HandleToChannel(DMA_Handle_t handle)
-{
-       int controllerIdx;
-       int channelIdx;
-
-       controllerIdx = CONTROLLER_FROM_HANDLE(handle);
-       channelIdx = CHANNEL_FROM_HANDLE(handle);
-
-       if ((controllerIdx > DMA_NUM_CONTROLLERS)
-           || (channelIdx > DMA_NUM_CHANNELS)) {
-               return NULL;
-       }
-       return &gDMA.controller[controllerIdx].channel[channelIdx];
-}
-
-/****************************************************************************/
-/**
-*   Interrupt handler which is called to process DMA interrupts.
-*/
-/****************************************************************************/
-
-static irqreturn_t dma_interrupt_handler(int irq, void *dev_id)
-{
-       DMA_Channel_t *channel;
-       DMA_DeviceAttribute_t *devAttr;
-       int irqStatus;
-
-       channel = (DMA_Channel_t *) dev_id;
-
-       /* Figure out why we were called, and knock down the interrupt */
-
-       irqStatus = dmacHw_getInterruptStatus(channel->dmacHwHandle);
-       dmacHw_clearInterrupt(channel->dmacHwHandle);
-
-       if ((channel->devType < 0)
-           || (channel->devType > DMA_NUM_DEVICE_ENTRIES)) {
-               printk(KERN_ERR "dma_interrupt_handler: Invalid devType: %d\n",
-                      channel->devType);
-               return IRQ_NONE;
-       }
-       devAttr = &DMA_gDeviceAttribute[channel->devType];
-
-       /* Update stats */
-
-       if ((irqStatus & dmacHw_INTERRUPT_STATUS_TRANS) != 0) {
-               devAttr->transferTicks +=
-                   (timer_get_tick_count() - devAttr->transferStartTime);
-       }
-
-       if ((irqStatus & dmacHw_INTERRUPT_STATUS_ERROR) != 0) {
-               printk(KERN_ERR
-                      "dma_interrupt_handler: devType :%d DMA error (%s)\n",
-                      channel->devType, devAttr->name);
-       } else {
-               devAttr->numTransfers++;
-               devAttr->transferBytes += devAttr->numBytes;
-       }
-
-       /* Call any installed handler */
-
-       if (devAttr->devHandler != NULL) {
-               devAttr->devHandler(channel->devType, irqStatus,
-                                   devAttr->userData);
-       }
-
-       return IRQ_HANDLED;
-}
-
-/****************************************************************************/
-/**
-*   Allocates memory to hold a descriptor ring. The descriptor ring then
-*   needs to be populated by making one or more calls to
-*   dna_add_descriptors.
-*
-*   The returned descriptor ring will be automatically initialized.
-*
-*   @return
-*       0           Descriptor ring was allocated successfully
-*       -EINVAL     Invalid parameters passed in
-*       -ENOMEM     Unable to allocate memory for the desired number of descriptors.
-*/
-/****************************************************************************/
-
-int dma_alloc_descriptor_ring(DMA_DescriptorRing_t *ring,      /* Descriptor ring to populate */
-                             int numDescriptors        /* Number of descriptors that need to be allocated. */
-    ) {
-       size_t bytesToAlloc = dmacHw_descriptorLen(numDescriptors);
-
-       if ((ring == NULL) || (numDescriptors <= 0)) {
-               return -EINVAL;
-       }
-
-       ring->physAddr = 0;
-       ring->descriptorsAllocated = 0;
-       ring->bytesAllocated = 0;
-
-       ring->virtAddr = dma_alloc_writecombine(NULL,
-                                                    bytesToAlloc,
-                                                    &ring->physAddr,
-                                                    GFP_KERNEL);
-       if (ring->virtAddr == NULL) {
-               return -ENOMEM;
-       }
-
-       ring->bytesAllocated = bytesToAlloc;
-       ring->descriptorsAllocated = numDescriptors;
-
-       return dma_init_descriptor_ring(ring, numDescriptors);
-}
-
-EXPORT_SYMBOL(dma_alloc_descriptor_ring);
-
-/****************************************************************************/
-/**
-*   Releases the memory which was previously allocated for a descriptor ring.
-*/
-/****************************************************************************/
-
-void dma_free_descriptor_ring(DMA_DescriptorRing_t *ring       /* Descriptor to release */
-    ) {
-       if (ring->virtAddr != NULL) {
-               dma_free_writecombine(NULL,
-                                     ring->bytesAllocated,
-                                     ring->virtAddr, ring->physAddr);
-       }
-
-       ring->bytesAllocated = 0;
-       ring->descriptorsAllocated = 0;
-       ring->virtAddr = NULL;
-       ring->physAddr = 0;
-}
-
-EXPORT_SYMBOL(dma_free_descriptor_ring);
-
-/****************************************************************************/
-/**
-*   Initializes a descriptor ring, so that descriptors can be added to it.
-*   Once a descriptor ring has been allocated, it may be reinitialized for
-*   use with additional/different regions of memory.
-*
-*   Note that if 7 descriptors are allocated, it's perfectly acceptable to
-*   initialize the ring with a smaller number of descriptors. The amount
-*   of memory allocated for the descriptor ring will not be reduced, and
-*   the descriptor ring may be reinitialized later
-*
-*   @return
-*       0           Descriptor ring was initialized successfully
-*       -ENOMEM     The descriptor which was passed in has insufficient space
-*                   to hold the desired number of descriptors.
-*/
-/****************************************************************************/
-
-int dma_init_descriptor_ring(DMA_DescriptorRing_t *ring,       /* Descriptor ring to initialize */
-                            int numDescriptors /* Number of descriptors to initialize. */
-    ) {
-       if (ring->virtAddr == NULL) {
-               return -EINVAL;
-       }
-       if (dmacHw_initDescriptor(ring->virtAddr,
-                                 ring->physAddr,
-                                 ring->bytesAllocated, numDescriptors) < 0) {
-               printk(KERN_ERR
-                      "dma_init_descriptor_ring: dmacHw_initDescriptor failed\n");
-               return -ENOMEM;
-       }
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_init_descriptor_ring);
-
-/****************************************************************************/
-/**
-*   Determines the number of descriptors which would be required for a
-*   transfer of the indicated memory region.
-*
-*   This function also needs to know which DMA device this transfer will
-*   be destined for, so that the appropriate DMA configuration can be retrieved.
-*   DMA parameters such as transfer width, and whether this is a memory-to-memory
-*   or memory-to-peripheral, etc can all affect the actual number of descriptors
-*   required.
-*
-*   @return
-*       > 0     Returns the number of descriptors required for the indicated transfer
-*       -ENODEV - Device handed in is invalid.
-*       -EINVAL Invalid parameters
-*       -ENOMEM Memory exhausted
-*/
-/****************************************************************************/
-
-int dma_calculate_descriptor_count(DMA_Device_t device,        /* DMA Device that this will be associated with */
-                                  dma_addr_t srcData,  /* Place to get data to write to device */
-                                  dma_addr_t dstData,  /* Pointer to device data address */
-                                  size_t numBytes      /* Number of bytes to transfer to the device */
-    ) {
-       int numDescriptors;
-       DMA_DeviceAttribute_t *devAttr;
-
-       if (!IsDeviceValid(device)) {
-               return -ENODEV;
-       }
-       devAttr = &DMA_gDeviceAttribute[device];
-
-       numDescriptors = dmacHw_calculateDescriptorCount(&devAttr->config,
-                                                             (void *)srcData,
-                                                             (void *)dstData,
-                                                             numBytes);
-       if (numDescriptors < 0) {
-               printk(KERN_ERR
-                      "dma_calculate_descriptor_count: dmacHw_calculateDescriptorCount failed\n");
-               return -EINVAL;
-       }
-
-       return numDescriptors;
-}
-
-EXPORT_SYMBOL(dma_calculate_descriptor_count);
-
-/****************************************************************************/
-/**
-*   Adds a region of memory to the descriptor ring. Note that it may take
-*   multiple descriptors for each region of memory. It is the callers
-*   responsibility to allocate a sufficiently large descriptor ring.
-*
-*   @return
-*       0       Descriptors were added successfully
-*       -ENODEV Device handed in is invalid.
-*       -EINVAL Invalid parameters
-*       -ENOMEM Memory exhausted
-*/
-/****************************************************************************/
-
-int dma_add_descriptors(DMA_DescriptorRing_t *ring,    /* Descriptor ring to add descriptors to */
-                       DMA_Device_t device,    /* DMA Device that descriptors are for */
-                       dma_addr_t srcData,     /* Place to get data (memory or device) */
-                       dma_addr_t dstData,     /* Place to put data (memory or device) */
-                       size_t numBytes /* Number of bytes to transfer to the device */
-    ) {
-       int rc;
-       DMA_DeviceAttribute_t *devAttr;
-
-       if (!IsDeviceValid(device)) {
-               return -ENODEV;
-       }
-       devAttr = &DMA_gDeviceAttribute[device];
-
-       rc = dmacHw_setDataDescriptor(&devAttr->config,
-                                     ring->virtAddr,
-                                     (void *)srcData,
-                                     (void *)dstData, numBytes);
-       if (rc < 0) {
-               printk(KERN_ERR
-                      "dma_add_descriptors: dmacHw_setDataDescriptor failed with code: %d\n",
-                      rc);
-               return -ENOMEM;
-       }
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_add_descriptors);
-
-/****************************************************************************/
-/**
-*   Sets the descriptor ring associated with a device.
-*
-*   Once set, the descriptor ring will be associated with the device, even
-*   across channel request/free calls. Passing in a NULL descriptor ring
-*   will release any descriptor ring currently associated with the device.
-*
-*   Note: If you call dma_transfer, or one of the other dma_alloc_ functions
-*         the descriptor ring may be released and reallocated.
-*
-*   Note: This function will release the descriptor memory for any current
-*         descriptor ring associated with this device.
-*
-*   @return
-*       0       Descriptors were added successfully
-*       -ENODEV Device handed in is invalid.
-*/
-/****************************************************************************/
-
-int dma_set_device_descriptor_ring(DMA_Device_t device,        /* Device to update the descriptor ring for. */
-                                  DMA_DescriptorRing_t *ring   /* Descriptor ring to add descriptors to */
-    ) {
-       DMA_DeviceAttribute_t *devAttr;
-
-       if (!IsDeviceValid(device)) {
-               return -ENODEV;
-       }
-       devAttr = &DMA_gDeviceAttribute[device];
-
-       /* Free the previously allocated descriptor ring */
-
-       dma_free_descriptor_ring(&devAttr->ring);
-
-       if (ring != NULL) {
-               /* Copy in the new one */
-
-               devAttr->ring = *ring;
-       }
-
-       /* Set things up so that if dma_transfer is called then this descriptor */
-       /* ring will get freed. */
-
-       devAttr->prevSrcData = 0;
-       devAttr->prevDstData = 0;
-       devAttr->prevNumBytes = 0;
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_set_device_descriptor_ring);
-
-/****************************************************************************/
-/**
-*   Retrieves the descriptor ring associated with a device.
-*
-*   @return
-*       0       Descriptors were added successfully
-*       -ENODEV Device handed in is invalid.
-*/
-/****************************************************************************/
-
-int dma_get_device_descriptor_ring(DMA_Device_t device,        /* Device to retrieve the descriptor ring for. */
-                                  DMA_DescriptorRing_t *ring   /* Place to store retrieved ring */
-    ) {
-       DMA_DeviceAttribute_t *devAttr;
-
-       memset(ring, 0, sizeof(*ring));
-
-       if (!IsDeviceValid(device)) {
-               return -ENODEV;
-       }
-       devAttr = &DMA_gDeviceAttribute[device];
-
-       *ring = devAttr->ring;
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_get_device_descriptor_ring);
-
-/****************************************************************************/
-/**
-*   Configures a DMA channel.
-*
-*   @return
-*       >= 0    - Initialization was successful.
-*
-*       -EBUSY  - Device is currently being used.
-*       -ENODEV - Device handed in is invalid.
-*/
-/****************************************************************************/
-
-static int ConfigChannel(DMA_Handle_t handle)
-{
-       DMA_Channel_t *channel;
-       DMA_DeviceAttribute_t *devAttr;
-       int controllerIdx;
-
-       channel = HandleToChannel(handle);
-       if (channel == NULL) {
-               return -ENODEV;
-       }
-       devAttr = &DMA_gDeviceAttribute[channel->devType];
-       controllerIdx = CONTROLLER_FROM_HANDLE(handle);
-
-       if ((devAttr->flags & DMA_DEVICE_FLAG_PORT_PER_DMAC) != 0) {
-               if (devAttr->config.transferType ==
-                   dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL) {
-                       devAttr->config.dstPeripheralPort =
-                           devAttr->dmacPort[controllerIdx];
-               } else if (devAttr->config.transferType ==
-                          dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM) {
-                       devAttr->config.srcPeripheralPort =
-                           devAttr->dmacPort[controllerIdx];
-               }
-       }
-
-       if (dmacHw_configChannel(channel->dmacHwHandle, &devAttr->config) != 0) {
-               printk(KERN_ERR "ConfigChannel: dmacHw_configChannel failed\n");
-               return -EIO;
-       }
-
-       return 0;
-}
-
-/****************************************************************************/
-/**
-*   Initializes all of the data structures associated with the DMA.
-*   @return
-*       >= 0    - Initialization was successful.
-*
-*       -EBUSY  - Device is currently being used.
-*       -ENODEV - Device handed in is invalid.
-*/
-/****************************************************************************/
-
-int dma_init(void)
-{
-       int rc = 0;
-       int controllerIdx;
-       int channelIdx;
-       DMA_Device_t devIdx;
-       DMA_Channel_t *channel;
-       DMA_Handle_t dedicatedHandle;
-
-       memset(&gDMA, 0, sizeof(gDMA));
-
-       sema_init(&gDMA.lock, 0);
-       init_waitqueue_head(&gDMA.freeChannelQ);
-
-       /* Initialize the Hardware */
-
-       dmacHw_initDma();
-
-       /* Start off by marking all of the DMA channels as shared. */
-
-       for (controllerIdx = 0; controllerIdx < DMA_NUM_CONTROLLERS;
-            controllerIdx++) {
-               for (channelIdx = 0; channelIdx < DMA_NUM_CHANNELS;
-                    channelIdx++) {
-                       channel =
-                           &gDMA.controller[controllerIdx].channel[channelIdx];
-
-                       channel->flags = 0;
-                       channel->devType = DMA_DEVICE_NONE;
-                       channel->lastDevType = DMA_DEVICE_NONE;
-
-#if (DMA_DEBUG_TRACK_RESERVATION)
-                       channel->fileName = "";
-                       channel->lineNum = 0;
-#endif
-
-                       channel->dmacHwHandle =
-                           dmacHw_getChannelHandle(dmacHw_MAKE_CHANNEL_ID
-                                                   (controllerIdx,
-                                                    channelIdx));
-                       dmacHw_initChannel(channel->dmacHwHandle);
-               }
-       }
-
-       /* Record any special attributes that channels may have */
-
-       gDMA.controller[0].channel[0].flags |= DMA_CHANNEL_FLAG_LARGE_FIFO;
-       gDMA.controller[0].channel[1].flags |= DMA_CHANNEL_FLAG_LARGE_FIFO;
-       gDMA.controller[1].channel[0].flags |= DMA_CHANNEL_FLAG_LARGE_FIFO;
-       gDMA.controller[1].channel[1].flags |= DMA_CHANNEL_FLAG_LARGE_FIFO;
-
-       /* Now walk through and record the dedicated channels. */
-
-       for (devIdx = 0; devIdx < DMA_NUM_DEVICE_ENTRIES; devIdx++) {
-               DMA_DeviceAttribute_t *devAttr = &DMA_gDeviceAttribute[devIdx];
-
-               if (((devAttr->flags & DMA_DEVICE_FLAG_NO_ISR) != 0)
-                   && ((devAttr->flags & DMA_DEVICE_FLAG_IS_DEDICATED) == 0)) {
-                       printk(KERN_ERR
-                              "DMA Device: %s Can only request NO_ISR for dedicated devices\n",
-                              devAttr->name);
-                       rc = -EINVAL;
-                       goto out;
-               }
-
-               if ((devAttr->flags & DMA_DEVICE_FLAG_IS_DEDICATED) != 0) {
-                       /* This is a dedicated device. Mark the channel as being reserved. */
-
-                       if (devAttr->dedicatedController >= DMA_NUM_CONTROLLERS) {
-                               printk(KERN_ERR
-                                      "DMA Device: %s DMA Controller %d is out of range\n",
-                                      devAttr->name,
-                                      devAttr->dedicatedController);
-                               rc = -EINVAL;
-                               goto out;
-                       }
-
-                       if (devAttr->dedicatedChannel >= DMA_NUM_CHANNELS) {
-                               printk(KERN_ERR
-                                      "DMA Device: %s DMA Channel %d is out of range\n",
-                                      devAttr->name,
-                                      devAttr->dedicatedChannel);
-                               rc = -EINVAL;
-                               goto out;
-                       }
-
-                       dedicatedHandle =
-                           MAKE_HANDLE(devAttr->dedicatedController,
-                                       devAttr->dedicatedChannel);
-                       channel = HandleToChannel(dedicatedHandle);
-
-                       if ((channel->flags & DMA_CHANNEL_FLAG_IS_DEDICATED) !=
-                           0) {
-                               printk
-                                   ("DMA Device: %s attempting to use same DMA Controller:Channel (%d:%d) as %s\n",
-                                    devAttr->name,
-                                    devAttr->dedicatedController,
-                                    devAttr->dedicatedChannel,
-                                    DMA_gDeviceAttribute[channel->devType].
-                                    name);
-                               rc = -EBUSY;
-                               goto out;
-                       }
-
-                       channel->flags |= DMA_CHANNEL_FLAG_IS_DEDICATED;
-                       channel->devType = devIdx;
-
-                       if (devAttr->flags & DMA_DEVICE_FLAG_NO_ISR) {
-                               channel->flags |= DMA_CHANNEL_FLAG_NO_ISR;
-                       }
-
-                       /* For dedicated channels, we can go ahead and configure the DMA channel now */
-                       /* as well. */
-
-                       ConfigChannel(dedicatedHandle);
-               }
-       }
-
-       /* Go through and register the interrupt handlers */
-
-       for (controllerIdx = 0; controllerIdx < DMA_NUM_CONTROLLERS;
-            controllerIdx++) {
-               for (channelIdx = 0; channelIdx < DMA_NUM_CHANNELS;
-                    channelIdx++) {
-                       channel =
-                           &gDMA.controller[controllerIdx].channel[channelIdx];
-
-                       if ((channel->flags & DMA_CHANNEL_FLAG_NO_ISR) == 0) {
-                               snprintf(channel->name, sizeof(channel->name),
-                                        "dma %d:%d %s", controllerIdx,
-                                        channelIdx,
-                                        channel->devType ==
-                                        DMA_DEVICE_NONE ? "" :
-                                        DMA_gDeviceAttribute[channel->devType].
-                                        name);
-
-                               rc =
-                                    request_irq(IRQ_DMA0C0 +
-                                                (controllerIdx *
-                                                 DMA_NUM_CHANNELS) +
-                                                channelIdx,
-                                                dma_interrupt_handler,
-                                                IRQF_DISABLED, channel->name,
-                                                channel);
-                               if (rc != 0) {
-                                       printk(KERN_ERR
-                                              "request_irq for IRQ_DMA%dC%d failed\n",
-                                              controllerIdx, channelIdx);
-                               }
-                       }
-               }
-       }
-
-       /* Create /proc/dma/channels and /proc/dma/devices */
-
-       gDmaDir = proc_mkdir("dma", NULL);
-
-       if (gDmaDir == NULL) {
-               printk(KERN_ERR "Unable to create /proc/dma\n");
-       } else {
-               create_proc_read_entry("channels", 0, gDmaDir,
-                                      dma_proc_read_channels, NULL);
-               create_proc_read_entry("devices", 0, gDmaDir,
-                                      dma_proc_read_devices, NULL);
-       }
-
-out:
-
-       up(&gDMA.lock);
-
-       return rc;
-}
-
-/****************************************************************************/
-/**
-*   Reserves a channel for use with @a dev. If the device is setup to use
-*   a shared channel, then this function will block until a free channel
-*   becomes available.
-*
-*   @return
-*       >= 0    - A valid DMA Handle.
-*       -EBUSY  - Device is currently being used.
-*       -ENODEV - Device handed in is invalid.
-*/
-/****************************************************************************/
-
-#if (DMA_DEBUG_TRACK_RESERVATION)
-DMA_Handle_t dma_request_channel_dbg
-    (DMA_Device_t dev, const char *fileName, int lineNum)
-#else
-DMA_Handle_t dma_request_channel(DMA_Device_t dev)
-#endif
-{
-       DMA_Handle_t handle;
-       DMA_DeviceAttribute_t *devAttr;
-       DMA_Channel_t *channel;
-       int controllerIdx;
-       int controllerIdx2;
-       int channelIdx;
-
-       if (down_interruptible(&gDMA.lock) < 0) {
-               return -ERESTARTSYS;
-       }
-
-       if ((dev < 0) || (dev >= DMA_NUM_DEVICE_ENTRIES)) {
-               handle = -ENODEV;
-               goto out;
-       }
-       devAttr = &DMA_gDeviceAttribute[dev];
-
-#if (DMA_DEBUG_TRACK_RESERVATION)
-       {
-               char *s;
-
-               s = strrchr(fileName, '/');
-               if (s != NULL) {
-                       fileName = s + 1;
-               }
-       }
-#endif
-       if ((devAttr->flags & DMA_DEVICE_FLAG_IN_USE) != 0) {
-               /* This device has already been requested and not been freed */
-
-               printk(KERN_ERR "%s: device %s is already requested\n",
-                      __func__, devAttr->name);
-               handle = -EBUSY;
-               goto out;
-       }
-
-       if ((devAttr->flags & DMA_DEVICE_FLAG_IS_DEDICATED) != 0) {
-               /* This device has a dedicated channel. */
-
-               channel =
-                   &gDMA.controller[devAttr->dedicatedController].
-                   channel[devAttr->dedicatedChannel];
-               if ((channel->flags & DMA_CHANNEL_FLAG_IN_USE) != 0) {
-                       handle = -EBUSY;
-                       goto out;
-               }
-
-               channel->flags |= DMA_CHANNEL_FLAG_IN_USE;
-               devAttr->flags |= DMA_DEVICE_FLAG_IN_USE;
-
-#if (DMA_DEBUG_TRACK_RESERVATION)
-               channel->fileName = fileName;
-               channel->lineNum = lineNum;
-#endif
-               handle =
-                   MAKE_HANDLE(devAttr->dedicatedController,
-                               devAttr->dedicatedChannel);
-               goto out;
-       }
-
-       /* This device needs to use one of the shared channels. */
-
-       handle = DMA_INVALID_HANDLE;
-       while (handle == DMA_INVALID_HANDLE) {
-               /* Scan through the shared channels and see if one is available */
-
-               for (controllerIdx2 = 0; controllerIdx2 < DMA_NUM_CONTROLLERS;
-                    controllerIdx2++) {
-                       /* Check to see if we should try on controller 1 first. */
-
-                       controllerIdx = controllerIdx2;
-                       if ((devAttr->
-                            flags & DMA_DEVICE_FLAG_ALLOC_DMA1_FIRST) != 0) {
-                               controllerIdx = 1 - controllerIdx;
-                       }
-
-                       /* See if the device is available on the controller being tested */
-
-                       if ((devAttr->
-                            flags & (DMA_DEVICE_FLAG_ON_DMA0 << controllerIdx))
-                           != 0) {
-                               for (channelIdx = 0;
-                                    channelIdx < DMA_NUM_CHANNELS;
-                                    channelIdx++) {
-                                       channel =
-                                           &gDMA.controller[controllerIdx].
-                                           channel[channelIdx];
-
-                                       if (((channel->
-                                             flags &
-                                             DMA_CHANNEL_FLAG_IS_DEDICATED) ==
-                                            0)
-                                           &&
-                                           ((channel->
-                                             flags & DMA_CHANNEL_FLAG_IN_USE)
-                                            == 0)) {
-                                               if (((channel->
-                                                     flags &
-                                                     DMA_CHANNEL_FLAG_LARGE_FIFO)
-                                                    != 0)
-                                                   &&
-                                                   ((devAttr->
-                                                     flags &
-                                                     DMA_DEVICE_FLAG_ALLOW_LARGE_FIFO)
-                                                    == 0)) {
-                                                       /* This channel is a large fifo - don't tie it up */
-                                                       /* with devices that we don't want using it. */
-
-                                                       continue;
-                                               }
-
-                                               channel->flags |=
-                                                   DMA_CHANNEL_FLAG_IN_USE;
-                                               channel->devType = dev;
-                                               devAttr->flags |=
-                                                   DMA_DEVICE_FLAG_IN_USE;
-
-#if (DMA_DEBUG_TRACK_RESERVATION)
-                                               channel->fileName = fileName;
-                                               channel->lineNum = lineNum;
-#endif
-                                               handle =
-                                                   MAKE_HANDLE(controllerIdx,
-                                                               channelIdx);
-
-                                               /* Now that we've reserved the channel - we can go ahead and configure it */
-
-                                               if (ConfigChannel(handle) != 0) {
-                                                       handle = -EIO;
-                                                       printk(KERN_ERR
-                                                              "dma_request_channel: ConfigChannel failed\n");
-                                               }
-                                               goto out;
-                                       }
-                               }
-                       }
-               }
-
-               /* No channels are currently available. Let's wait for one to free up. */
-
-               {
-                       DEFINE_WAIT(wait);
-
-                       prepare_to_wait(&gDMA.freeChannelQ, &wait,
-                                       TASK_INTERRUPTIBLE);
-                       up(&gDMA.lock);
-                       schedule();
-                       finish_wait(&gDMA.freeChannelQ, &wait);
-
-                       if (signal_pending(current)) {
-                               /* We don't currently hold gDMA.lock, so we return directly */
-
-                               return -ERESTARTSYS;
-                       }
-               }
-
-               if (down_interruptible(&gDMA.lock)) {
-                       return -ERESTARTSYS;
-               }
-       }
-
-out:
-       up(&gDMA.lock);
-
-       return handle;
-}
-
-/* Create both _dbg and non _dbg functions for modules. */
-
-#if (DMA_DEBUG_TRACK_RESERVATION)
-#undef dma_request_channel
-DMA_Handle_t dma_request_channel(DMA_Device_t dev)
-{
-       return dma_request_channel_dbg(dev, __FILE__, __LINE__);
-}
-
-EXPORT_SYMBOL(dma_request_channel_dbg);
-#endif
-EXPORT_SYMBOL(dma_request_channel);
-
-/****************************************************************************/
-/**
-*   Frees a previously allocated DMA Handle.
-*/
-/****************************************************************************/
-
-int dma_free_channel(DMA_Handle_t handle       /* DMA handle. */
-    ) {
-       int rc = 0;
-       DMA_Channel_t *channel;
-       DMA_DeviceAttribute_t *devAttr;
-
-       if (down_interruptible(&gDMA.lock) < 0) {
-               return -ERESTARTSYS;
-       }
-
-       channel = HandleToChannel(handle);
-       if (channel == NULL) {
-               rc = -EINVAL;
-               goto out;
-       }
-
-       devAttr = &DMA_gDeviceAttribute[channel->devType];
-
-       if ((channel->flags & DMA_CHANNEL_FLAG_IS_DEDICATED) == 0) {
-               channel->lastDevType = channel->devType;
-               channel->devType = DMA_DEVICE_NONE;
-       }
-       channel->flags &= ~DMA_CHANNEL_FLAG_IN_USE;
-       devAttr->flags &= ~DMA_DEVICE_FLAG_IN_USE;
-
-out:
-       up(&gDMA.lock);
-
-       wake_up_interruptible(&gDMA.freeChannelQ);
-
-       return rc;
-}
-
-EXPORT_SYMBOL(dma_free_channel);
-
-/****************************************************************************/
-/**
-*   Determines if a given device has been configured as using a shared
-*   channel.
-*
-*   @return
-*       0           Device uses a dedicated channel
-*       > zero      Device uses a shared channel
-*       < zero      Error code
-*/
-/****************************************************************************/
-
-int dma_device_is_channel_shared(DMA_Device_t device   /* Device to check. */
-    ) {
-       DMA_DeviceAttribute_t *devAttr;
-
-       if (!IsDeviceValid(device)) {
-               return -ENODEV;
-       }
-       devAttr = &DMA_gDeviceAttribute[device];
-
-       return ((devAttr->flags & DMA_DEVICE_FLAG_IS_DEDICATED) == 0);
-}
-
-EXPORT_SYMBOL(dma_device_is_channel_shared);
-
-/****************************************************************************/
-/**
-*   Allocates buffers for the descriptors. This is normally done automatically
-*   but needs to be done explicitly when initiating a dma from interrupt
-*   context.
-*
-*   @return
-*       0       Descriptors were allocated successfully
-*       -EINVAL Invalid device type for this kind of transfer
-*               (i.e. the device is _MEM_TO_DEV and not _DEV_TO_MEM)
-*       -ENOMEM Memory exhausted
-*/
-/****************************************************************************/
-
-int dma_alloc_descriptors(DMA_Handle_t handle, /* DMA Handle */
-                         dmacHw_TRANSFER_TYPE_e transferType,  /* Type of transfer being performed */
-                         dma_addr_t srcData,   /* Place to get data to write to device */
-                         dma_addr_t dstData,   /* Pointer to device data address */
-                         size_t numBytes       /* Number of bytes to transfer to the device */
-    ) {
-       DMA_Channel_t *channel;
-       DMA_DeviceAttribute_t *devAttr;
-       int numDescriptors;
-       size_t ringBytesRequired;
-       int rc = 0;
-
-       channel = HandleToChannel(handle);
-       if (channel == NULL) {
-               return -ENODEV;
-       }
-
-       devAttr = &DMA_gDeviceAttribute[channel->devType];
-
-       if (devAttr->config.transferType != transferType) {
-               return -EINVAL;
-       }
-
-       /* Figure out how many descriptors we need. */
-
-       /* printk("srcData: 0x%08x dstData: 0x%08x, numBytes: %d\n", */
-       /*        srcData, dstData, numBytes); */
-
-       numDescriptors = dmacHw_calculateDescriptorCount(&devAttr->config,
-                                                             (void *)srcData,
-                                                             (void *)dstData,
-                                                             numBytes);
-       if (numDescriptors < 0) {
-               printk(KERN_ERR "%s: dmacHw_calculateDescriptorCount failed\n",
-                      __func__);
-               return -EINVAL;
-       }
-
-       /* Check to see if we can reuse the existing descriptor ring, or if we need to allocate */
-       /* a new one. */
-
-       ringBytesRequired = dmacHw_descriptorLen(numDescriptors);
-
-       /* printk("ringBytesRequired: %d\n", ringBytesRequired); */
-
-       if (ringBytesRequired > devAttr->ring.bytesAllocated) {
-               /* Make sure that this code path is never taken from interrupt context. */
-               /* It's OK for an interrupt to initiate a DMA transfer, but the descriptor */
-               /* allocation needs to have already been done. */
-
-               might_sleep();
-
-               /* Free the old descriptor ring and allocate a new one. */
-
-               dma_free_descriptor_ring(&devAttr->ring);
-
-               /* And allocate a new one. */
-
-               rc =
-                    dma_alloc_descriptor_ring(&devAttr->ring,
-                                              numDescriptors);
-               if (rc < 0) {
-                       printk(KERN_ERR
-                              "%s: dma_alloc_descriptor_ring(%d) failed\n",
-                              __func__, numDescriptors);
-                       return rc;
-               }
-               /* Setup the descriptor for this transfer */
-
-               if (dmacHw_initDescriptor(devAttr->ring.virtAddr,
-                                         devAttr->ring.physAddr,
-                                         devAttr->ring.bytesAllocated,
-                                         numDescriptors) < 0) {
-                       printk(KERN_ERR "%s: dmacHw_initDescriptor failed\n",
-                              __func__);
-                       return -EINVAL;
-               }
-       } else {
-               /* We've already got enough ring buffer allocated. All we need to do is reset */
-               /* any control information, just in case the previous DMA was stopped. */
-
-               dmacHw_resetDescriptorControl(devAttr->ring.virtAddr);
-       }
-
-       /* dma_alloc/free both set the prevSrc/DstData to 0. If they happen to be the same */
-       /* as last time, then we don't need to call setDataDescriptor again. */
-
-       if (dmacHw_setDataDescriptor(&devAttr->config,
-                                    devAttr->ring.virtAddr,
-                                    (void *)srcData,
-                                    (void *)dstData, numBytes) < 0) {
-               printk(KERN_ERR "%s: dmacHw_setDataDescriptor failed\n",
-                      __func__);
-               return -EINVAL;
-       }
-
-       /* Remember the critical information for this transfer so that we can eliminate */
-       /* another call to dma_alloc_descriptors if the caller reuses the same buffers */
-
-       devAttr->prevSrcData = srcData;
-       devAttr->prevDstData = dstData;
-       devAttr->prevNumBytes = numBytes;
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_alloc_descriptors);
-
-/****************************************************************************/
-/**
-*   Allocates and sets up descriptors for a double buffered circular buffer.
-*
-*   This is primarily intended to be used for things like the ingress samples
-*   from a microphone.
-*
-*   @return
-*       > 0     Number of descriptors actually allocated.
-*       -EINVAL Invalid device type for this kind of transfer
-*               (i.e. the device is _MEM_TO_DEV and not _DEV_TO_MEM)
-*       -ENOMEM Memory exhausted
-*/
-/****************************************************************************/
-
-int dma_alloc_double_dst_descriptors(DMA_Handle_t handle,      /* DMA Handle */
-                                    dma_addr_t srcData,        /* Physical address of source data */
-                                    dma_addr_t dstData1,       /* Physical address of first destination buffer */
-                                    dma_addr_t dstData2,       /* Physical address of second destination buffer */
-                                    size_t numBytes    /* Number of bytes in each destination buffer */
-    ) {
-       DMA_Channel_t *channel;
-       DMA_DeviceAttribute_t *devAttr;
-       int numDst1Descriptors;
-       int numDst2Descriptors;
-       int numDescriptors;
-       size_t ringBytesRequired;
-       int rc = 0;
-
-       channel = HandleToChannel(handle);
-       if (channel == NULL) {
-               return -ENODEV;
-       }
-
-       devAttr = &DMA_gDeviceAttribute[channel->devType];
-
-       /* Figure out how many descriptors we need. */
-
-       /* printk("srcData: 0x%08x dstData: 0x%08x, numBytes: %d\n", */
-       /*        srcData, dstData, numBytes); */
-
-       numDst1Descriptors =
-            dmacHw_calculateDescriptorCount(&devAttr->config, (void *)srcData,
-                                            (void *)dstData1, numBytes);
-       if (numDst1Descriptors < 0) {
-               return -EINVAL;
-       }
-       numDst2Descriptors =
-            dmacHw_calculateDescriptorCount(&devAttr->config, (void *)srcData,
-                                            (void *)dstData2, numBytes);
-       if (numDst2Descriptors < 0) {
-               return -EINVAL;
-       }
-       numDescriptors = numDst1Descriptors + numDst2Descriptors;
-       /* printk("numDescriptors: %d\n", numDescriptors); */
-
-       /* Check to see if we can reuse the existing descriptor ring, or if we need to allocate */
-       /* a new one. */
-
-       ringBytesRequired = dmacHw_descriptorLen(numDescriptors);
-
-       /* printk("ringBytesRequired: %d\n", ringBytesRequired); */
-
-       if (ringBytesRequired > devAttr->ring.bytesAllocated) {
-               /* Make sure that this code path is never taken from interrupt context. */
-               /* It's OK for an interrupt to initiate a DMA transfer, but the descriptor */
-               /* allocation needs to have already been done. */
-
-               might_sleep();
-
-               /* Free the old descriptor ring and allocate a new one. */
-
-               dma_free_descriptor_ring(&devAttr->ring);
-
-               /* And allocate a new one. */
-
-               rc =
-                    dma_alloc_descriptor_ring(&devAttr->ring,
-                                              numDescriptors);
-               if (rc < 0) {
-                       printk(KERN_ERR
-                              "%s: dma_alloc_descriptor_ring(%d) failed\n",
-                              __func__, ringBytesRequired);
-                       return rc;
-               }
-       }
-
-       /* Setup the descriptor for this transfer. Since this function is used with */
-       /* CONTINUOUS DMA operations, we need to reinitialize every time, otherwise */
-       /* setDataDescriptor will keep trying to append onto the end. */
-
-       if (dmacHw_initDescriptor(devAttr->ring.virtAddr,
-                                 devAttr->ring.physAddr,
-                                 devAttr->ring.bytesAllocated,
-                                 numDescriptors) < 0) {
-               printk(KERN_ERR "%s: dmacHw_initDescriptor failed\n", __func__);
-               return -EINVAL;
-       }
-
-       /* dma_alloc/free both set the prevSrc/DstData to 0. If they happen to be the same */
-       /* as last time, then we don't need to call setDataDescriptor again. */
-
-       if (dmacHw_setDataDescriptor(&devAttr->config,
-                                    devAttr->ring.virtAddr,
-                                    (void *)srcData,
-                                    (void *)dstData1, numBytes) < 0) {
-               printk(KERN_ERR "%s: dmacHw_setDataDescriptor 1 failed\n",
-                      __func__);
-               return -EINVAL;
-       }
-       if (dmacHw_setDataDescriptor(&devAttr->config,
-                                    devAttr->ring.virtAddr,
-                                    (void *)srcData,
-                                    (void *)dstData2, numBytes) < 0) {
-               printk(KERN_ERR "%s: dmacHw_setDataDescriptor 2 failed\n",
-                      __func__);
-               return -EINVAL;
-       }
-
-       /* You should use dma_start_transfer rather than dma_transfer_xxx so we don't */
-       /* try to make the 'prev' variables right. */
-
-       devAttr->prevSrcData = 0;
-       devAttr->prevDstData = 0;
-       devAttr->prevNumBytes = 0;
-
-       return numDescriptors;
-}
-
-EXPORT_SYMBOL(dma_alloc_double_dst_descriptors);
-
-/****************************************************************************/
-/**
-*   Initiates a transfer when the descriptors have already been setup.
-*
-*   This is a special case, and normally, the dma_transfer_xxx functions should
-*   be used.
-*
-*   @return
-*       0       Transfer was started successfully
-*       -ENODEV Invalid handle
-*/
-/****************************************************************************/
-
-int dma_start_transfer(DMA_Handle_t handle)
-{
-       DMA_Channel_t *channel;
-       DMA_DeviceAttribute_t *devAttr;
-
-       channel = HandleToChannel(handle);
-       if (channel == NULL) {
-               return -ENODEV;
-       }
-       devAttr = &DMA_gDeviceAttribute[channel->devType];
-
-       dmacHw_initiateTransfer(channel->dmacHwHandle, &devAttr->config,
-                               devAttr->ring.virtAddr);
-
-       /* Since we got this far, everything went successfully */
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_start_transfer);
-
-/****************************************************************************/
-/**
-*   Stops a previously started DMA transfer.
-*
-*   @return
-*       0       Transfer was stopped successfully
-*       -ENODEV Invalid handle
-*/
-/****************************************************************************/
-
-int dma_stop_transfer(DMA_Handle_t handle)
-{
-       DMA_Channel_t *channel;
-
-       channel = HandleToChannel(handle);
-       if (channel == NULL) {
-               return -ENODEV;
-       }
-
-       dmacHw_stopTransfer(channel->dmacHwHandle);
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_stop_transfer);
-
-/****************************************************************************/
-/**
-*   Waits for a DMA to complete by polling. This function is only intended
-*   to be used for testing. Interrupts should be used for most DMA operations.
-*/
-/****************************************************************************/
-
-int dma_wait_transfer_done(DMA_Handle_t handle)
-{
-       DMA_Channel_t *channel;
-       dmacHw_TRANSFER_STATUS_e status;
-
-       channel = HandleToChannel(handle);
-       if (channel == NULL) {
-               return -ENODEV;
-       }
-
-       while ((status =
-               dmacHw_transferCompleted(channel->dmacHwHandle)) ==
-              dmacHw_TRANSFER_STATUS_BUSY) {
-               ;
-       }
-
-       if (status == dmacHw_TRANSFER_STATUS_ERROR) {
-               printk(KERN_ERR "%s: DMA transfer failed\n", __func__);
-               return -EIO;
-       }
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_wait_transfer_done);
-
-/****************************************************************************/
-/**
-*   Initiates a DMA, allocating the descriptors as required.
-*
-*   @return
-*       0       Transfer was started successfully
-*       -EINVAL Invalid device type for this kind of transfer
-*               (i.e. the device is _DEV_TO_MEM and not _MEM_TO_DEV)
-*/
-/****************************************************************************/
-
-int dma_transfer(DMA_Handle_t handle,  /* DMA Handle */
-                dmacHw_TRANSFER_TYPE_e transferType,   /* Type of transfer being performed */
-                dma_addr_t srcData,    /* Place to get data to write to device */
-                dma_addr_t dstData,    /* Pointer to device data address */
-                size_t numBytes        /* Number of bytes to transfer to the device */
-    ) {
-       DMA_Channel_t *channel;
-       DMA_DeviceAttribute_t *devAttr;
-       int rc = 0;
-
-       channel = HandleToChannel(handle);
-       if (channel == NULL) {
-               return -ENODEV;
-       }
-
-       devAttr = &DMA_gDeviceAttribute[channel->devType];
-
-       if (devAttr->config.transferType != transferType) {
-               return -EINVAL;
-       }
-
-       /* We keep track of the information about the previous request for this */
-       /* device, and if the attributes match, then we can use the descriptors we setup */
-       /* the last time, and not have to reinitialize everything. */
-
-       {
-               rc =
-                    dma_alloc_descriptors(handle, transferType, srcData,
-                                          dstData, numBytes);
-               if (rc != 0) {
-                       return rc;
-               }
-       }
-
-       /* And kick off the transfer */
-
-       devAttr->numBytes = numBytes;
-       devAttr->transferStartTime = timer_get_tick_count();
-
-       dmacHw_initiateTransfer(channel->dmacHwHandle, &devAttr->config,
-                               devAttr->ring.virtAddr);
-
-       /* Since we got this far, everything went successfully */
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_transfer);
-
-/****************************************************************************/
-/**
-*   Set the callback function which will be called when a transfer completes.
-*   If a NULL callback function is set, then no callback will occur.
-*
-*   @note   @a devHandler will be called from IRQ context.
-*
-*   @return
-*       0       - Success
-*       -ENODEV - Device handed in is invalid.
-*/
-/****************************************************************************/
-
-int dma_set_device_handler(DMA_Device_t dev,   /* Device to set the callback for. */
-                          DMA_DeviceHandler_t devHandler,      /* Function to call when the DMA completes */
-                          void *userData       /* Pointer which will be passed to devHandler. */
-    ) {
-       DMA_DeviceAttribute_t *devAttr;
-       unsigned long flags;
-
-       if (!IsDeviceValid(dev)) {
-               return -ENODEV;
-       }
-       devAttr = &DMA_gDeviceAttribute[dev];
-
-       local_irq_save(flags);
-
-       devAttr->userData = userData;
-       devAttr->devHandler = devHandler;
-
-       local_irq_restore(flags);
-
-       return 0;
-}
-
-EXPORT_SYMBOL(dma_set_device_handler);
diff --git a/arch/arm/mach-bcmring/dma_device.c b/arch/arm/mach-bcmring/dma_device.c
deleted file mode 100644 (file)
index ca0ad73..0000000
+++ /dev/null
@@ -1,593 +0,0 @@
-/*****************************************************************************
-* Copyright 2004 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*   @file   dma_device.c
-*
-*   @brief  private array of DMA_DeviceAttribute_t
-*/
-/****************************************************************************/
-
-DMA_DeviceAttribute_t DMA_gDeviceAttribute[DMA_NUM_DEVICE_ENTRIES] = {
-       [DMA_DEVICE_MEM_TO_MEM] =       /* MEM 2 MEM */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0 | DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "mem-to-mem",
-        .config = {
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_MEM,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-
-                   },
-        },
-       [DMA_DEVICE_VPM_MEM_TO_MEM] =   /* VPM */
-       {
-        .flags = DMA_DEVICE_FLAG_IS_DEDICATED | DMA_DEVICE_FLAG_NO_ISR,
-        .name = "vpm",
-        .dedicatedController = 0,
-        .dedicatedChannel = 0,
-        /* reserve DMA0:0 for VPM */
-        },
-       [DMA_DEVICE_NAND_MEM_TO_MEM] =  /* NAND */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0 | DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "nand",
-        .config = {
-                   .srcPeripheralPort = 0,
-                   .dstPeripheralPort = 0,
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_32,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_6,
-                   },
-        },
-       [DMA_DEVICE_PIF_MEM_TO_DEV] =   /* PIF TX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0 | DMA_DEVICE_FLAG_ON_DMA1
-        | DMA_DEVICE_FLAG_ALLOW_LARGE_FIFO
-        | DMA_DEVICE_FLAG_ALLOC_DMA1_FIRST | DMA_DEVICE_FLAG_PORT_PER_DMAC,
-        .name = "pif_tx",
-        .dmacPort = {14, 5},
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   /* dstPeripheralPort          = 5 or 14 */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_2,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_32,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_8,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_8,
-                   .maxDataPerBlock = 16256,
-                   },
-        },
-       [DMA_DEVICE_PIF_DEV_TO_MEM] =   /* PIF RX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0 | DMA_DEVICE_FLAG_ON_DMA1
-        | DMA_DEVICE_FLAG_ALLOW_LARGE_FIFO
-        /* DMA_DEVICE_FLAG_ALLOC_DMA1_FIRST */
-        | DMA_DEVICE_FLAG_PORT_PER_DMAC,
-        .name = "pif_rx",
-        .dmacPort = {14, 5},
-        .config = {
-                   /* srcPeripheralPort          = 5 or 14 */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_8,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_8,
-                   .maxDataPerBlock = 16256,
-                   },
-        },
-       [DMA_DEVICE_I2S0_DEV_TO_MEM] =  /* I2S RX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0,
-        .name = "i2s0_rx",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: I2S0 */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0,
-                   .dstStatusRegisterAddress = 0,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_16,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_0,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .transferMode = dmacHw_TRANSFER_MODE_CONTINUOUS,
-                   },
-        },
-       [DMA_DEVICE_I2S0_MEM_TO_DEV] =  /* I2S TX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0,
-        .name = "i2s0_tx",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .dstPeripheralPort = 1,     /* DST: I2S0 */
-                   .srcStatusRegisterAddress = 0,
-                   .dstStatusRegisterAddress = 0,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_16,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_0,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   },
-        },
-       [DMA_DEVICE_I2S1_DEV_TO_MEM] =  /* I2S1 RX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "i2s1_rx",
-        .config = {
-                   .srcPeripheralPort = 2,     /* SRC: I2S1 */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0,
-                   .dstStatusRegisterAddress = 0,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_16,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_0,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .transferMode = dmacHw_TRANSFER_MODE_CONTINUOUS,
-                   },
-        },
-       [DMA_DEVICE_I2S1_MEM_TO_DEV] =  /* I2S1 TX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "i2s1_tx",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .dstPeripheralPort = 3,     /* DST: I2S1 */
-                   .srcStatusRegisterAddress = 0,
-                   .dstStatusRegisterAddress = 0,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_16,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_0,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   },
-        },
-       [DMA_DEVICE_ESW_MEM_TO_DEV] =   /* ESW TX */
-       {
-        .name = "esw_tx",
-        .flags = DMA_DEVICE_FLAG_IS_DEDICATED,
-        .dedicatedController = 1,
-        .dedicatedChannel = 3,
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .dstPeripheralPort = 1,     /* DST: ESW (MTP) */
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   /* DMAx_AHB_SSTATARy */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   /* DMAx_AHB_DSTATARy */
-                   .dstStatusRegisterAddress = 0x30490010,
-                   /* DMAx_AHB_CFGy */
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   /* DMAx_AHB_CTLy */
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_0,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_8,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   },
-        },
-       [DMA_DEVICE_ESW_DEV_TO_MEM] =   /* ESW RX */
-       {
-        .name = "esw_rx",
-        .flags = DMA_DEVICE_FLAG_IS_DEDICATED,
-        .dedicatedController = 1,
-        .dedicatedChannel = 2,
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: ESW (PTM) */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   /* DMAx_AHB_SSTATARy */
-                   .srcStatusRegisterAddress = 0x30480010,
-                   /* DMAx_AHB_DSTATARy */
-                   .dstStatusRegisterAddress = 0x00000000,
-                   /* DMAx_AHB_CFGy */
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   /* DMAx_AHB_CTLy */
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_8,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_0,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   },
-        },
-       [DMA_DEVICE_APM_CODEC_A_DEV_TO_MEM] =   /* APM Codec A Ingress */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0,
-        .name = "apm_a_rx",
-        .config = {
-                   .srcPeripheralPort = 2,     /* SRC: Codec A Ingress FIFO */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .transferMode = dmacHw_TRANSFER_MODE_CONTINUOUS,
-                   },
-        },
-       [DMA_DEVICE_APM_CODEC_A_MEM_TO_DEV] =   /* APM Codec A Egress */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0,
-        .name = "apm_a_tx",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .dstPeripheralPort = 3,     /* DST: Codec A Egress FIFO */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_2,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_32,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   },
-        },
-       [DMA_DEVICE_APM_CODEC_B_DEV_TO_MEM] =   /* APM Codec B Ingress */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0,
-        .name = "apm_b_rx",
-        .config = {
-                   .srcPeripheralPort = 4,     /* SRC: Codec B Ingress FIFO */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .transferMode = dmacHw_TRANSFER_MODE_CONTINUOUS,
-                   },
-        },
-       [DMA_DEVICE_APM_CODEC_B_MEM_TO_DEV] =   /* APM Codec B Egress */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0,
-        .name = "apm_b_tx",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .dstPeripheralPort = 5,     /* DST: Codec B Egress FIFO */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_2,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_32,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   },
-        },
-       [DMA_DEVICE_APM_CODEC_C_DEV_TO_MEM] =   /* APM Codec C Ingress */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "apm_c_rx",
-        .config = {
-                   .srcPeripheralPort = 4,     /* SRC: Codec C Ingress FIFO */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .transferMode = dmacHw_TRANSFER_MODE_CONTINUOUS,
-                   },
-        },
-       [DMA_DEVICE_APM_PCM0_DEV_TO_MEM] =      /* PCM0 RX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0,
-        .name = "pcm0_rx",
-        .config = {
-                   .srcPeripheralPort = 12,    /* SRC: PCM0 */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0,
-                   .dstStatusRegisterAddress = 0,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_8,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .transferMode = dmacHw_TRANSFER_MODE_CONTINUOUS,
-                   },
-        },
-       [DMA_DEVICE_APM_PCM0_MEM_TO_DEV] =      /* PCM0 TX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0,
-        .name = "pcm0_tx",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .dstPeripheralPort = 13,    /* DST: PCM0 */
-                   .srcStatusRegisterAddress = 0,
-                   .dstStatusRegisterAddress = 0,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_2,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_32,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_8,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   },
-        },
-       [DMA_DEVICE_APM_PCM1_DEV_TO_MEM] =      /* PCM1 RX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "pcm1_rx",
-        .config = {
-                   .srcPeripheralPort = 14,    /* SRC: PCM1 */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0,
-                   .dstStatusRegisterAddress = 0,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_8,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_4,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .transferMode = dmacHw_TRANSFER_MODE_CONTINUOUS,
-                   },
-        },
-       [DMA_DEVICE_APM_PCM1_MEM_TO_DEV] =      /* PCM1 TX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "pcm1_tx",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .dstPeripheralPort = 15,    /* DST: PCM1 */
-                   .srcStatusRegisterAddress = 0,
-                   .dstStatusRegisterAddress = 0,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_2,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_32,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_4,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_8,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   },
-        },
-       [DMA_DEVICE_SPUM_DEV_TO_MEM] =  /* SPUM RX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0 | DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "spum_rx",
-        .config = {
-                   .srcPeripheralPort = 6,     /* SRC: Codec A Ingress FIFO */
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_32,
-                   /* Busrt size **MUST** be 16 for SPUM to work */
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_16,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_16,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   /* on the RX side, SPU needs to be the flow controller */
-                   .flowControler = dmacHw_FLOW_CONTROL_PERIPHERAL,
-                   },
-        },
-       [DMA_DEVICE_SPUM_MEM_TO_DEV] =  /* SPUM TX */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0 | DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "spum_tx",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .dstPeripheralPort = 7,     /* DST: SPUM */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_2,
-                   .blockTransferInterrupt = dmacHw_INTERRUPT_DISABLE,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_32,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_32,
-                   /* Busrt size **MUST** be 16 for SPUM to work */
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_16,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_16,
-                   .transferMode = dmacHw_TRANSFER_MODE_PERREQUEST,
-                   },
-        },
-       [DMA_DEVICE_MEM_TO_VRAM] =      /* MEM 2 VRAM */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0 | DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "mem-to-vram",
-        .config = {
-                   .srcPeripheralPort = 0,     /* SRC: memory */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_1,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_2,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_8,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_8,
-                   },
-        },
-       [DMA_DEVICE_VRAM_TO_MEM] =      /* VRAM 2 MEM */
-       {
-        .flags = DMA_DEVICE_FLAG_ON_DMA0 | DMA_DEVICE_FLAG_ON_DMA1,
-        .name = "vram-to-mem",
-        .config = {
-                   .dstPeripheralPort = 0,     /* DST: memory */
-                   .srcStatusRegisterAddress = 0x00000000,
-                   .dstStatusRegisterAddress = 0x00000000,
-                   .srcUpdate = dmacHw_SRC_ADDRESS_UPDATE_MODE_INC,
-                   .dstUpdate = dmacHw_DST_ADDRESS_UPDATE_MODE_INC,
-                   .transferType = dmacHw_TRANSFER_TYPE_MEM_TO_MEM,
-                   .srcMasterInterface = dmacHw_SRC_MASTER_INTERFACE_2,
-                   .dstMasterInterface = dmacHw_DST_MASTER_INTERFACE_1,
-                   .completeTransferInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .errorInterrupt = dmacHw_INTERRUPT_ENABLE,
-                   .channelPriority = dmacHw_CHANNEL_PRIORITY_7,
-                   .srcMaxTransactionWidth = dmacHw_SRC_TRANSACTION_WIDTH_64,
-                   .dstMaxTransactionWidth = dmacHw_DST_TRANSACTION_WIDTH_64,
-                   .srcMaxBurstWidth = dmacHw_SRC_BURST_WIDTH_8,
-                   .dstMaxBurstWidth = dmacHw_DST_BURST_WIDTH_8,
-                   },
-        },
-};
-EXPORT_SYMBOL(DMA_gDeviceAttribute);   /* primarily for dma-test.c */
diff --git a/arch/arm/mach-bcmring/include/cfg_global_defines.h b/arch/arm/mach-bcmring/include/cfg_global_defines.h
deleted file mode 100644 (file)
index b5beb0b..0000000
+++ /dev/null
@@ -1,40 +0,0 @@
-/*****************************************************************************
-* Copyright 2006 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-#ifndef CFG_GLOBAL_DEFINES_H
-#define CFG_GLOBAL_DEFINES_H
-
-/* CHIP */
-#define BCM1103 1
-
-#define BCM1191 4
-#define BCM2153 5
-#define BCM2820 6
-
-#define BCM2826 8
-#define FPGA11107 9
-#define BCM11107   10
-#define BCM11109   11
-#define BCM11170   12
-#define BCM11110   13
-#define BCM11211   14
-
-/* CFG_GLOBAL_CHIP_FAMILY types */
-#define CFG_GLOBAL_CHIP_FAMILY_NONE        0
-#define CFG_GLOBAL_CHIP_FAMILY_BCM116X     2
-#define CFG_GLOBAL_CHIP_FAMILY_BCMRING     4
-#define CFG_GLOBAL_CHIP_FAMILY_BCM1103     8
-
-#define IMAGE_HEADER_SIZE_CHECKSUM    4
-#endif
diff --git a/arch/arm/mach-bcmring/include/csp/dmacHw.h b/arch/arm/mach-bcmring/include/csp/dmacHw.h
deleted file mode 100644 (file)
index e6a1dc4..0000000
+++ /dev/null
@@ -1,596 +0,0 @@
-/*****************************************************************************
-* Copyright 2004 - 2008 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-
-/****************************************************************************/
-/**
-*  @file    dmacHw.h
-*
-*  @brief   API definitions for low level DMA controller driver
-*
-*/
-/****************************************************************************/
-#ifndef _DMACHW_H
-#define _DMACHW_H
-
-#include <stddef.h>
-
-#include <csp/stdint.h>
-#include <mach/csp/dmacHw_reg.h>
-
-/* Define DMA Channel ID using DMA controller number (m) and channel number (c).
-
-   System specific channel ID should be defined as follows
-
-   For example:
-
-   #include <dmacHw.h>
-   ...
-   #define systemHw_LCD_CHANNEL_ID                dmacHw_MAKE_CHANNEL_ID(0,5)
-   #define systemHw_SWITCH_RX_CHANNEL_ID          dmacHw_MAKE_CHANNEL_ID(0,0)
-   #define systemHw_SWITCH_TX_CHANNEL_ID          dmacHw_MAKE_CHANNEL_ID(0,1)
-   #define systemHw_APM_RX_CHANNEL_ID             dmacHw_MAKE_CHANNEL_ID(0,3)
-   #define systemHw_APM_TX_CHANNEL_ID             dmacHw_MAKE_CHANNEL_ID(0,4)
-   ...
-   #define systemHw_SHARED1_CHANNEL_ID            dmacHw_MAKE_CHANNEL_ID(1,4)
-   #define systemHw_SHARED2_CHANNEL_ID            dmacHw_MAKE_CHANNEL_ID(1,5)
-   #define systemHw_SHARED3_CHANNEL_ID            dmacHw_MAKE_CHANNEL_ID(0,6)
-   ...
-*/
-#define dmacHw_MAKE_CHANNEL_ID(m, c)         (m << 8 | c)
-
-typedef enum {
-       dmacHw_CHANNEL_PRIORITY_0 = dmacHw_REG_CFG_LO_CH_PRIORITY_0,    /* Channel priority 0. Lowest priority DMA channel */
-       dmacHw_CHANNEL_PRIORITY_1 = dmacHw_REG_CFG_LO_CH_PRIORITY_1,    /* Channel priority 1 */
-       dmacHw_CHANNEL_PRIORITY_2 = dmacHw_REG_CFG_LO_CH_PRIORITY_2,    /* Channel priority 2 */
-       dmacHw_CHANNEL_PRIORITY_3 = dmacHw_REG_CFG_LO_CH_PRIORITY_3,    /* Channel priority 3 */
-       dmacHw_CHANNEL_PRIORITY_4 = dmacHw_REG_CFG_LO_CH_PRIORITY_4,    /* Channel priority 4 */
-       dmacHw_CHANNEL_PRIORITY_5 = dmacHw_REG_CFG_LO_CH_PRIORITY_5,    /* Channel priority 5 */
-       dmacHw_CHANNEL_PRIORITY_6 = dmacHw_REG_CFG_LO_CH_PRIORITY_6,    /* Channel priority 6 */
-       dmacHw_CHANNEL_PRIORITY_7 = dmacHw_REG_CFG_LO_CH_PRIORITY_7     /* Channel priority 7. Highest priority DMA channel */
-} dmacHw_CHANNEL_PRIORITY_e;
-
-/* Source destination master interface */
-typedef enum {
-       dmacHw_SRC_MASTER_INTERFACE_1 = dmacHw_REG_CTL_SMS_1,   /* Source DMA master interface 1 */
-       dmacHw_SRC_MASTER_INTERFACE_2 = dmacHw_REG_CTL_SMS_2,   /* Source DMA master interface 2 */
-       dmacHw_DST_MASTER_INTERFACE_1 = dmacHw_REG_CTL_DMS_1,   /* Destination DMA master interface 1 */
-       dmacHw_DST_MASTER_INTERFACE_2 = dmacHw_REG_CTL_DMS_2    /* Destination DMA master interface 2 */
-} dmacHw_MASTER_INTERFACE_e;
-
-typedef enum {
-       dmacHw_SRC_TRANSACTION_WIDTH_8 = dmacHw_REG_CTL_SRC_TR_WIDTH_8, /* Source 8 bit  (1 byte) per transaction */
-       dmacHw_SRC_TRANSACTION_WIDTH_16 = dmacHw_REG_CTL_SRC_TR_WIDTH_16,       /* Source 16 bit (2 byte) per transaction */
-       dmacHw_SRC_TRANSACTION_WIDTH_32 = dmacHw_REG_CTL_SRC_TR_WIDTH_32,       /* Source 32 bit (4 byte) per transaction */
-       dmacHw_SRC_TRANSACTION_WIDTH_64 = dmacHw_REG_CTL_SRC_TR_WIDTH_64,       /* Source 64 bit (8 byte) per transaction */
-       dmacHw_DST_TRANSACTION_WIDTH_8 = dmacHw_REG_CTL_DST_TR_WIDTH_8, /* Destination 8 bit  (1 byte) per transaction */
-       dmacHw_DST_TRANSACTION_WIDTH_16 = dmacHw_REG_CTL_DST_TR_WIDTH_16,       /* Destination 16 bit (2 byte) per transaction */
-       dmacHw_DST_TRANSACTION_WIDTH_32 = dmacHw_REG_CTL_DST_TR_WIDTH_32,       /* Destination 32 bit (4 byte) per transaction */
-       dmacHw_DST_TRANSACTION_WIDTH_64 = dmacHw_REG_CTL_DST_TR_WIDTH_64        /* Destination 64 bit (8 byte) per transaction */
-} dmacHw_TRANSACTION_WIDTH_e;
-
-typedef enum {
-       dmacHw_SRC_BURST_WIDTH_0 = dmacHw_REG_CTL_SRC_MSIZE_0,  /* Source No burst */
-       dmacHw_SRC_BURST_WIDTH_4 = dmacHw_REG_CTL_SRC_MSIZE_4,  /* Source 4  X dmacHw_TRANSACTION_WIDTH_xxx bytes per burst */
-       dmacHw_SRC_BURST_WIDTH_8 = dmacHw_REG_CTL_SRC_MSIZE_8,  /* Source 8  X dmacHw_TRANSACTION_WIDTH_xxx bytes per burst */
-       dmacHw_SRC_BURST_WIDTH_16 = dmacHw_REG_CTL_SRC_MSIZE_16,        /* Source 16 X dmacHw_TRANSACTION_WIDTH_xxx bytes per burst */
-       dmacHw_DST_BURST_WIDTH_0 = dmacHw_REG_CTL_DST_MSIZE_0,  /* Destination No burst */
-       dmacHw_DST_BURST_WIDTH_4 = dmacHw_REG_CTL_DST_MSIZE_4,  /* Destination 4  X dmacHw_TRANSACTION_WIDTH_xxx bytes per burst */
-       dmacHw_DST_BURST_WIDTH_8 = dmacHw_REG_CTL_DST_MSIZE_8,  /* Destination 8  X dmacHw_TRANSACTION_WIDTH_xxx bytes per burst */
-       dmacHw_DST_BURST_WIDTH_16 = dmacHw_REG_CTL_DST_MSIZE_16 /* Destination 16 X dmacHw_TRANSACTION_WIDTH_xxx bytes per burst */
-} dmacHw_BURST_WIDTH_e;
-
-typedef enum {
-       dmacHw_TRANSFER_TYPE_MEM_TO_MEM = dmacHw_REG_CTL_TTFC_MM_DMAC,  /* Memory to memory transfer */
-       dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_MEM = dmacHw_REG_CTL_TTFC_PM_DMAC,   /* Peripheral to memory transfer */
-       dmacHw_TRANSFER_TYPE_MEM_TO_PERIPHERAL = dmacHw_REG_CTL_TTFC_MP_DMAC,   /* Memory to peripheral transfer */
-       dmacHw_TRANSFER_TYPE_PERIPHERAL_TO_PERIPHERAL = dmacHw_REG_CTL_TTFC_PP_DMAC     /* Peripheral to peripheral transfer */
-} dmacHw_TRANSFER_TYPE_e;
-
-typedef enum {
-       dmacHw_TRANSFER_MODE_PERREQUEST,        /* Block transfer per DMA request */
-       dmacHw_TRANSFER_MODE_CONTINUOUS,        /* Continuous transfer of streaming data */
-       dmacHw_TRANSFER_MODE_PERIODIC   /* Periodic transfer of streaming data */
-} dmacHw_TRANSFER_MODE_e;
-
-typedef enum {
-       dmacHw_SRC_ADDRESS_UPDATE_MODE_INC = dmacHw_REG_CTL_SINC_INC,   /* Increment source address after every transaction */
-       dmacHw_SRC_ADDRESS_UPDATE_MODE_DEC = dmacHw_REG_CTL_SINC_DEC,   /* Decrement source address after every transaction */
-       dmacHw_DST_ADDRESS_UPDATE_MODE_INC = dmacHw_REG_CTL_DINC_INC,   /* Increment destination address after every transaction */
-       dmacHw_DST_ADDRESS_UPDATE_MODE_DEC = dmacHw_REG_CTL_DINC_DEC,   /* Decrement destination address after every transaction */
-       dmacHw_SRC_ADDRESS_UPDATE_MODE_NC = dmacHw_REG_CTL_SINC_NC,     /* No change in source address after every transaction */
-       dmacHw_DST_ADDRESS_UPDATE_MODE_NC = dmacHw_REG_CTL_DINC_NC      /* No change in destination address after every transaction */
-} dmacHw_ADDRESS_UPDATE_MODE_e;
-
-typedef enum {
-       dmacHw_FLOW_CONTROL_DMA,        /* DMA working as flow controller (default) */
-       dmacHw_FLOW_CONTROL_PERIPHERAL  /* Peripheral working as flow controller */
-} dmacHw_FLOW_CONTROL_e;
-
-typedef enum {
-       dmacHw_TRANSFER_STATUS_BUSY,    /* DMA Transfer ongoing */
-       dmacHw_TRANSFER_STATUS_DONE,    /* DMA Transfer completed */
-       dmacHw_TRANSFER_STATUS_ERROR    /* DMA Transfer error */
-} dmacHw_TRANSFER_STATUS_e;
-
-typedef enum {
-       dmacHw_INTERRUPT_DISABLE,       /* Interrupt disable  */
-       dmacHw_INTERRUPT_ENABLE /* Interrupt enable */
-} dmacHw_INTERRUPT_e;
-
-typedef enum {
-       dmacHw_INTERRUPT_STATUS_NONE = 0x0,     /* No DMA interrupt */
-       dmacHw_INTERRUPT_STATUS_TRANS = 0x1,    /* End of DMA transfer interrupt */
-       dmacHw_INTERRUPT_STATUS_BLOCK = 0x2,    /* End of block transfer interrupt */
-       dmacHw_INTERRUPT_STATUS_ERROR = 0x4     /* Error interrupt */
-} dmacHw_INTERRUPT_STATUS_e;
-
-typedef enum {
-       dmacHw_CONTROLLER_ATTRIB_CHANNEL_NUM,   /* Number of DMA channel */
-       dmacHw_CONTROLLER_ATTRIB_CHANNEL_MAX_BLOCK_SIZE,        /* Maximum channel burst size */
-       dmacHw_CONTROLLER_ATTRIB_MASTER_INTF_NUM,       /* Number of DMA master interface */
-       dmacHw_CONTROLLER_ATTRIB_CHANNEL_BUS_WIDTH,     /* Channel Data bus width */
-       dmacHw_CONTROLLER_ATTRIB_CHANNEL_FIFO_SIZE      /* Channel FIFO size */
-} dmacHw_CONTROLLER_ATTRIB_e;
-
-typedef unsigned long dmacHw_HANDLE_t; /* DMA channel handle */
-typedef uint32_t dmacHw_ID_t;  /* DMA channel Id.  Must be created using
-                                  "dmacHw_MAKE_CHANNEL_ID" macro
-                                */
-/* DMA channel configuration parameters */
-typedef struct {
-       uint32_t srcPeripheralPort;     /* Source peripheral port */
-       uint32_t dstPeripheralPort;     /* Destination peripheral port */
-       uint32_t srcStatusRegisterAddress;      /* Source status register address */
-       uint32_t dstStatusRegisterAddress;      /* Destination status register address of type  */
-
-       uint32_t srcGatherWidth;        /* Number of bytes gathered before successive gather opearation */
-       uint32_t srcGatherJump; /* Number of bytes jumpped before successive gather opearation */
-       uint32_t dstScatterWidth;       /* Number of bytes sacattered before successive scatter opearation */
-       uint32_t dstScatterJump;        /* Number of bytes jumpped  before successive scatter opearation */
-       uint32_t maxDataPerBlock;       /* Maximum number of bytes to be transferred per block/descrptor.
-                                          0 = Maximum possible.
-                                        */
-
-       dmacHw_ADDRESS_UPDATE_MODE_e srcUpdate; /* Source address update mode */
-       dmacHw_ADDRESS_UPDATE_MODE_e dstUpdate; /* Destination address update mode */
-       dmacHw_TRANSFER_TYPE_e transferType;    /* DMA transfer type  */
-       dmacHw_TRANSFER_MODE_e transferMode;    /* DMA transfer mode */
-       dmacHw_MASTER_INTERFACE_e srcMasterInterface;   /* DMA source interface  */
-       dmacHw_MASTER_INTERFACE_e dstMasterInterface;   /* DMA destination interface */
-       dmacHw_TRANSACTION_WIDTH_e srcMaxTransactionWidth;      /* Source transaction width   */
-       dmacHw_TRANSACTION_WIDTH_e dstMaxTransactionWidth;      /* Destination transaction width */
-       dmacHw_BURST_WIDTH_e srcMaxBurstWidth;  /* Source burst width */
-       dmacHw_BURST_WIDTH_e dstMaxBurstWidth;  /* Destination burst width */
-       dmacHw_INTERRUPT_e blockTransferInterrupt;      /* Block trsnafer interrupt */
-       dmacHw_INTERRUPT_e completeTransferInterrupt;   /* Complete DMA trsnafer interrupt */
-       dmacHw_INTERRUPT_e errorInterrupt;      /* Error interrupt */
-       dmacHw_CHANNEL_PRIORITY_e channelPriority;      /* Channel priority */
-       dmacHw_FLOW_CONTROL_e flowControler;    /* Data flow controller */
-} dmacHw_CONFIG_t;
-
-/****************************************************************************/
-/**
-*  @brief   Initializes DMA
-*
-*  This function initializes DMA CSP driver
-*
-*  @note
-*     Must be called before using any DMA channel
-*/
-/****************************************************************************/
-void dmacHw_initDma(void);
-
-/****************************************************************************/
-/**
-*  @brief   Exit function for  DMA
-*
-*  This function isolates DMA from the system
-*
-*/
-/****************************************************************************/
-void dmacHw_exitDma(void);
-
-/****************************************************************************/
-/**
-*  @brief   Gets a handle to a DMA channel
-*
-*  This function returns a handle, representing a control block of a particular DMA channel
-*
-*  @return  -1       - On Failure
-*            handle  - On Success, representing a channel control block
-*
-*  @note
-*     None  Channel ID must be created using "dmacHw_MAKE_CHANNEL_ID" macro
-*/
-/****************************************************************************/
-dmacHw_HANDLE_t dmacHw_getChannelHandle(dmacHw_ID_t channelId  /* [ IN ] DMA Channel Id */
-    );
-
-/****************************************************************************/
-/**
-*  @brief   Initializes a DMA channel for use
-*
-*  This function initializes and resets a DMA channel for use
-*
-*  @return  -1     - On Failure
-*            0     - On Success
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-int dmacHw_initChannel(dmacHw_HANDLE_t handle  /*  [ IN ] DMA Channel handle  */
-    );
-
-/****************************************************************************/
-/**
-*  @brief  Estimates number of descriptor needed to perform certain DMA transfer
-*
-*
-*  @return  On failure : -1
-*           On success : Number of descriptor count
-*
-*
-*/
-/****************************************************************************/
-int dmacHw_calculateDescriptorCount(dmacHw_CONFIG_t *pConfig,  /*   [ IN ] Configuration settings */
-                                   void *pSrcAddr,     /*   [ IN ] Source (Peripheral/Memory) address */
-                                   void *pDstAddr,     /*   [ IN ] Destination (Peripheral/Memory) address */
-                                   size_t dataLen      /*   [ IN ] Data length in bytes */
-    );
-
-/****************************************************************************/
-/**
-*  @brief   Initializes descriptor ring
-*
-*  This function will initializes the descriptor ring of a DMA channel
-*
-*
-*  @return   -1 - On failure
-*             0 - On success
-*  @note
-*     - "len" parameter should be obtained from "dmacHw_descriptorLen"
-*     - Descriptor buffer MUST be 32 bit aligned and uncached as it
-*       is accessed by ARM and DMA
-*/
-/****************************************************************************/
-int dmacHw_initDescriptor(void *pDescriptorVirt,       /*  [ IN ] Virtual address of uncahced buffer allocated to form descriptor ring */
-                         uint32_t descriptorPhyAddr,   /*  [ IN ] Physical address of pDescriptorVirt (descriptor buffer) */
-                         uint32_t len, /*  [ IN ] Size of the pBuf */
-                         uint32_t num  /*  [ IN ] Number of descriptor in the ring */
-    );
-
-/****************************************************************************/
-/**
-*  @brief  Finds amount of memory required to form a descriptor ring
-*
-*
-*  @return   Number of bytes required to form a descriptor ring
-*
-*
-*  @note
-*     None
-*/
-/****************************************************************************/
-uint32_t dmacHw_descriptorLen(uint32_t descCnt /*  [ IN ] Number of descriptor in the ring */
-    );
-
-/****************************************************************************/
-/**
-*  @brief   Configure DMA channel
-*
-*  @return  0  : On success
-*           -1 : On failure
-*/
-/****************************************************************************/
-int dmacHw_configChannel(dmacHw_HANDLE_t handle,       /*  [ IN ] DMA Channel handle  */
-                        dmacHw_CONFIG_t *pConfig       /*   [ IN ] Configuration settings */
-    );
-
-/****************************************************************************/
-/**
-*  @brief   Set descriptors for known data length
-*
-*  When DMA has to work as a flow controller, this function prepares the
-*  descriptor chain to transfer data
-*
-*  from:
-*          - Memory to memory
-*          - Peripheral to memory
-*          - Memory to Peripheral
-*          - Peripheral to Peripheral
-*
-*  @return   -1 - On failure
-*             0 - On success
-*
-*/
-/****************************************************************************/
-int dmacHw_setDataDescriptor(dmacHw_CONFIG_t *pConfig, /*  [ IN ] Configuration settings */
-                            void *pDescriptor, /*  [ IN ] Descriptor buffer  */
-                            void *pSrcAddr,    /*  [ IN ] Source (Peripheral/Memory) address */
-                 &