Merge remote-tracking branch 'rmk/devel-stable' into for-3.3/soc
authorOlof Johansson <olof@lixom.net>
Sun, 18 Dec 2011 04:05:50 +0000 (20:05 -0800)
committerOlof Johansson <olof@lixom.net>
Sun, 18 Dec 2011 04:05:50 +0000 (20:05 -0800)
Conflicts:
arch/arm/mach-tegra/board-dt.c

Signed-off-by: Olof Johansson <olof@lixom.net>
14 files changed:
Documentation/devicetree/bindings/arm/tegra.txt [new file with mode: 0644]
Documentation/devicetree/bindings/usb/tegra-usb.txt [new file with mode: 0644]
arch/arm/boot/dts/tegra-harmony.dts
arch/arm/boot/dts/tegra-paz00.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra-seaboard.dts
arch/arm/boot/dts/tegra-trimslice.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra-ventana.dts
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30.dtsi [new file with mode: 0644]
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/Makefile.boot
arch/arm/mach-tegra/board-dt.c
arch/arm/mach-tegra/irq.c
drivers/usb/host/ehci-tegra.c

diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt
new file mode 100644 (file)
index 0000000..6e69d2e
--- /dev/null
@@ -0,0 +1,14 @@
+NVIDIA Tegra device tree bindings
+-------------------------------------------
+
+Boards with the tegra20 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "nvidia,tegra20";
+
+Boards with the tegra30 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "nvidia,tegra30";
diff --git a/Documentation/devicetree/bindings/usb/tegra-usb.txt b/Documentation/devicetree/bindings/usb/tegra-usb.txt
new file mode 100644 (file)
index 0000000..035d63d
--- /dev/null
@@ -0,0 +1,13 @@
+Tegra SOC USB controllers
+
+The device node for a USB controller that is part of a Tegra
+SOC is as described in the document "Open Firmware Recommended
+Practice : Universal Serial Bus" with the following modifications
+and additions :
+
+Required properties :
+ - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
+   used in host mode.
+ - phy_type : Should be one of "ulpi" or "utmi".
+ - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
+   activated for the bus to be powered.
index 0e225b86b6520ab944432b5ab312e7d3f08813d9..80afa1b70b80d6ed448692a5434014fa36e910f8 100644 (file)
@@ -1,16 +1,11 @@
 /dts-v1/;
 
-/memreserve/ 0x1c000000 0x04000000;
 /include/ "tegra20.dtsi"
 
 / {
        model = "NVIDIA Tegra2 Harmony evaluation board";
        compatible = "nvidia,harmony", "nvidia,tegra20";
 
-       chosen {
-               bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootwait";
-       };
-
        memory@0 {
                reg = < 0x00000000 0x40000000 >;
        };
                ext-mic-en-gpios = <&gpio 185 0>;
        };
 
+       serial@70006000 {
+               status = "disable";
+       };
+
+       serial@70006040 {
+               status = "disable";
+       };
+
+       serial@70006200 {
+               status = "disable";
+       };
+
        serial@70006300 {
                clock-frequency = < 216000000 >;
        };
 
+       serial@70006400 {
+               status = "disable";
+       };
+
+       sdhci@c8000000 {
+               status = "disable";
+       };
+
        sdhci@c8000200 {
                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
                power-gpios = <&gpio 155 0>; /* gpio PT3 */
        };
 
+       sdhci@c8000400 {
+               status = "disable";
+       };
+
        sdhci@c8000600 {
                cd-gpios = <&gpio 58 0>; /* gpio PH2 */
                wp-gpios = <&gpio 59 0>; /* gpio PH3 */
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
new file mode 100644 (file)
index 0000000..1a1d702
--- /dev/null
@@ -0,0 +1,77 @@
+/dts-v1/;
+
+/include/ "tegra20.dtsi"
+
+/ {
+       model = "Toshiba AC100 / Dynabook AZ";
+       compatible = "compal,paz00", "nvidia,tegra20";
+
+       memory@0 {
+               reg = <0x00000000 0x20000000>;
+       };
+
+       i2c@7000c000 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c400 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c500 {
+               status = "disable";
+       };
+
+       nvec@7000c500 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,nvec";
+               reg = <0x7000C500 0x100>;
+               interrupts = <0 92 0x04>;
+               clock-frequency = <80000>;
+               request-gpios = <&gpio 170 0>;
+               slave-addr = <138>;
+       };
+
+       i2c@7000d000 {
+               clock-frequency = <400000>;
+       };
+
+       serial@70006000 {
+               clock-frequency = <216000000>;
+       };
+
+       serial@70006040 {
+               status = "disable";
+       };
+
+       serial@70006200 {
+               status = "disable";
+       };
+
+       serial@70006300 {
+               clock-frequency = <216000000>;
+       };
+
+       serial@70006400 {
+               status = "disable";
+       };
+
+       sdhci@c8000000 {
+               cd-gpios = <&gpio 173 0>; /* gpio PV5 */
+               wp-gpios = <&gpio 57 0>;  /* gpio PH1 */
+               power-gpios = <&gpio 155 0>; /* gpio PT3 */
+       };
+
+       sdhci@c8000200 {
+               status = "disable";
+       };
+
+       sdhci@c8000400 {
+               status = "disable";
+       };
+
+       sdhci@c8000600 {
+               support-8bit;
+       };
+};
index a72299b8e66857b43c1ac2ec4a2c709df6562b2a..f552bcc0441279856dab4f36a403002a936eb217 100644 (file)
@@ -1,25 +1,60 @@
 /dts-v1/;
 
-/memreserve/ 0x1c000000 0x04000000;
 /include/ "tegra20.dtsi"
 
 / {
        model = "NVIDIA Seaboard";
        compatible = "nvidia,seaboard", "nvidia,tegra20";
 
-       chosen {
-               bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
-       };
-
        memory {
                device_type = "memory";
                reg = < 0x00000000 0x40000000 >;
        };
 
+       i2c@7000c000 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c400 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c500 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000d000 {
+               clock-frequency = <400000>;
+       };
+
+       serial@70006000 {
+               status = "disable";
+       };
+
+       serial@70006040 {
+               status = "disable";
+       };
+
+       serial@70006200 {
+               status = "disable";
+       };
+
        serial@70006300 {
                clock-frequency = < 216000000 >;
        };
 
+       serial@70006400 {
+               status = "disable";
+       };
+
+       sdhci@c8000000 {
+               status = "disable";
+       };
+
+       sdhci@c8000200 {
+               status = "disable";
+       };
+
        sdhci@c8000400 {
                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
@@ -29,4 +64,8 @@
        sdhci@c8000600 {
                support-8bit;
        };
+
+       usb@c5000000 {
+               nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
+       };
 };
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts
new file mode 100644 (file)
index 0000000..3b3ee7d
--- /dev/null
@@ -0,0 +1,65 @@
+/dts-v1/;
+
+/include/ "tegra20.dtsi"
+
+/ {
+       model = "Compulab TrimSlice board";
+       compatible = "compulab,trimslice", "nvidia,tegra20";
+
+       memory@0 {
+               reg = < 0x00000000 0x40000000 >;
+       };
+
+       i2c@7000c000 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c400 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c500 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000d000 {
+               status = "disable";
+       };
+
+       serial@70006000 {
+               clock-frequency = < 216000000 >;
+       };
+
+       serial@70006040 {
+               status = "disable";
+       };
+
+       serial@70006200 {
+               status = "disable";
+       };
+
+       serial@70006300 {
+               status = "disable";
+       };
+
+       serial@70006400 {
+               status = "disable";
+       };
+
+       sdhci@c8000000 {
+               status = "disable";
+       };
+
+       sdhci@c8000200 {
+               status = "disable";
+       };
+
+       sdhci@c8000400 {
+               status = "disable";
+       };
+
+       sdhci@c8000600 {
+               cd-gpios = <&gpio 121 0>;
+               wp-gpios = <&gpio 122 0>;
+       };
+};
index 3f9abd6b6964546014490a3942abce3675e6e254..c7d3b87f29dfe0458f047cf64e1dc4f23d5758f9 100644 (file)
@@ -1,24 +1,59 @@
 /dts-v1/;
 
-/memreserve/ 0x1c000000 0x04000000;
 /include/ "tegra20.dtsi"
 
 / {
        model = "NVIDIA Tegra2 Ventana evaluation board";
        compatible = "nvidia,ventana", "nvidia,tegra20";
 
-       chosen {
-               bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/ram rdinit=/sbin/init";
-       };
-
        memory {
                reg = < 0x00000000 0x40000000 >;
        };
 
+       i2c@7000c000 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c400 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000c500 {
+               clock-frequency = <400000>;
+       };
+
+       i2c@7000d000 {
+               clock-frequency = <400000>;
+       };
+
+       serial@70006000 {
+               status = "disable";
+       };
+
+       serial@70006040 {
+               status = "disable";
+       };
+
+       serial@70006200 {
+               status = "disable";
+       };
+
        serial@70006300 {
                clock-frequency = < 216000000 >;
        };
 
+       serial@70006400 {
+               status = "disable";
+       };
+
+       sdhci@c8000000 {
+               status = "disable";
+       };
+
+       sdhci@c8000200 {
+               status = "disable";
+       };
+
        sdhci@c8000400 {
                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
index 65d7e6a333eb8214ae5b21607d325e8db84935e1..660c8ad537c01917b13dde8ed8117d9972fba92d 100644 (file)
@@ -5,9 +5,9 @@
        interrupt-parent = <&intc>;
 
        intc: interrupt-controller@50041000 {
-               compatible = "nvidia,tegra20-gic";
+               compatible = "arm,cortex-a9-gic";
                interrupt-controller;
-               #interrupt-cells = <1>;
+               #interrupt-cells = <3>;
                reg = < 0x50041000 0x1000 >,
                      < 0x50040100 0x0100 >;
        };
@@ -17,7 +17,7 @@
                #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C000 0x100>;
-               interrupts = < 70 >;
+               interrupts = < 0 38 0x04 >;
        };
 
        i2c@7000c400 {
@@ -25,7 +25,7 @@
                #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C400 0x100>;
-               interrupts = < 116 >;
+               interrupts = < 0 84 0x04 >;
        };
 
        i2c@7000c500 {
@@ -33,7 +33,7 @@
                #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000C500 0x100>;
-               interrupts = < 124 >;
+               interrupts = < 0 92 0x04 >;
        };
 
        i2c@7000d000 {
                #size-cells = <0>;
                compatible = "nvidia,tegra20-i2c";
                reg = <0x7000D000 0x200>;
-               interrupts = < 85 >;
+               interrupts = < 0 53 0x04 >;
        };
 
        i2s@70002800 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra20-i2s";
                reg = <0x70002800 0x200>;
-               interrupts = < 45 >;
+               interrupts = < 0 13 0x04 >;
                dma-channel = < 2 >;
        };
 
        i2s@70002a00 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra20-i2s";
                reg = <0x70002a00 0x200>;
-               interrupts = < 35 >;
+               interrupts = < 0 3 0x04 >;
                dma-channel = < 1 >;
        };
 
        das@70000c00 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "nvidia,tegra20-das";
                reg = <0x70000c00 0x80>;
        };
        gpio: gpio@6000d000 {
                compatible = "nvidia,tegra20-gpio";
                reg = < 0x6000d000 0x1000 >;
-               interrupts = < 64 65 66 67 87 119 121 >;
+               interrupts = < 0 32 0x04
+                              0 33 0x04
+                              0 34 0x04
+                              0 35 0x04
+                              0 55 0x04
+                              0 87 0x04
+                              0 89 0x04 >;
                #gpio-cells = <2>;
                gpio-controller;
        };
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006000 0x40>;
                reg-shift = <2>;
-               interrupts = < 68 >;
+               interrupts = < 0 36 0x04 >;
        };
 
        serial@70006040 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006040 0x40>;
                reg-shift = <2>;
-               interrupts = < 69 >;
+               interrupts = < 0 37 0x04 >;
        };
 
        serial@70006200 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006200 0x100>;
                reg-shift = <2>;
-               interrupts = < 78 >;
+               interrupts = < 0 46 0x04 >;
        };
 
        serial@70006300 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006300 0x100>;
                reg-shift = <2>;
-               interrupts = < 122 >;
+               interrupts = < 0 90 0x04 >;
        };
 
        serial@70006400 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006400 0x100>;
                reg-shift = <2>;
-               interrupts = < 123 >;
+               interrupts = < 0 91 0x04 >;
        };
 
        sdhci@c8000000 {
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000000 0x200>;
-               interrupts = < 46 >;
+               interrupts = < 0 14 0x04 >;
        };
 
        sdhci@c8000200 {
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000200 0x200>;
-               interrupts = < 47 >;
+               interrupts = < 0 15 0x04 >;
        };
 
        sdhci@c8000400 {
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000400 0x200>;
-               interrupts = < 51 >;
+               interrupts = < 0 19 0x04 >;
        };
 
        sdhci@c8000600 {
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000600 0x200>;
-               interrupts = < 63 >;
+               interrupts = < 0 31 0x04 >;
+       };
+
+       usb@c5000000 {
+               compatible = "nvidia,tegra20-ehci", "usb-ehci";
+               reg = <0xc5000000 0x4000>;
+               interrupts = < 0 20 0x04 >;
+               phy_type = "utmi";
+       };
+
+       usb@c5004000 {
+               compatible = "nvidia,tegra20-ehci", "usb-ehci";
+               reg = <0xc5004000 0x4000>;
+               interrupts = < 0 21 0x04 >;
+               phy_type = "ulpi";
+       };
+
+       usb@c5008000 {
+               compatible = "nvidia,tegra20-ehci", "usb-ehci";
+               reg = <0xc5008000 0x4000>;
+               interrupts = < 0 97 0x04 >;
+               phy_type = "utmi";
        };
 };
 
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
new file mode 100644 (file)
index 0000000..ee7db98
--- /dev/null
@@ -0,0 +1,127 @@
+/include/ "skeleton.dtsi"
+
+/ {
+       compatible = "nvidia,tegra30";
+       interrupt-parent = <&intc>;
+
+       intc: interrupt-controller@50041000 {
+               compatible = "arm,cortex-a9-gic";
+               interrupt-controller;
+               #interrupt-cells = <3>;
+               reg = < 0x50041000 0x1000 >,
+                     < 0x50040100 0x0100 >;
+       };
+
+       i2c@7000c000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000C000 0x100>;
+               interrupts = < 0 38 0x04 >;
+       };
+
+       i2c@7000c400 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000C400 0x100>;
+               interrupts = < 0 84 0x04 >;
+       };
+
+       i2c@7000c500 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000C500 0x100>;
+               interrupts = < 0 92 0x04 >;
+       };
+
+       i2c@7000c700 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000c700 0x100>;
+               interrupts = < 0 120 0x04 >;
+       };
+
+       i2c@7000d000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000D000 0x100>;
+               interrupts = < 0 53 0x04 >;
+       };
+
+       gpio: gpio@6000d000 {
+               compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
+               reg = < 0x6000d000 0x1000 >;
+               interrupts = < 0 32 0x04 0 33 0x04 0 34 0x04 0 35 0x04 0 55 0x04 0 87 0x04 0 89 0x04 >;
+               #gpio-cells = <2>;
+               gpio-controller;
+       };
+
+       serial@70006000 {
+               compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+               reg = <0x70006000 0x40>;
+               reg-shift = <2>;
+               interrupts = < 0 36 0x04 >;
+       };
+
+       serial@70006040 {
+               compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+               reg = <0x70006040 0x40>;
+               reg-shift = <2>;
+               interrupts = < 0 37 0x04 >;
+       };
+
+       serial@70006200 {
+               compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+               reg = <0x70006200 0x100>;
+               reg-shift = <2>;
+               interrupts = < 0 46 0x04 >;
+       };
+
+       serial@70006300 {
+               compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+               reg = <0x70006300 0x100>;
+               reg-shift = <2>;
+               interrupts = < 0 90 0x04 >;
+       };
+
+       serial@70006400 {
+               compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+               reg = <0x70006400 0x100>;
+               reg-shift = <2>;
+               interrupts = < 0 91 0x04 >;
+       };
+
+       sdhci@78000000 {
+               compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+               reg = <0x78000000 0x200>;
+               interrupts = < 0 14 0x04 >;
+       };
+
+       sdhci@78000200 {
+               compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+               reg = <0x78000200 0x200>;
+               interrupts = < 0 15 0x04 >;
+       };
+
+       sdhci@78000400 {
+               compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+               reg = <0x78000400 0x200>;
+               interrupts = < 0 19 0x04 >;
+       };
+
+       sdhci@78000600 {
+               compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+               reg = <0x78000600 0x200>;
+               interrupts = < 0 31 0x04 >;
+       };
+
+       pinmux: pinmux@70000000 {
+               compatible = "nvidia,tegra30-pinmux";
+               reg = < 0x70000868 0xd0     /* Pad control registers */
+                       0x70003000 0x3e0 >; /* Mux registers */
+       };
+};
index 91a07e1872085d26ce2a4834db40df410f30b92e..c9ec38e829913c41694484f7ecea7cf0d4b7e7dd 100644 (file)
@@ -18,20 +18,22 @@ obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o
 obj-$(CONFIG_TEGRA_PCI)                        += pcie.o
 obj-$(CONFIG_USB_SUPPORT)              += usb_phy.o
 
-obj-${CONFIG_MACH_HARMONY}              += board-harmony.o
-obj-${CONFIG_MACH_HARMONY}              += board-harmony-pinmux.o
-obj-${CONFIG_MACH_HARMONY}              += board-harmony-pcie.o
-obj-${CONFIG_MACH_HARMONY}              += board-harmony-power.o
+obj-$(CONFIG_MACH_HARMONY)              += board-harmony.o
+obj-$(CONFIG_MACH_HARMONY)              += board-harmony-pinmux.o
+obj-$(CONFIG_MACH_HARMONY)              += board-harmony-pcie.o
+obj-$(CONFIG_MACH_HARMONY)              += board-harmony-power.o
 
-obj-${CONFIG_MACH_PAZ00}               += board-paz00.o
-obj-${CONFIG_MACH_PAZ00}               += board-paz00-pinmux.o
+obj-$(CONFIG_MACH_PAZ00)               += board-paz00.o
+obj-$(CONFIG_MACH_PAZ00)               += board-paz00-pinmux.o
 
-obj-${CONFIG_MACH_SEABOARD}             += board-seaboard.o
-obj-${CONFIG_MACH_SEABOARD}             += board-seaboard-pinmux.o
+obj-$(CONFIG_MACH_SEABOARD)             += board-seaboard.o
+obj-$(CONFIG_MACH_SEABOARD)             += board-seaboard-pinmux.o
 
-obj-${CONFIG_MACH_TEGRA_DT}             += board-dt.o
-obj-${CONFIG_MACH_TEGRA_DT}             += board-harmony-pinmux.o
-obj-${CONFIG_MACH_TEGRA_DT}             += board-seaboard-pinmux.o
+obj-$(CONFIG_MACH_TEGRA_DT)             += board-dt.o
+obj-$(CONFIG_MACH_TEGRA_DT)             += board-harmony-pinmux.o
+obj-$(CONFIG_MACH_TEGRA_DT)             += board-seaboard-pinmux.o
+obj-$(CONFIG_MACH_TEGRA_DT)             += board-paz00-pinmux.o
+obj-$(CONFIG_MACH_TEGRA_DT)             += board-trimslice-pinmux.o
 
-obj-${CONFIG_MACH_TRIMSLICE}            += board-trimslice.o
-obj-${CONFIG_MACH_TRIMSLICE}            += board-trimslice-pinmux.o
+obj-$(CONFIG_MACH_TRIMSLICE)            += board-trimslice.o
+obj-$(CONFIG_MACH_TRIMSLICE)            += board-trimslice-pinmux.o
index bd12c9fb81e8e8600b7017a9b22c6f66a48fca9e..cf51a000d400728ff85b43063060ae639cccb349 100644 (file)
@@ -3,5 +3,7 @@ params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC)        := 0x00800000
 
 dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb
+dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb
 dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb
+dtb-$(CONFIG_MACH_TRIMSLICE) += tegra-trimslice.dtb
 dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb
index f6f03ce340fcafd4a0f72dff707ad3764a6321e2..c21863d6425da47b720d965a9a93a165deceaa3e 100644 (file)
@@ -37,6 +37,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/setup.h>
+#include <asm/hardware/gic.h>
 
 #include <mach/iomap.h>
 #include <mach/irqs.h>
 #include "devices.h"
 
 void harmony_pinmux_init(void);
+void paz00_pinmux_init(void);
 void seaboard_pinmux_init(void);
+void trimslice_pinmux_init(void);
 void ventana_pinmux_init(void);
 
+static const struct of_device_id tegra_dt_irq_match[] __initconst = {
+       { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
+       { }
+};
+
+void __init tegra_dt_init_irq(void)
+{
+       tegra_init_irq();
+       of_irq_init(tegra_dt_irq_match);
+}
+
 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
@@ -60,14 +74,28 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
-       OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.1", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
+                      &tegra_ehci1_device.dev.platform_data),
+       OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
+                      &tegra_ehci2_device.dev.platform_data),
+       OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
+                      &tegra_ehci3_device.dev.platform_data),
        {}
 };
 
 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
        /* name         parent          rate            enabled */
        { "uartd",      "pll_p",        216000000,      true },
+       { "usbd",       "clk_m",        12000000,       false },
+       { "usb2",       "clk_m",        12000000,       false },
+       { "usb3",       "clk_m",        12000000,       false },
+       { "pll_a",      "pll_p_out1",   56448000,       true },
+       { "pll_a_out0", "pll_a",        11289600,       true },
+       { "cdev1",      NULL,           0,              true },
+       { "i2s1",       "pll_a_out0",   11289600,       false},
+       { "i2s2",       "pll_a_out0",   11289600,       false},
        { NULL,         NULL,           0,              0},
 };
 
@@ -76,30 +104,21 @@ static struct of_device_id tegra_dt_match_table[] __initdata = {
        {}
 };
 
-static struct of_device_id tegra_dt_gic_match[] __initdata = {
-       { .compatible = "nvidia,tegra20-gic", },
-       {}
-};
-
 static struct {
        char *machine;
        void (*init)(void);
 } pinmux_configs[] = {
+       { "compulab,trimslice", trimslice_pinmux_init },
        { "nvidia,harmony", harmony_pinmux_init },
+       { "compal,paz00", paz00_pinmux_init },
        { "nvidia,seaboard", seaboard_pinmux_init },
        { "nvidia,ventana", ventana_pinmux_init },
 };
 
 static void __init tegra_dt_init(void)
 {
-       struct device_node *node;
        int i;
 
-       node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
-                                               TEGRA_ARM_INT_DIST_BASE);
-       if (node)
-               irq_domain_add_simple(node, INT_GIC_BASE);
-
        tegra_clk_init_from_table(tegra_dt_clk_init_table);
 
        /*
@@ -121,7 +140,9 @@ static void __init tegra_dt_init(void)
 }
 
 static const char * tegra_dt_board_compat[] = {
+       "compulab,trimslice",
        "nvidia,harmony",
+       "compal,paz00",
        "nvidia,seaboard",
        "nvidia,ventana",
        NULL
@@ -130,7 +151,7 @@ static const char * tegra_dt_board_compat[] = {
 DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
-       .init_irq       = tegra_init_irq,
+       .init_irq       = tegra_dt_init_irq,
        .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_dt_init,
index 4956c3cea73172923cff3f2166eff9711a727e1c..004b0fdf0d76178cd5f037deeec55bdbb0a39494 100644 (file)
@@ -21,6 +21,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/of.h>
 
 #include <asm/hardware/gic.h>
 
@@ -129,6 +130,11 @@ void __init tegra_init_irq(void)
        gic_arch_extn.irq_unmask = tegra_unmask;
        gic_arch_extn.irq_retrigger = tegra_retrigger;
 
-       gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
-                IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
+       /*
+        * Check if there is a devicetree present, since the GIC will be
+        * initialized elsewhere under DT.
+        */
+       if (!of_have_populated_dt())
+               gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
+                       IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
 }
index db9d1b4bfbdc4eda2e4243cc43e31c4ed498adf5..dbc7fe8ca9e7d692dc750d58e49e3bbcc13b6140 100644 (file)
 #include <linux/platform_data/tegra_usb.h>
 #include <linux/irq.h>
 #include <linux/usb/otg.h>
+#include <linux/gpio.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+
 #include <mach/usb_phy.h>
+#include <mach/iomap.h>
 
 #define TEGRA_USB_DMA_ALIGN 32
 
@@ -574,6 +579,35 @@ static const struct hc_driver tegra_ehci_hc_driver = {
        .port_handed_over       = ehci_port_handed_over,
 };
 
+static int setup_vbus_gpio(struct platform_device *pdev)
+{
+       int err = 0;
+       int gpio;
+
+       if (!pdev->dev.of_node)
+               return 0;
+
+       gpio = of_get_named_gpio(pdev->dev.of_node, "nvidia,vbus-gpio", 0);
+       if (!gpio_is_valid(gpio))
+               return 0;
+
+       err = gpio_request(gpio, "vbus_gpio");
+       if (err) {
+               dev_err(&pdev->dev, "can't request vbus gpio %d", gpio);
+               return err;
+       }
+       err = gpio_direction_output(gpio, 1);
+       if (err) {
+               dev_err(&pdev->dev, "can't enable vbus\n");
+               return err;
+       }
+       gpio_set_value(gpio, 1);
+
+       return err;
+}
+
+static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
+
 static int tegra_ehci_probe(struct platform_device *pdev)
 {
        struct resource *res;
@@ -590,6 +624,15 @@ static int tegra_ehci_probe(struct platform_device *pdev)
                return -EINVAL;
        }
 
+       /* Right now device-tree probed devices don't get dma_mask set.
+        * Since shared usb code relies on it, set it here for now.
+        * Once we have dma capability bindings this can go away.
+        */
+       if (!pdev->dev.dma_mask)
+               pdev->dev.dma_mask = &tegra_ehci_dma_mask;
+
+       setup_vbus_gpio(pdev);
+
        tegra = kzalloc(sizeof(struct tegra_ehci_hcd), GFP_KERNEL);
        if (!tegra)
                return -ENOMEM;
@@ -640,6 +683,28 @@ static int tegra_ehci_probe(struct platform_device *pdev)
                goto fail_io;
        }
 
+       /* This is pretty ugly and needs to be fixed when we do only
+        * device-tree probing. Old code relies on the platform_device
+        * numbering that we lack for device-tree-instantiated devices.
+        */
+       if (instance < 0) {
+               switch (res->start) {
+               case TEGRA_USB_BASE:
+                       instance = 0;
+                       break;
+               case TEGRA_USB2_BASE:
+                       instance = 1;
+                       break;
+               case TEGRA_USB3_BASE:
+                       instance = 2;
+                       break;
+               default:
+                       err = -ENODEV;
+                       dev_err(&pdev->dev, "unknown usb instance\n");
+                       goto fail_phy;
+               }
+       }
+
        tegra->phy = tegra_usb_phy_open(instance, hcd->regs, pdata->phy_config,
                                                TEGRA_USB_PHY_MODE_HOST);
        if (IS_ERR(tegra->phy)) {
@@ -773,6 +838,11 @@ static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
                hcd->driver->shutdown(hcd);
 }
 
+static struct of_device_id tegra_ehci_of_match[] __devinitdata = {
+       { .compatible = "nvidia,tegra20-ehci", },
+       { },
+};
+
 static struct platform_driver tegra_ehci_driver = {
        .probe          = tegra_ehci_probe,
        .remove         = tegra_ehci_remove,
@@ -783,5 +853,6 @@ static struct platform_driver tegra_ehci_driver = {
        .shutdown       = tegra_ehci_hcd_shutdown,
        .driver         = {
                .name   = "tegra-ehci",
+               .of_match_table = tegra_ehci_of_match,
        }
 };